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* fs/fat: Reduce stack usageTom Rini2017-09-221-4/+10
| | | | | | | | | | | We have limited stack in SPL builds. Drop itrblock and move to malloc/free of itr to move this off of the stack. As part of this fix a double-free issue in fat_size(). Signed-off-by: Tom Rini <trini@konsulko.com> --- Rework to use malloc/free as moving this to a global overflows some SH targets.
* Merge branch 'next' of git://git.denx.de/u-boot-videoTom Rini2017-09-219-6/+657
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| * video: add config option to skip framebuffer clearRob Clark2017-09-123-2/+13
| | | | | | | | | | | | | | | | The use-case is that the thing that loaded u-boot already put a splash image on screen. And we want to preserve that until grub boot menu takes over. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * video: simplefbRob Clark2017-09-123-1/+84
| | | | | | | | | | | | | | | | | | Not really qcom specific, but for now qcom/lk is the one firmware that is (afaiu) setting up the appropriate dt node for pre-configured display. Uses the generic simple-framebuffer DT bindings so this should be useful on other platforms. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * video: add STM32 LTDC display controllerPhilippe CORNU2017-09-125-0/+463
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32 LTDC display controller provides a parallel digital RGB and signals for horizontal, vertical synchronization, Pixel Clock and Data Enable as output to interface directly to a variety of LCD and TFT panels. The LTDC main features are: - 24-bit RGB Parallel Pixel Output, Programmable timings & polarity for HSync, VSync and Data Enable. - 2 layers with Blending, Color Keying, Window position & size, Dithering, Background color, Color Look-Up Table (CLUT). - Supported layer color formats: ARGB8888, RGB888, RGB565, ARGB1555, ARGB4444, L8 CLUT, AL44 & AL88 This LTDC driver: - supports: RGB parallel output with timings & polarity, 1 layer in RGB565. - supports but with hard-coded configurations: blending, window position & size (crop), background color. - does not support yet: rgb888, argb8888, 8-bit clut, dithering. This LTDC driver is compatible with all stm32 platforms with the LTDC IP and has been tested on stm32 f746-disco board. Signed-off-by: Philippe CORNU <philippe.cornu@st.com>
| * dm: backlight: Add a driver for GPIO backlightPatrick Delaunay2017-09-123-0/+85
| | | | | | | | | | | | | | | | Add a driver for GPIO backlights. It understands the standard device tree binding. It can be used with simple-panel when PWM is not necessary. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * dm: backlight: Add CONFIG_BACKLIGHT_PWMPatrick Delaunay2017-09-122-3/+12
| | | | | | | | | | | | | | Add a config to select individually the driver for PWM backlights. Manage "depends on" to be backyard compatible. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | nds32: spi: Support spi dm driver.rick2017-09-213-0/+507
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support spi driver and can detect MX25U1635E flash on AE3XX board. Verification: sf probe 0:0 50000000 0 spi_flash_std_probe(sf_Probr.c) spi_flash_probe_slave(sf_Probr.c) SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB NDS32 # sf test 0x100000 0x1000 SPI flash test: 0 erase: 34 ticks, 117 KiB/s 0.936 Mbps 1 check: 15 ticks, 266 KiB/s 2.128 Mbps 2 write: 21 ticks, 190 KiB/s 1.520 Mbps 3 read: 11 ticks, 363 KiB/s 2.904 Mbps Test passed 0 erase: 34 ticks, 117 KiB/s 0.936 Mbps 1 check: 15 ticks, 266 KiB/s 2.128 Mbps 2 write: 21 ticks, 190 KiB/s 1.520 Mbps 3 read: 11 ticks, 363 KiB/s 2.904 Mbps Signed-off-by: rick <rick@andestech.com>
* | nds32: board: Support SPI driver.rick2017-09-213-3/+45
| | | | | | | | | | | | Add spi dts node and enable spi dm flash config. Signed-off-by: rick <rick@andestech.com>
* | nds32: mtd: add spi flash id MX25U16335E.rick2017-09-211-0/+1
| | | | | | | | | | | | To support MACRONIX MX25U1635E 16M-BIT flash. Signed-off-by: rick <rick@andestech.com>
* | nds32: ftmac100: Fix write mac addr fail problem.rick2017-09-211-1/+6
| | | | | | | | | | | | | | After soft reset complete, write mac address immediately will fail. Add delay to work around this problem. Signed-off-by: rick <rick@andestech.com>
* | nds32: ftmac100 support cache enable.rick2017-09-214-5/+51
| | | | | | | | | | | | Enable cache and ftmac100 performance can be improved. Signed-off-by: rick <rick@andestech.com>
* | nds32: ftmac100: support cache enable.rick2017-09-211-3/+2
| | | | | | | | | | | | Add cache inval and flush when rx and tx. Signed-off-by: rick <rick@andestech.com>
* | nds32: bootm: Fix warning of struct tag_serialnr declaredrick2017-09-212-1/+2
| | | | | | | | | | | | move #include <asm/setup.h> from bootm.c to bootm.h Signed-off-by: rick <rick@andestech.com>
* | nds32: board: Fix andestech adp-ae3xx.c make fail problem.rick2017-09-211-0/+1
| | | | | | | | | | | | Add #include <asm/mach-types.h> to fix it. Signed-off-by: rick <rick@andestech.com>
* | Merge git://www.denx.de/git/u-boot-imxTom Rini2017-09-2026-80/+474
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| * | mx6sabresd: Add Serial Download Protocol supportFabio Estevam2017-09-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add Serial Download Protocol support (SDP), which allows loading SPL and u-boot.img via imx_usb_loader tool as explained in doc/README.sdp. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | toradex: imx6: Move g_dnl_bind_fixup() into common SPL codeFabio Estevam2017-09-203-26/+10
| | | | | | | | | | | | | | | | | | | | | | | | Instead of having every board file to add its own g_dnl_bind_fixup() implementation, move it to the common imx6 SPL code. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Łukasz Majewski <lukma@denx.de>
| * | board: ge: bx50v3: set eth0 MAC addressIan Ray2017-09-205-1/+378
| | | | | | | | | | | | | | | | | | | | | | | | Define i2c mux configuration. Add new vpd_reader which is used to read vital product data. Read VPD from EEPROM and set eth0 MAC address. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
| * | detect and setup solidrun hummingboard2Dennis Gilmore2017-09-202-2/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hummingboard2 is slightly different to the cubox i and to the hummingboard. The GPIO pin info to probe came from solidruns for of u-boot on github. https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-i/mx6_cubox-i.c#L569-L589 I have tested on a hummingboard-edge witha imx6 solo and 512mb of ram. Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
| * | imx6: drop duplicated bss memset and board_init_r() callAnatolij Gustschin2017-09-188-42/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bss section is cleared in crt0.S. board_init_r() is also entered from crt0 code. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | pico-imx7d: Add "how to boot with NXP 4.1 Kernel"Vanessa Maegima2017-09-181-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | The NXP 4.1 kernel needs to boot with secure boot. Add information on how to enable secure boot mode. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
| * | imx: imx7d: remove CamelCase from ENET_xMHz macrosEric Nelson2017-09-185-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | imx_common: detect USB serial downloader reliablyStefan Agner2017-09-181-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current mechanism using SCR/GPR registers work well when the serial downloader boot mode has been selected explicitly (either via boot mode pins or using bmode command). However, in case the system entered boot ROM due to unbootable primary boot devices (e.g. empty eMMC), the SPL fails to detect that it has been downloaded through serial loader and tries to continue booting from eMMC: Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### The only known way to reliably detect USB serial downloader is by checking the USB PHY receiver block power state... Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
| * | imx: add macro to detect whether USB PHY is activeStefan Agner2017-09-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This macro allows to detect whether the USB PHY is active. This is helpful to detect if the boot ROM has previously started the USB serial downloader. The idea is taken from the mfgtool support in the NXP U-Boot: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?h=imx_v2016.03_4.1.15_2.0.0_ga&id=a352ed3c5184b95c4c9f7468f5fbb5f43de5e412 Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
* | | Merge git://git.denx.de/u-boot-rockchipTom Rini2017-09-1845-101/+851
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| * | | rockchip: puma_rk3399: increase serialno_str sizeKlaus Goger2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial nummer and the terminating null byte added by snprintf. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
| * | | rockchip: ram: rk3399: update reg map for of-platdataKever Yang2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: sdhci: update reg map for of-platdataKever Yang2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: dts: rk3368: reduce the number of nodes seen in TPLPhilipp Tomsich2017-09-181-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RK3368 TPL stage always returns to the BootROM, so it has no need for the eMMC, SD and SPI nodes. This marks those nodes (that should be included in SPL, but not TPL) as 'u-boot,dm-spl'. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATAPhilipp Tomsich2017-09-181-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the OF_PLATDATA structure layout changes. This adjusts the DMC driver for the RK3368 to track these changes. For the time being (i.e. until regmap_init_mem_platdata works for the 64bit case), we won't use regmap_init_mem_platdata here and simply access of_plat.reg[] directly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: timer: update for 32/64bit-aware OF_PLATDATAPhilipp Tomsich2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With dtoc emitting fdt64_t for addresses (and region sizes), the array indices for accessing the reg[] array needs to be adjusted. This adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA given this new structure layout. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree)Philipp Tomsich2017-09-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the critical drivers ready for switching to a live tree, we can now enable it in the defconfig for the RK3399-Q7. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: efuse: change to use dev_read_addr_ptrPhilipp Tomsich2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the dev_read_addr_ptr function available, we can change the efuse driver to use it (and eliminate the explicit type-cast). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: clk: rk3399: Convert to livetreePhilipp Tomsich2017-09-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the clock driver for the RK3399 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulatorPhilipp Tomsich2017-09-181-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the RK3399-Q7, we need to turn on the on-module USB hub before using the USB host interfaces (only the OTG interface is directly connected to the edge connector). This drops the deprecated 'rockchip,vbus-gpio' property and uses a fixed regulator to turn on the USB hub. References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus" Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1Philipp Tomsich2017-09-181-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3399 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: rk3368: add the missing target and pinctrl config for sheep boardAndy Yan2017-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing target and pinctrl config for rk3368 sheep board Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settingsAndy Yan2017-09-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rk3288: Add Vyasa initial board supportJagan Teki2017-09-189-0/+457
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Vyasa RK3288 initial board from Amarula Solutions. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRFPhilipp Tomsich2017-09-181-18/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL enabled: this allows the use of syscon to retrieve the addresses of GRF and SGRF (except for the early debug UART setup, which runs so early that the device-model is not initialised). This removes the hard-coded addresses and goes through syscon to retrieve the base-addresses of GRF and SGRF. After that, we use the structure definitions to locate the respective registers. In addition to this, the inclusion of header files is also cleaned up: - all headers are included at the beginning (there was a spurious inclusion of the grf header from within a function) - all #include statements for unused headers are removed - the remaining #include statements are sorted (while keeping common.h included in front) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabledPhilipp Tomsich2017-09-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and regenerates the defconfig (picking up a few changes/reorderings) from upstream Kconfig changes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: dts: rk3368-lion: add /chosen/tick-timerPhilipp Tomsich2017-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support bootstage recording, we want to mark our DM timer as the tick-timer; this triggers the support for 'trying harder' to read the timer in the Rockchip DM timer driver, even if the device model isn't ready yet. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: gpio: remove outdated/misleading commentPhilipp Tomsich2017-09-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove a comment claiming that this driver only supports the RK3288, as we also use it on the RK3368, RK3399 and (most likely) on other variants. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c
| * | | rockchip: gpio: convert to livetreePhilipp Tomsich2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Rockchip GPIO-bank driver to support a live tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c
| * | | rockchip: i2c: Convert to livetreePhilipp Tomsich2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Rockchip I2C driver to support livetree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | | rockchip: rk8xx: remove unused header includesPhilipp Tomsich2017-09-181-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove header file includes that have been left over after the conversion to livetree-support. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: sdhci: Convert to livetreePhilipp Tomsich2017-09-181-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Rockchip SDHCI wrapper to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_sdhci.c
| * | | rockchip: spi: Convert to livetreePhilipp Tomsich2017-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Rockchip SPI driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | | rockchip: pinctrl: rk3368: Convert to livetreePhilipp Tomsich2017-09-181-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the pinctrl driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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