| Commit message (Collapse) | Author | Age | Files | Lines |
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
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u-boot,dm-pre-reloc was missing from pinctrl and it's
children node. causing failure to configure pin mux
before relocation.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
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If the SPDX license identifier is in the first line the shell does not
recognize which interpreter shall be used to execute the script.
Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html
for scripts which require the '#!PATH_TO_INTERPRETER' in the first line
(...) the SPDX identifier goes into the second line.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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The default value with distro_bootcmd is 2 seconds, which is
reasonably fast, and provides a consistent experience across platforms
supporting distro_bootcmd.
The current bootdelay value of 0 seconds is a bit challenging to
interrupt when desired.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Vasut <marex@denx.de>
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When building compressed (lzop, gzip) multi-dtb fit images, the
compression tool may embed the time or umask in the image.
Work around this by manually setting the time of the source file using
SOURCE_DATE_EPOCH and a hard-coded 0600 umask.
With gzip, this could be accomplished by using -n/--no-name, but lzop
has no current workaround:
https://bugs.debian.org/896520
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
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CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's
why this sync.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Amarula A64-Relic is A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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orangepi-prime has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Sync bananapi-m64 usb host nodes from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Sync sun8i-a83t usbphy node details from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Sync bananapi-m64 usb_otg node from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner PHY USB code is now part of generic-phy framework,
so drop existing legacy handling like arch/arm/mach-sunxi.c
and related code areas.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner USB PHY handling can be done through driver-model
generic-phy so add the generic-phy ops to relevant places
on host and musb sunxi driver and enable them in respective
SOC's.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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The sunxi otg phy has a bug where it wrongly detects a high speed squelch
when reset on the root port gets de-asserted with a lo-speed device.
The workaround for this is to disable squelch detect before de-asserting
reset, and re-enabling it after the reset de-assert is done. Add a sunxi
specific phy function to allow the sunxi-musb glue to do this.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner PHY USB code is now part of generic-phy framework,
so use it in board_usb_cable_connected.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Sync sun4i-usb-phy bindings from Linux, since the
drivers/phy/allwinner/phy-sun4i-usb.c follow similar.
Sync changes from Linux with below commit:
"phy: sun4i-usb: add support for R40 USB PHY"
(sha1: f3d96f8d23d8e6d0b7642ee946b9b2ac3418fb4d)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Allwinner A31 has 3 USB PHY's and rest similar to A10.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Add PHY configs for Allwinner A10/A13/A20 which are SUN4I.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has
2 USB PHY's and second one is HSIC. So phy control need to
configure to handle these HSIC and SIDDQ requirement.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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V3S has 1 USB PHY, rest are similar to A64.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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H3/H5 has 4 USB PHY, rest are similar to A64.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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ID and VBUS detection code require when musb changing
between Host and/or Peripheral modes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.
This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.
Current implementation is unable to get pinctrl, clock and reset
details from DT since the dm code on these will add it future.
Driver named as phy-sun4i-usb.c since the same PHY logic
work for all Allwinner SOC's start from 4I to A64 except 9I
with different phy configurations.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Like other Allwinner SoC, the H3/H5/A64 is missing the config register
from the musb hardware block. Use a known working value for it
like other SoC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Clock gating bits on H43/H5 were wrong, fix them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Use BIT is possible areas instead of numerical shift.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Add OTG device clkgate and reset for H3/H5 through driver_data.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints
with relevant fifo configs, rest all have 5 endpoints.
So add the fifo configs and defer them based on driver_data.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Filling musb_hdrc pdata using structure will unnecessary
add extra ifdefs, so fill them inside probe call for
better code understanding and get rid ifdefs using
devicetree compatible.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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- add proper macros for musb_config members
- use bool 'true' for multipoint and dyn_fifo instead of numerical 1
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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Move struct sunxi_ccm_reg pointer to private structure
so-that accessing ccm reg base become more proper way
and avoid local initialization in each function.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
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This reverts commit 819f1e081c527d2d02cdaeec0027384688cf5de0.
This check was introduced in order to cope with the size limitation we had
when we were still using the raw environment in MMC. However, this
introduces padding as well, which can result in an overly huge binary if
one wants to flash the environment to some other location.
Since we now have a FAT-based environment, this check is not so useful
anymore, so we can just drop it.
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Måns Rullgård <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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Patch queue for efi - 2018-06-03
A number of fixes and feature completeness work this time around:
- Fix sunxi GOP reservation
- Fix cursor position
- Fix efi_get_variable
- Allow more selftest parts to build on x86_64
- Allow unaligned memory access on armv7
- Implement ReinstallProtocolInterface
- More sandbox preparation
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The code to determine rows / cols on the screen could potentially run
into a case where it doesn't know how big the screen is. In that case,
assume 80x25.
Signed-off-by: Alexander Graf <agraf@suse.de>
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Handles are not used at runtime. They are freed by the firmware when the
last protocol interface is uninstalled. So there is no reason to use EFI
memory when creating handles.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
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efi_mem_carve_out() is used to remove memory pages from a mapping.
As the number of pages to be removed is a 64bit type the return type
should be 64bit too.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
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