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* ARM: zynq: Check zynq aes & rsa command parameters countT Karthik Reddy2019-04-161-1/+8
| | | | | | | | | This patch checks for zynq aes & rsa commands max parameters count. Also checks minimum number of parameters count for aes command. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Use zynqmp_mmio_read/write functionsT Karthik Reddy2019-04-161-6/+10
| | | | | | | | | | | Changed the return type of reset_reason() to int from u32, because zynqmp_mmio_read/write() returns signed value on error. Replaced readl and writel functions with zynqmp_mmio_read & zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHzSiva Durga Prasad Paladugu2019-04-161-2/+2
| | | | | | | | This patch fixes the tap delay values to be set at 100MHz and 150MHz as per TRM by fixing the if condition to use <= instead of <. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Disable WDT for zcu100Michal Simek2019-04-161-2/+0
| | | | | | | | | | | | | Do not enable WDT by default on this target because distributions are not enabling watchdog driver to service it. Feature has been enabled by: "arm64: zynqmp: Enable cadence WDT for zcu100" (sha1: 767afebbcda59f3ccb04f6c94de8cab2fb7905b6) And WDT is still enabled in rebranded Avnet Ultra 96 board support. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* test: py: Extend fpga test with fit image with external dataMichal Simek2019-04-161-0/+13
| | | | | | | | | | | | | | | | | | | Images are created mkimage -f fit.its -E download-fit-external.ub and test expects these entries. env__fpga_under_test = { ... "mkimage_fit_external": download-fit-external.ub", "mkimage_fit_external_size": xxxxx, ... } Test download file and loads it to fpga. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fpga: Replace char * with const char * for filenameTien Fong Chee2019-04-162-2/+3
| | | | | | | | Ensure the string for filename is always constant, otherwise it can be corrupted by the writing. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Add support for getting external data address and lengthTien Fong Chee2019-04-161-3/+3
| | | | | | | | This function supports getting both data address and length for existing FPGA subimage and FPGA external data. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-04-14157-255/+283
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/dts/armada-385-amc.dts arch/arm/dts/armada-xp-theadorable.dts arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi Signed-off-by: Tom Rini <trini@konsulko.com>
| * MAINTAINERS: Change Jagan's email addressJagan Teki2019-04-123-5/+5
| | | | | | | | | | | | | | Missed few mails from openedev, since most of the day I look at amarulasolutions mail so update the same. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi-nor-ids: Add Gigadevice gd25lq128 IDNeil Armstrong2019-04-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | This adds support for the Gigadevice gd25lq128 ID needed on the upcoming libretech-ac board. SPI_NOR_QUAD_READ is not set since it has not been tested in Quad mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * dm: spi: Read default speed and mode values from DTPatrick Delaunay2019-04-1212-35/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch update the behavior introduced by commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT") In case of DT boot, don't read default speed and mode for SPI from CONFIG_* but instead read from DT node. This will make sure that boards with multiple SPI/QSPI controllers can be probed at different bus frequencies and SPI modes. Remove also use in boards of the value speed=0 (no more supported) for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0. DT values will be always used when available (full DM support of SPI slave with available DT node) even if speed and mode are requested; for example in splash screen support (in splash_sf_read_raw) or in SPL boot (in spl_spi_load_image). The caller of spi_get_bus_and_cs() no more need to force speed=0. But the current behavior don't change if the SPI slave is not present (device with generic driver is created automatically) or if platdata is used (CONFIG_OF_PLATDATA). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi: Replace ad-hoc default implementation with spi_mem_opMarek Vasut2019-04-121-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the ad-hoc erase operation implementation with a simple spi_mem_op implementation of the same functionality. This is a minor optimization and removal of the ad-hoc code. This however also changes the behavior of the execution of the erase opcode from two separate transfer requests to the SPI NOR driver to one transfer request to the SPI NOR driver. The former was how U-Boot behaved before the SPI NOR framework was imported and the later was introduced by the SPI NOR framework. The former is more optimal, so keep that. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Horatiu Vultur <horatiu.vultur@microchip.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com> Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
| * spi: fsl_dspi fix to stop extra transmissionsJared Bents2019-04-121-4/+26
| | | | | | | | | | | | | | | | | | | | Update to prevent a byte of zeros being transmitted between each byte in the tx buffer when providing both a tx buffer and a rx buffer. Signed-off-by: Jared Bents <jared.bents@rockwellcollins.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: spi-mem: Check if exec_op function is set before calling itBernhard Messerklinger2019-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | Add check if exec_op is set before calling it. At the moment it is called unconditionally, which leads to a crash if it is not set correctly. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: fix Coverity integer handling issueMiquel Raynal2019-04-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A Coverity robot reported an integer handling issue (OVERFLOW_BEFORE_WIDEN) in the potentially overflowing expression: (mtd_div_by_ws(mtd->size, mtd) - mtd_div_by_ws(offs, mtd)) * mtd_oobavail(mtd, ops) While such overflow will certainly never happen due to the numbers handled, it is cleaner to fix this operation anyway. The problem is that all the maths include 32-bit quantities, while the result is stored in an explicit 64-bit value. As maxooblen will just be compared with a size_t, let's change the type of the variable to a size_t. This will not fix anything but will clarify a bit the situation. Then, do an explicit cast to fix Coverity warning. Addresses-Coverity-ID: 184180 ("Integer handling issues") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: fix mtd_oobavail() incoherent returned valueMiquel Raynal2019-04-121-1/+1
| | | | | | | | | | | | | | | | mtd_oobavail() returns either mtd->oovabail or mtd->oobsize. Both values are unsigned 32-bit entities, so there is no reason to pretend returning a signed one. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spi: Add Macronix MX66U2G45F deviceMarek Vasut2019-04-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add Macronix MX66U2G45F flash device description. This is a 256 MiB part. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Vignesh R <vigneshr@ti.com> [jagan: use 'g' instead of 'f' in flash name] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * doc: device-tree-bindings: switch from spi-flash to jedec, spi-norNeil Armstrong2019-04-123-3/+3
| | | | | | | | | | | | | | | | | | | | | | Since all DTS files has been switched to "jedec,spi-nor", remove the "spi-flash" compatible from the bindings examples. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: sf_probe: remove spi-flash compatibleNeil Armstrong2019-04-121-1/+0
| | | | | | | | | | | | | | | | | | | | Now the "spi-flash" compatible has been removed in the DTS files, remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor" compatible. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * x86: dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong2019-04-1213-13/+13
| | | | | | | | | | | | | | | | | | | | The x86 code and DT uses "spi-flash" to detect a flash node, switch to "jedec,spi-nor" in the DTS files and in fdtdec by switching the GENERIC_SPI_FLASH value to to jedec,spi-nor. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong2019-04-12116-147/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot dts files. This compatible has been added in sf_probe, let use it. This patch switches to jedec,spi-nor when spi-flash is used in the DTS and DTSI files, and removed spi-flash when jedec,spi-nor is already present. The x86 dts are switched in a separate commit since it depends on a change in fdtdec. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: add spi flash id s25fl064lHeiko Schocher2019-04-121-0/+1
| | | | | | | | | | | | | | | | Add support for SPANSION s25fl064l Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Vignesh R <vigneshr@ti.com>
| * mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux versionStefan Roese2019-04-121-32/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support with the latest Linux version (v5.0-rc3) plus the chip supported posted on the MTD list. Only the currently in U-Boot available chip is supported with this sync. The changes for the GD5F1GQ4UExxG are: - Name of NAND device changed to better reflect the real part - OOB layout changed to only reserve 1 byte for BBT - Use ECC caps 8bits/512bytes instead of 8bits/2048bytes - Enhanced ecc_get_status() function to determine and report a more fine grained bit error status Signed-off-by: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
| * spi: cadence_qspi: Add quad write supportLey Foon Tan2019-04-123-3/+8
| | | | | | | | | | | | | | | | | | | | Use quad write if SPI_TX_QUAD flag is set. Tested quad write on Stratix 10 SoC board (Micron serial NOR flash, mt25qu02g) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | Merge tag 'pull-12apr19' of git://git.denx.de/u-boot-dmTom Rini2019-04-1332-395/+1280
|\ \ | | | | | | | | | | | | | | | fdtdec tests and improvements for carve-outs pinctrl race-condition fix various other fixes in sandbox, sound, mkimage, etc.
| * | fdt: Fix mkimage list to try every header typeJordan Hand2019-04-111-8/+15
| | | | | | | | | | | | | | | | | | Signed-off-by: Jordan Hand <jorhand@microsoft.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
| * | dm: sound: make all functions static inlineChristian Gmeiner2019-04-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes following compile problem: ➜ u-boot-mainline git:(master) ✗ make sandbox_defconfig all NO_SDL=1 scripts/kconfig/conf --syncconfig Kconfig CHK include/config.h CFG u-boot.cfg GEN include/autoconf.mk GEN include/autoconf.mk.dep CHK include/config/uboot.release CHK include/generated/version_autogenerated.h CHK include/generated/timestamp_autogenerated.h UPD include/generated/timestamp_autogenerated.h CHK include/generated/generic-asm-offsets.h HOSTCC tools/mkenvimage.o HOSTLD tools/mkenvimage HOSTCC tools/fit_image.o HOSTCC tools/image-host.o HOSTCC tools/dumpimage.o HOSTLD tools/dumpimage HOSTCC tools/mkimage.o HOSTLD tools/mkimage HOSTLD tools/fit_info HOSTLD tools/fit_check_sign CC cmd/version.o GZIP cmd/config_data.gz CHK cmd/config_data_gz.h CHK cmd/config_data_size.h CHK cmd/license_data_gz.h CHK cmd/license_data_size.h LD cmd/built-in.o CC common/main.o LD common/built-in.o CC drivers/fastboot/fb_getvar.o LD drivers/fastboot/built-in.o LD drivers/video/built-in.o ld.bfd: drivers/video/sandbox_sdl.o: in function `sandbox_sdl_sound_play': /home/christian/projects/u-boot-mainline/./arch/sandbox/include/asm/sdl.h:110: multiple definition of `sandbox_sdl_sound_play'; drivers/video/video-uclass.o:/home/christian/projects/u-boot-mainline/./arch/sandbox/include/asm/sdl.h:110: first defined here ld.bfd: drivers/video/sandbox_sdl.o: in function `sandbox_sdl_sound_init': /home/christian/projects/u-boot-mainline/./arch/sandbox/include/asm/sdl.h:120: multiple definition of `sandbox_sdl_sound_init'; drivers/video/video-uclass.o:/home/christian/projects/u-boot-mainline/./arch/sandbox/include/asm/sdl.h:120: first defined here make[3]: *** [scripts/Makefile.build:355: drivers/video/built-in.o] Fehler 1 make[2]: *** [scripts/Makefile.build:432: drivers/video] Fehler 2 make[1]: *** [Makefile:1531: drivers] Fehler 2 make: *** [Makefile:485: __build_one_by_one] Fehler 2 Fixes: f2b25c9bf82 ("dm: sound: Complete migration to driver model") Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | sandbox: Enable fdtdec testsThierry Reding2019-04-112-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable fdtdec tests on sandbox configurations so that they can be run to validate the fdtdec implementation. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: test: Add carveout testsThierry Reding2019-04-111-0/+152
| | | | | | | | | | | | | | | | | | | | | Implement carveout tests for 32-bit and 64-bit builds. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: test: Use compound statement macrosThierry Reding2019-04-111-42/+22
| | | | | | | | | | | | | | | | | | | | | | | | This eliminates the need for intermediate helper functions and allow the macros to return a value so that it can be used subsequently. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: test: Fix build warningThierry Reding2019-04-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Hide the declaration of the "fd" variable When not building a DEBUG configuration, to avoid the variable being unused. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: Add Kconfig symbol for testsThierry Reding2019-04-111-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Runtime tests are provided as a test_fdtdec command implementation. Add a Kconfig symbol that allows this command to be built so that the tests can be used. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: Implement carveout support functionsThierry Reding2019-04-112-0/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | fdtdec: Implement fdtdec_add_reserved_memory()Thierry Reding2019-04-113-0/+315
| | | | | | | | | | | | | | | | | | | | | This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | fdtdec: Implement fdtdec_set_phandle()Thierry Reding2019-04-112-0/+18
| | | | | | | | | | | | | | | | | | This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | fdtdec: Add fdt_{addr, size}_unpack() helpersThierry Reding2019-04-111-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | fdtdec: Add cpu_to_fdt_{addr, size}() macrosThierry Reding2019-04-111-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | libfdt: Add phandle generation helperThierry Reding2019-04-114-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new fdt_generate_phandle() function can be used to generate a new, unused phandle given a specific device tree blob. The implementation is somewhat naive in that it simply walks the entire device tree to find the highest phandle value and then returns a phandle value one higher than that. A more clever implementation might try to find holes in the current set of phandle values and fill them. But this implementation is relatively simple and works reliably. Also add a test that validates that phandles generated by this new API are indeed unique. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: remove unused function dm_fdt_pre_relocPatrick Delaunay2019-04-112-49/+0
| | | | | | | | | | | | | | | | | | | | | | | | The function dm_ofnode_pre_reloc should be used instead of the function dm_fdt_pre_reloc and avoid duplicated code. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_relocPatrick Delaunay2019-04-111-1/+2
| | | | | | | | | | | | | | | | | | | | | Prepare to remove dm_fdt_pre_reloc function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_relocPatrick Delaunay2019-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | Prepare to remove dm_fdt_pre_reloc Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Properly print physical addressesThierry Reding2019-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the %pap printf specifier to print physical addresses. The physical address is passed by reference and hence avoids the need to play tricks with the preprocessor to use the correct specifier. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | sandbox: Use correct phys_{addr, size}_t for PHYS_64BIT=yThierry Reding2019-04-111-6/+6
| | | | | | | | | | | | | | | | | | | | | If 64-bit physical addresses support is enabled, make sure the sandox defines the correct types for phys_addr_t and phys_size_t. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | vsprintf: Support phys_addr_t specifier unconditionallyThierry Reding2019-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When phys_addr_t printf specifier support was first introduced in commit 1eebd14b7902 ("vsprintf: Add modifier for phys_addr_t"), it was enabled only if CONFIG_CMD_NET was selected. Since physical addresses are not unique to networking support it doesn't make sense to conditionally add it in those cases only. Move support for it outside of the CMD_NET guard so that the specifier is always supported. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | core: ofnode: Fix ASAN-reported stack-buffer-overflow in of_get_addressEugeniu Rosca2019-04-111-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2019.04-rc3 sandbox U-Boot fails to boot when compiled with -fsanitize=address and linked against -lasan, reporting [1]. Git bisecting shows that the issue is contributed by v2019.01 commit 1678754f5e2c ("core: ofnode: Fix ofnode_get_addr_index function"). The root cause seems to be the mismatch between sizeof(u64) and sizeof(fdt_size_t) on sandbox. Luckily, thanks to the fact that the size argument of both of_get_address() and fdtdec_get_addr_size_fixed() is optional, we can pass NULL in its place, avoiding the problem. [1] Backtrace reported by ASAN (gcc 8.1.0): $> ./u-boot -d arch/sandbox/dts/sandbox.dtb [..] Reviewed-by: Simon Glass <sjg@chromium.org> ================================================================= ==10998==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7ffcc2331140 at pc 0x0000004eeeb0 bp 0x7ffcc2330f80 sp 0x7ffcc2330f70 WRITE of size 8 at 0x7ffcc2331140 thread T0 #0 0x4eeeaf in of_get_address drivers/core/of_addr.c:154 #1 0x4f7441 in ofnode_get_addr_index drivers/core/ofnode.c:263 #2 0x5b2a78 in sb_eth_ofdata_to_platdata drivers/net/sandbox.c:422 #3 0x4dccd8 in device_probe drivers/core/device.c:407 #4 0x753170 in eth_initialize net/eth-uclass.c:428 #5 0x47d9bf in initr_net common/board_r.c:557 #6 0x6bcfa7 in initcall_run_list lib/initcall.c:30 #7 0x47e1fe in board_init_r common/board_r.c:859 #8 0x4060e5 in main arch/sandbox/cpu/start.c:356 #9 0x7fb8d135482f in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2082f) #10 0x40a3a8 in _start (/path/to/u-boot/u-boot+0x40a3a8) Address 0x7ffcc2331140 is located in stack of thread T0 at offset 32 in frame #0 0x4f72b8 in ofnode_get_addr_index drivers/core/ofnode.c:255 This frame has 3 object(s): [32, 36) 'size' <== Memory access at offset 32 partially overflows this variable [96, 100) 'flags' [160, 168) 'node' HINT: this may be a false positive if your program uses some custom stack unwind mechanism or swapcontext (longjmp and C++ exceptions *are* supported) SUMMARY: AddressSanitizer: stack-buffer-overflow drivers/core/of_addr.c:154 in of_get_address Shadow bytes around the buggy address: 0x10001845e1d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10001845e1e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10001845e1f0: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1 0x10001845e200: 04 f2 f2 f2 f2 f2 f2 f2 04 f2 f2 f2 f2 f2 f2 f2 0x10001845e210: 04 f2 f2 f2 f3 f3 f3 f3 00 00 00 00 00 00 00 00 =>0x10001845e220: 00 00 00 00 f1 f1 f1 f1[04]f2 f2 f2 f2 f2 f2 f2 0x10001845e230: 04 f2 f2 f2 f2 f2 f2 f2 00 f2 f2 f2 f3 f3 f3 f3 0x10001845e240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10001845e250: 00 00 00 00 f1 f1 f1 f1 00 00 f2 f2 f3 f3 f3 f3 0x10001845e260: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 0x10001845e270: f1 f1 00 f2 f2 f2 f3 f3 f3 f3 00 00 00 00 00 00 Shadow byte legend (one shadow byte represents 8 application bytes): Addressable: 00 Partially addressable: 01 02 03 04 05 06 07 Heap left redzone: fa Freed heap region: fd Stack left redzone: f1 Stack mid redzone: f2 Stack right redzone: f3 Stack after return: f5 Stack use after scope: f8 Global redzone: f9 Global init order: f6 Poisoned by user: f7 Container overflow: fc Array cookie: ac Intra object redzone: bb ASan internal: fe Left alloca redzone: ca Right alloca redzone: cb ==10998==ABORTING 'To' list: git log --since=1year drivers/core/ofnode.c | grep "\-by: .*@" | \ sed 's/.*-by: //' | sort | uniq -c | sort -rn 10 Simon Glass <sjg@chromium.org> 3 Mario Six <mario.six@gdsys.cc> 2 Martin Fuzzey <mfuzzey@parkeon.com> 2 Marek Vasut <marek.vasut+renesas@gmail.com> 1 Tom Rini <trini@konsulko.com> 1 Masahiro Yamada <yamada.masahiro@socionext.com> 1 Keerthy <j-keerthy@ti.com> 1 Jens Wiklander <jens.wiklander@linaro.org> 1 Bin Meng <bmeng.cn@gmail.com> Fixes: 1678754f5e2c ("core: ofnode: Fix ofnode_get_addr_index function") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
| * | sysreset: use syscon_regmap_lookup_by_phandlePatrick Delaunay2019-04-111-13/+2
| | | | | | | | | | | | | | | | | | | | | Use the new function syscon_regmap_lookup_by_phandle() to simplify the code. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | syscon: update syscon_regmap_lookup_by_phandlePatrick Delaunay2019-04-113-25/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the function syscon_regmap_lookup_by_phandle() introduced by commit 6c3af1f24e4b ("syscon: dm: Add a new method to get a regmap from DTS") to have Linux-compatible syscon API. Same modification than commit e151a1c288bd ("syscon: add Linux-compatible syscon API") solves issue when the node identified by the phandle has several compatibles and is already bound to a dedicated driver. See Linux commit bdb0066df96e ("mfd: syscon: Decouple syscon interface from platform devices"). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdt: Remove duplicate codeThierry Reding2019-04-111-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6d29cc7dcf2d ("fdt: Fixup only valid memory banks") ended up being merged twice, first as: commit 6d29cc7dcf2d35966aa0b6119fd1cbca0d21d5e6 Author: Thierry Reding <treding@nvidia.com> AuthorDate: Tue Jan 30 11:34:17 2018 +0100 Commit: Simon Glass <sjg@chromium.org> CommitDate: Sun Feb 18 12:53:38 2018 -0700 fdt: Fixup only valid memory banks Memory banks with address 0 and size 0 are empty and should not be passed to the OS via device tree. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> and later again, though this time it was v2: commit ed5af03f9bb8905f1e94d68ab49f22d7f061d75f Author: Thierry Reding <treding@nvidia.com> AuthorDate: Thu Feb 15 19:05:59 2018 +0100 Commit: Tom Rini <trini@konsulko.com> CommitDate: Fri Feb 23 10:40:50 2018 -0500 fdt: Fixup only valid memory banks Memory banks with address 0 and size 0 are empty and should not be passed to the OS via device tree. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> The second version was slightly different, so the main hunk of the patch was applied twice. This isn't harmful because the code is idempotent, but it's wasteful to run the same code twice. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: pinctrl: Skip gpio-controller node in pinconfig_post_bind()Patrick Delaunay2019-04-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some binding define child node gpio-controller without compatible property. This patch avoid to bind the pinconfig uclass to these node. For example, the binding for st,stm32-pinctrl (./device-tree-bindings/pinctrl/st,stm32-pinctrl.txt) defines the GPIO controller/bank node as sub-node of pincontrol (st,stm32f429-pinctrl) but without compatible (as it is not mandatory). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: pinctrl: Avoid race condition on probe for UCLASS_PINCTRLPatrice Chotard2019-04-111-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of system with several pin-controller device, probe the first UCLASS_PINCTRL by seq number (defined by alias) to avoid race condition with I2C PINCONTROL driver for GPIO expander (GPIO expander need I2C bus, I2C driver need PINCONFIG). Signed-off-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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