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* Merge tag 'u-boot-amlogic-20200708' of ↵WIP/08Jul2020Tom Rini2020-07-0819-40/+777
|\ | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Add proper Odroid-N2 board support code - Add support for Odroid-C4 single board computer
| * ARM: dts: meson-sm1-odroid-c4: add ethernet PHY resetNeil Armstrong2020-07-081-0/+6
| | | | | | | | | | | | | | | | The PHY needs a reset in order to be functionnal for U-Boot, add the old PHY reset bindings for dwmac until we support the new bindings in the PHY node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * boards: amlogic: add Odroid C4 supportChristian Hewitt2020-07-085-1/+207
| | | | | | | | | | | | | | | | | | | | Odroid C4 is an Amlogic SM1 device, the board config and board documentation are adapted from the Odroid-N2 support from the same vendor. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> [narmstrong: fix odroid-c4.rst typos and structure] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1Christian Hewitt2020-07-0810-36/+501
| | | | | | | | | | | | | | | | This imports the changes and the new Odroid-C4 board from the Linux commit b3a9e3b9622a ("Linux 5.8-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * board: amlogic: Add Odroid-N2 board supportPascal Vizeli2020-07-085-3/+63
| | | | | | | | | | | | | | | | | | Add a proper Odroid-N2 board support to handle the Ethernet MAC address stored in the in-SoC eFuses. Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
* | gpio: fix test.py for gpio label lookupHeiko Schocher2020-07-083-0/+3
| | | | | | | | | | | | | | | | | | | | commit 2bd261dd1712 ("gpio: search for gpio label if gpio is not found through bank name") disabled DM_GPIO_LOOKUP_LABEL which is needed in sandbox defconfigs, as we have tests for this functionality. Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge tag 'u-boot-rockchip-20200708' of ↵WIP/07Jul2020Tom Rini2020-07-0720-13/+966
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - dts sync from kernel for rk3399 boards; - Add Radxa Rock Pi N8, N10; - Some feature update for Pinebook Pro;
| * | ARM: dts: rockchip: Add Radxa Rock Pi N8 initial supportJagan Teki2020-07-076-9/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VAMRC RK3288 SOM need to mount on top of radxa dalang carrier board for making Rock Pi N8 SBC. So, add initial support for Rock Pi N8 by including rk3288, rk3288 vamrc-som and raxda dalang carrier board dtsi files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: Add VMARC RK3288 SOM initial supportJagan Teki2020-07-071-0/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VMARC RK3288 SOM is a standard SMARC SOM design with Rockchip RK3288 SoC, which is designed by Vamrs. Specification: - Rockchip RK3288 - PMIC: RK808 - SD slot, 16GiB eMMC - 2xUSB-2.0, 1xUSB3.0 - USB-C for power supply - Ethernet, PCIe - HDMI, MIPI-DSI/CSI, eDP Add initial support for VMARC RK3288 SOM, this would use with associated carrier board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: radxa-dalang: Update sdmmc propertiesJagan Teki2020-07-072-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Radxa dalang carrier boards are used to mount vmarc SoM's of rk3399pro and rk3288 to make complete SBC. Among these combinations, card detection gpio, max-frequency properties are used with rk3399pro SoM but not required for rk3288 SoM based on the hardware schematics. So, let's move these sdmmc specific properties on associate vmarc dtsi to make common use of dalang carrier device tree file. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAMHugh Cole-Baker2020-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to guard against issues when used with TF-A versions that perform insufficient validation on the platform parameter. However, since commit 8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a device tree as platform parameter no longer causes problems for upstream TF-A for RK3399. Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using upstream TF-A, change the Kconfig option from select to imply. It'll still default to being selected but can be deselected by a user if they know they will be using a compatible version of TF-A. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Walter Lozano <walter.lozano@collabora.com>
| * | arm64: dts: rockchip: Add Radxa Rock Pi N10 initial supportJagan Teki2020-07-076-1/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has - VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VAMRC RK3399Pro SOM need to mount on top of radxa dalang carrier board for making Rock Pi N10 SBC. So, add initial support for Rock Pi N10 by including rk3399, rk3399pro vamrc-som and raxda dalang carrier board dtsi files. rk3399pro-rock-pi-n10.dts was synced from linux-next v5.7-rc1. Tested - ROCK PI N10 Model B - ROCK PI N10 Model C - Boot from SD Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: Sync v5.7-rc1 Radxa Dalang CarrierJagan Teki2020-07-071-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carrier board often referred as baseboard. For making complete SBC or any other industrial boards, these carrier boards will be used with associated SOMs. Radxa has Dalang carrier board which supports on-board peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI, eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc. Right now Dalang carrier board is used with two SBC-variants: Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board Rock Pi N8 => VMARC RK3288 SOM + Dalang carrier board(+codec) So add this carrier board dtsi as a separate file in ARM directory, so-that the same can reuse it in both rk3288, rk3399pro variants of Rockchip SOMs. Sync this dtsi from linux-next v5.7-rc1. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | arm64: dts: rockchip: Sync v5.7-rc1 VMARC RK3399Pro SOMJagan Teki2020-07-071-0/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VMARC RK3399Pro SOM is a standard SMARC SOM design with Rockchip RK3399Pro SoC, which is designed by Vamrs. Specification: - Rockchip RK3399Pro - PMIC: RK809-3 - SD slot, 16GiB eMMC - 2xUSB-2.0, 1xUSB3.0 - USB-C for power supply - Ethernet, PCIe - HDMI, MIPI-DSI/CSI, eDP Add initial support for VMARC RK3399Pro SOM, this would use with associated carrier board. Sync this dtsi from linux-next v5.7-rc1. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsiJagan Teki2020-07-071-0/+22
| | | | | | | | | | | | | | | | | | | | | Sync linux-next v5.7-rc1 rk3399pro.dtsi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: Fix SPI flash and store env on itPeter Robinson2020-07-073-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some minor fixes for SPI flash on the Pinebook Pro and also default to saving environment to the SPI flash as it's guaranteed to be on board. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (applied with make savedefconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: Fix USB and the USB attached keyboardPeter Robinson2020-07-072-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The built in keyboard on the Pinebook Pro is attached via USB so fix this up to ensure USB works as expected. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: enable rng to provide an entropy sourcePeter Robinson2020-07-073-0/+10
| | | | | | | | | | | | | | | | | | | | | Enable the rng so UEFI can provide entropy for KASLR Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rockpro64: initialize USB in prebootMarcin Juszkiewicz2020-07-071-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With video output enabled and USB keyboard supported there is no need for serial console. So let initialize USB subsystem so keyboard connected to board (either directly or via hub) can be used to interrupt autoboot. U-Boot TPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200) Trying to boot from SPI U-Boot 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200) SoC: Rockchip rk3399 Reset cause: RST Model: Pine64 RockPro64 v2.1 DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: vidconsole Err: vidconsole Model: Pine64 RockPro64 v2.1 Net: eth0: ethernet@fe300000 starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3a0000: USB OHCI 1.0 Bus usb@fe3c0000: USB EHCI 1.00 Bus usb@fe3e0000: USB OHCI 1.0 Bus dwc3: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus dwc3: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Hit any key to stop autoboot: 0 => Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | Merge branch '2020-07-07-misc-new-features'Tom Rini2020-07-0746-65/+699
|\ \ | | | | | | | | | | | | | | | | | | | | | - Improve s700 SoC support - Fix building with clang on ARM. - Juno platform updates - fs/dm cmd improvements - Other assorted improvements / fixes
| * | arm: juno: Enable SATA controllerWIP/2020-07-07-misc-new-featuresAndre Przywara2020-07-071-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe SATA controller soldered on the board, providing two SATA ports. Enable the driver and the sata command in the defconfig, to be able to load images from SATA disks. Tested by loading kernels and Grub/EFI from an SSD and successfully booting a Linux system (with and without using UEFI). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | arm: juno: Enable PCIAndre Przywara2020-07-072-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Juno boards in their -r1 and -r2 variants sport a PCIe controller, which we configure already in board specific code to be ECAM compliant. Hence we can just enable the generic ECAM driver to let U-Boot use PCIe devices. Add the respective options to the Juno defconfig to enable the PCI framework and the generic ECAM driver, and initialise the driver upon loading U-Boot. Make some functions in the Juno PCIe init code static on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | sata_sil: Enable DM_PCI operationAndre Przywara2020-07-072-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the sata_sil driver was converted over to the driver model, it still assumed that the PCI controller is using the legacy interface. Allow the "devno" member to be a struct udevice pointer and use DM_PCI_COMPAT to covert the rest of the interface. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | arm: juno: Enable DM_ETHAndre Przywara2020-07-072-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The smc911X driver is now DM enabled, so we can switch the Juno board over to use DM_ETH for the on-board Fast Ethernet device. Works out of the box by using the DT. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | net: smc911x: Properly handle EEPROM MAC addressAndre Przywara2020-07-071-24/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiled as a DM_ETH driver, the scm911x driver was reading the MAC address from the optional EEPROM storage, but failed to copy this to the platdata struct. Since it was also missing a definition of the read_rom_hwaddr() function, the generic Ethernet code was dismissing this MAC address, falling back to a random address or denying to start at all. Add an implementation of .read_rom_hwaddr, and refactor the function reading the ROM address to be called by all interested parties. This fixes MAC address issues when using the driver in DM_ETH "mode". Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | net: dm: Remove warning about EEPROM provided MAC addressAndre Przywara2020-07-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM provided MAC address") this removes the somewhat awkward "warning" on boards using DM_ETH: In many parts of the computing world having a unique MAC address sitting in some on-NIC storage is considered the normal case. If there is a properly provided MAC address (either from ROM or from DT), remove the warning to not scare the user unnecessarily. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | arm: vexpress64: Fix counter frequencyAndre Przywara2020-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz crystal oscillator, so the frequency is not 25165824 MHz, as the current code suggests. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | arm: use correct argument size of special registersHeinrich Schuchardt2020-07-071-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compiling with clang on ARMv8 shows errors like: ./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w" asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc"); ^~ %w0 These errors are due to using an incorrect size for the variables used for writing to and reading from special registers which have 64 bits on ARMv8. Mask off reserved bits when reading the exception level. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | arm: remove outdated comment concerning -ffixed-x18Heinrich Schuchardt2020-07-071-4/+0
| | | | | | | | | | | | | | | | | | | | | Clang 9 supports -ffixed-x18. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | trace: clang compatible handling of gd registerHeinrich Schuchardt2020-07-071-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM systems gd is stored in register r9 or x18. When compiling with clang gd is defined as a macro calling function gd_ptr(). So we can not make assignments to gd. Use function set_gd() for setting the register on ARM. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fs: fat_write: fix short name creation.Heinrich Schuchardt2020-07-071-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Truncate file names if the buffer size is exceeded to avoid a buffer overflow. Use Sphinx style function description. Add a TODO comment. Reported-by: CID 303779 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | test_sleep.py: make sleep time and margin configurableHeiko Schocher2020-07-071-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | make the sleep time and the margin configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | gpio: search for gpio label if gpio is not found through bank nameHeiko Schocher2020-07-073-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dm_gpio_lookup_name() searches for a gpio through the bank name. But we have also gpio labels, and it makes sense to search for a gpio also in the labels we have defined, if no gpio is found through the bank name definition. This is useful for example if you have a wp pin on different gpios on different board versions. If dm_gpio_lookup_name() searches also for the gpio labels, you can give the gpio an unique label name and search for this label, and do not need to differ between board revisions. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Don't enable by default] Signed-off-by: Tom Rini <trini@konsulko.com>
| * | configs: Enable mac and phy configsAmit Singh Tomar2020-07-071-0/+4
| | | | | | | | | | | | | | | | | | | | | This patch adds MAC and PHY related configs (needed for proper ethernet operations) for Action Semi S700 SoC. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | owl: Kconfig: Enable DM eth for OWL platformAmit Singh Tomar2020-07-071-0/+1
| | | | | | | | | | | | | | | | | | | | | This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model) for Action semi owl SoC. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | arm: dts: s700: add node for ethernet controllerAmit Singh Tomar2020-07-071-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds node for ethernet controller found on Action Semi OWL S700 SoC. Since, there is no upstream Linux binding exist for S700 ethernet controller, Changes are put in u-boot specific dtsi file. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | net: designware: s700: Add glue code for S700 macAmit Singh Tomar2020-07-074-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchs adds glue logic to enable designware mac present on Action Semi based S700 SoC, Configures SoC specific bits. Undocumented bit that programs the PHY interface select register comes from vendor source. It has been tested on Cubieboard7-lite based on S700 SoC. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx ↵Amit Singh Tomar2020-07-072-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timings RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have specific Rx/Tx interface timings requirement for proper PHY operations. These timing values are not documented anywhere and picked from vendor code. This commits lets proper packets to be transmitted over the network. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | net: phy: realtek: Add support for RTL8201F PHY module.Amit Singh Tomar2020-07-071-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Realtek PHY RTL8201F 10/100Mbs (with variants: RTL8201FN and RTL8201FL) PHYceiver. It is present on Actions Semi Cubieboard7 board. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | clk: actions: Add Ethernet clocksAmit Singh Tomar2020-07-074-2/+15
| | | | | | | | | | | | | | | | | | | | | This commit adds clocks needed for ethernet operations for Actions OWL family of SoCs (S700 and S900). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * | arm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCsAmit Singh Tomar2020-07-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that, we calculate SDRAM size by reading DDR registers, "CONFIG_SYS_SDRAM_SIZE" is no more needed. This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration file. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | Actions: OWL: Calculate SDRAM sizeAmit Singh Tomar2020-07-071-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate the SDRAM size from DDR capacity register registers instead of using hard-coded value. This is quite useful to get correct size on differnt boards based on Actions OWL family of SoCs (S700 and S900). There is no documentation available that talks about DDR registers, and this is very much taken from vendor source. This commit lets Linux boot on Cubieboard7-lite(based on S700). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | image: Add support for ZSTD decompressionRobert Marko2020-07-072-0/+53
| | | | | | | | | | | | | | | | | | | | | This patch adds support for ZSTD decompression of FIT images. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | cmd: blkls: Add blkls commandNiel Fourie2020-07-074-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a command to print a list of available block device drivers, and for each, the list of known block devices. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * | cmd: dm: Fixed/Added DM driver listing subcommandsNiel Fourie2020-07-074-4/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renamed dm "drivers" subcommand to "compat" (as it listed compatibility strings) and prevent it from segfaulting when drivers have no of_match populated. Added a new "drivers" subcommand to dump a list of all known DM drivers and for each, their uclass id, uclass driver and names of attached devices. Added a new "static" subcommand to dump a list of DM drivers with statically defined platform data. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | cmd: fs: Add command to list supported fs typesNiel Fourie2020-07-074-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added command "fstypes" to list supported/included filesystems. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Limit to sandbox] Signed-off-by: Tom Rini <trini@konsulko.com>
| * | cmd: part: Add subcommand to list supported partition tablesNiel Fourie2020-07-072-2/+39
|/ / | | | | | | | | | | | | | | | | Add a subcommand "types" to the part command, which lists the supported partition table types. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'u-boot-stm32-20200707' of ↵Tom Rini2020-07-0739-460/+1166
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - arch and board update for stm32mp15: - use OPP information in device tree for 800MHz/650MHz support - ram: inprovments of test command - solve boot on closed chip when access to DBGMCU_IDC is protected - stm32prog command: Add "device anme" during USB enumeration - update configs: activate WATCHDOG and 'env erase' command, increase teed partition, support SD card after NOR boot by default and use env info in env_check - some sboard cleanups: gpio hog in dh board, specific driver for type-c stusb1600 controller code in a driver move part of code in spl.c and in common directory - fix STM32 compatible for dwc_eth_qos driver - support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx drivers - vrefbuf: fix a possible overshoot when re-enabling
| * | ram: stm32mp1: add size and addr parameter to test allPatrick Delaunay2020-07-071-3/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add size and addr parameter to test "All" to override the default value (4kB and STM32_DDR_BASE) used in tests with these optional parameters: [size] or [addr]. When other optional parameters are present before [addr], they are replaced by default value: - [loop] = "1" - [pattern] = "-" (new: force default pattern) Example to use: DDR>test 0 1 0x20000 DDR>test 0 1 0x1000000 0xD0000000 Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | ram: stm32mp1: use the DDR size by default in the test addressBusPatrick Delaunay2020-07-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The test 4 = "AddressBus [size] [addr]" without parameter detects alias for any address bit only when: - size = real size of DDR - addr = start of DDR = 0xC0000000 These value must be the default value when parameters are absent. This patch sets bufsize to STM32_DDR_SIZE and get_bufsize() selects the correct value for bufsize when this parameter is absent = full size of the DDDR On EV1 board : DDR> test 4 running at 0xC0000000 length 0x40000000 On DK2 board DDR> test 4 running at 0xC0000000 length 0x20000000 Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>