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* fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1Marek Behún2021-03-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the btrfs_read_fs_root() function is searching a ROOT_ITEM with location key offset other than -1, it currently fails via BUG_ON. The offset can have other value than -1, though. This can happen for example if a subvolume is renamed: $ btrfs subvolume create X && sync Create subvolume './X' $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$ location key (270 ROOT_ITEM 18446744073709551615) type DIR transid 283 data_len 0 name_len 1 name: X $ mv X Y && sync $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$ location key (270 ROOT_ITEM 0) type DIR transid 285 data_len 0 name_len 1 name: Y As can be seen the offset changed from -1ULL to 0. Do not fail in this case. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: David Sterba <dsterba@suse.com> Cc: Qu Wenruo <wqu@suse.com> Cc: Tom Rini <trini@konsulko.com>
* uboot-test-hooks: Switch to our GitLab instanceWIP/28Feb2021Tom Rini2021-02-283-3/+3
| | | | | | | | As Stephen is no longer actively maintaining the uboot-test-hooks repository, switch to using the instance on our GitLab. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Correct U-Boot upstream repositoryHeinrich Schuchardt2021-02-2812-67/+67
| | | | | | | The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge tag 'efi-2021-04-rc3-2' of ↵Tom Rini2021-02-276-12/+24
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-04-rc3-2 Bug fixes: * debug build for mkeficapsule * limit output length for VenHw, VenMedia * ACPI tables must be in EfiACPIReclaimMemory
| * cmd/efidebug: add firmware management protocol GUIDHeinrich Schuchardt2021-02-261-0/+4
| | | | | | | | | | | | | | Add missing GUID short text used in the efidebug tables and efidebug dh sub-commands. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: fix documentation in efi_loader.hHeinrich Schuchardt2021-02-261-7/+13
| | | | | | | | | | | | Correct missing descriptions and typos in efi_loader.h. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: limit output length for VenHw, VenMediaHeinrich Schuchardt2021-02-261-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | VenHw and VenMedia device path nodes may carry vendor defined data of arbitrary length. When converting a device path node to text ensure that we do not overrun our internal buffer. In our implementation of EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() we could first determine the output length and then allocate buffers but that would nearly double the code size. Therefore keep the preallocated buffers and truncate excessive device paths instead. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * tools/mkeficapsule.c: fix DEBUG buildKlaus Heinrich Kiwi2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix a missing comma sign (,) from a printf(), that is only reachable if DEBUG is defined, in which case the build fails with: tools/mkeficapsule.c:266:36: error: expected ‘)’ before ‘bin’ 266 | printf("\tbin: %s\n\ttype: %pUl\n" bin, guid); | ^~~~ | ) Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * MAINTAINERS: assign tools/mkeficapsule.c to EFI PAYLOADHeinrich Schuchardt2021-02-261-0/+1
| | | | | | | | | | | | | | tools/mkeficapsule.c is used to prepare test files for testing the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: ACPI tables must be in EfiACPIReclaimMemoryHeinrich Schuchardt2021-02-261-2/+1
| | | | | | | | | | | | | | | | | | | | | | The UEFI spec does not allow ACPI tables to be in runtime services memory. It recommends EfiACPIReclaimMemory. Remove a superfluous check that the allocated pages are 16 byte aligned. EFI pages are 4 KiB aligned. Fixes: 86df34d42b05 ("efi_loader: Install ACPI configuration tables") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbWIP/26Feb2021Tom Rini2021-02-2621-158/+543
|\ \ | | | | | | | | | - fastboot updates / fixes
| * | usb: gadget: dwc2_udc_otg: Fix dwc2_gadget_start() and ↵Patrice Chotard2021-02-261-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_gadget_register_driver() Since commit 8745b9ebccae ("usb: gadget: add super speed support") ums was no more functional on platform which use dwc2_udc_otg driver. This was due to a too restrictive test which checked that the gadget driver speed was either FS or HS. So all gadget driver with max speed set to speed higher than HS (SS in case of composite gadget driver in our case) are not allowed, which is wrong. Update the speed test in usb_gadget_register_driver() and in dwc2_gadget_start() to allow all gadget driver speed equal or higher than FS. Tested on stm32mp157c-ev1 board. Fixes: c791c8431c34 ("usb: dwc2: convert driver to DM_USB_GADGET") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | usb: kbd: Also accept keyboards with Interrupt OUT endpointStefan Brüns2021-02-261-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OUT endpoint can just be ignored as it is not used, just as the corresponding Set_Report request for IN-only interfaces. E.g. the Linux gadget hid keyboard also provides an interrupt endpoint. Also cleanup confusing debug messages like "found set protocol", which is printed when a keyboard device is found, while the Set_Protocol request is issued quite some time later. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | fastboot: add UUU command UCmd and ACmd supportHeiko Schocher2021-02-266-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for the UUU commands ACmd and UCmd. Enable them through the Kconfig option CONFIG_FASTBOOT_UUU_SUPPORT base was commit in NXP kernel 9b149c2a2882: ("MLK-18591-3 android: Add FSL android fastboot support") and ported it to current mainline. Tested this patch on imx6ul based board. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | doc: Document partition specificationsSean Anderson2021-02-263-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | This documents the way U-Boot understands partitions specifications. This also updates the fastboot documentation for the changes in the previous commit. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | doc: Rename k210 partitions anchorSean Anderson2021-02-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This anchor is only for the k210 partition layout, so rename it appropriately. This keeps it from conflicting with the (to be added) anchor for U-Boot partitions in general. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fastboot: Allow u-boot-style partitionsSean Anderson2021-02-262-62/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for partitions of the form "dev.hwpart:part" and "dev#partname". This allows one to flash to eMMC boot partitions without having to use CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT. It also allows one to flash to an entire device without needing CONFIG_FASTBOOT_MMC_USER_NAME. Lastly, one can also flash MMC devices other than CONFIG_FASTBOOT_FLASH_MMC_DEV. Because devices can be specified explicitly, CONFIG_FASTBOOT_FLASH_MMC_DEV is used only when necessary for existing functionality. For those cases, fastboot_mmc_get_dev has been added as a helper function. This allows There should be no conflicts with the existing system, but just in case, I have ordered detection of these names after all existing names. The fastboot_mmc_part test has been updated for these new names. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fastboot: Move part_get_info_by_name_or_alias after raw_part_get_info_by_nameSean Anderson2021-02-261-22/+22
| | | | | | | | | | | | | | | | | | | | | This makes the next commit more readable by doing the move now. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fastboot: Remove mmcpart argument from raw_part_get_info_by_nameSean Anderson2021-02-261-23/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only thing mmcpart was used for was to pass to blk_dselect_hwpart. This calls blk_dselect_hwpart directly from raw_part_get_info_by_name. The error handling is dropped, but it is reintroduced in the next commit (albeit less specificly). Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | part: Support string block devices in part_get_info_by_dev_and_nameSean Anderson2021-02-261-19/+22
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for things like "#partname" and "0.1#partname". The block device parsing is done like in blk_get_device_part_str. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | part: Support getting whole disk from part_get_info_by_dev_and_name_or_numSean Anderson2021-02-263-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | This adds an option to part_get_info_by_dev_and_name_or_num to allow callers to specify whether whole-disk partitions are fine. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | part: Give several functions more useful return valuesSean Anderson2021-02-261-22/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Several functions in disk/part.c just return -1 on error. This makes them return different errnos for different failures. This helps callers differentiate between failures, even if they cannot read stdout. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | test: dm: Add test for fastboot mmc partition namingSean Anderson2021-02-264-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | This test verifies the mapping between fastboot partitions and partitions as understood by U-Boot. It also tests the creation of GPT partitions, though that is not the primary goal. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: sandbox: Add support for writingSean Anderson2021-02-262-11/+51
| |/ | | | | | | | | | | | | | | | | | | This adds support writing to the sandbox mmc backed by an in-memory buffer. The unit test has been updated to test reading, writing, and erasing. I'm not sure what MMCs erase to; I picked 0, but if it's 0xFF then that can be easily changed. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini2021-02-266-36/+113
|\ \ | | | | | | | | | | | | - new GigaDevice flash ids - fixes for imx, nxp_spi drivers
| * | mtd: nand: spi: Support GigaDevice GD5F1GQ5UExxGReto Schneider2021-02-261-10/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The relevant changes to the already existing GD5F1GQ4UExxG support has been determined by consulting the GigaDevice product change notice AN-0392-10, version 1.0 from November 30, 2020. As the overlaps are huge, variable names have been generalized accordingly. Apart form the lowered ECC strength (4 instead of 8 bits per 512 bytes), the new device ID, and the extra quad IO dummy byte, no changes had to be taken into account. New hardware features are not supported, namely: - Power on reset - Unique ID - Double transfer rate (DTR) - Parameter page - Random data quad IO The inverted semantic of the "driver strength" register bits, defaulting to 100% instead of 50% for the Q5 devices, got ignored as the driver has never touched them anyway. The no longer supported "read from cache during block erase" functionality is not reflected as the current SPI NAND core does not support it anyway. Implementation has been tested on MediaTek MT7688 based GARDENA smart Gateways using both, GigaDevice GD5F1GQ5UEYIG and GD5F1GQ4UBYIG. Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: nand: spi: Only one dummy byte in QUADIOHauke Mehrtens2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The datasheet only lists one dummy byte in the 0xEB operation for the following chips: * GD5F1GQ4xExxG * GD5F1GQ4xFxxG * GD5F1GQ4UAYIG * GD5F4GQ4UAYIG Reto Schneider: - Linux patch ported to U-Boot - Checked for compatibility with GD5F1GQ4xBxxG - Fixed operation code in original commit message (0xEH -> 0xEB) Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: spi-nor-core: Fix typo in documentationSean Anderson2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This line should come before the docs for the next function. Fixes: 7aeedac0153 ("mtd: spi: Port SPI NOR framework from Linux") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | cmd: sf: Print error on test failureSean Anderson2021-02-261-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sf test command is used to test spi flashes (and spi masters). Printing the exact error code is very helpful to those debugging the spi stack. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | cmd: sf: Display errno on erase failureSean Anderson2021-02-261-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is an error while erasing SPI flash, no errno is displayed. This makes it difficult to determine the cause of the error. This change mirrors the logic for write errors above. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: nxp_fspi: Fix error reportingAdam Ford2021-02-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the i.MX8M Mini, ret = clk_set_rate() sets ret to the value of the rate the clock was able to set. When checking for errors, it only checks that it is not NULL. Since positive numbers are not errors, only check for negative numbers when handling errors. Fixes: 383fded70c4f ("spi: nxp_fspi: new driver for the FlexSPI controller") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: spi-nor-ids: Add support of flash protection to w25q128Su Baocheng2021-02-261-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents various models. From Winbond's website, I could only find 3 types of them: W25Q128JV-IQ/JQ datasheet:https://www.winbond.com/resource-files/ w25q128jv%20revg%2004082019%20plus.pdf W25Q128FV (SPI Mode) datasheet: https://www.winbond.com/resource-files/ w25q128fv%20rev.m%2005132016%20kms.pdf W25Q128BV datesheet: https://www.winbond.com/resource-files/ w25q128bv_revh_100313_wo_automotive.pdf According to the datasheets, all of these 3 types support BP(0,1,2) and TB bits in the status register (SR), so it could reuse the flash protection logic for ST Micro. So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB flags to the w25q128 entry of spi_nor_ids table. Signed-off-by: Su Baocheng <baocheng.su@siemens.com> [jagan: remove comments in spi-nor-ids.c] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: spi-nor.h: Change spaces to tabsBin Meng2021-02-261-10/+10
| | | | | | | | | | | | | | | | | | | | | U-Boot coding convention prefers tabs over spaces. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | mtd: spi-nor-ids: Add Gigadevice GD25LQ64CAlper Nebi Yasak2021-02-261-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add GD25LQ24C 64Mbit chip to spi-nor id table. This chip is used on rk3399-gru-kevin: => sf probe SF: Detected gd25lq64c with page size 256 Bytes, erase size 4 KiB, total 8 MiB => sf erase 0x600000 0x200000 SF: 2097152 bytes @ 0x600000 Erased: OK => sf test 0x700000 0x1000 SPI flash test: 0 erase: 52 ticks, 76 KiB/s 0.608 Mbps 1 check: 5 ticks, 800 KiB/s 6.400 Mbps 2 write: 14 ticks, 285 KiB/s 2.280 Mbps 3 read: 3 ticks, 1333 KiB/s 10.664 Mbps Test passed 0 erase: 52 ticks, 76 KiB/s 0.608 Mbps 1 check: 5 ticks, 800 KiB/s 6.400 Mbps 2 write: 14 ticks, 285 KiB/s 2.280 Mbps 3 read: 3 ticks, 1333 KiB/s 10.664 Mbps The values are the same as in Linux, except adjusted for the U-Boot definition of INFO(). Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: imx: Implement set_speedMarek Vasut2021-02-261-1/+4
| |/ | | | | | | | | | | | | | | | | The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge tag 'u-boot-stm32-20210226' of ↵Tom Rini2021-02-264-80/+13
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Add USB host boot support in stm32mp1 config - Enable uefi related commands for STMicroelectronics STM32MP15 boards - Remove duplicate uart nodes in stm32mp15 device tree
| * | configs: stm32mp1: enable uefi related commandsIlias Apalodimas2021-02-262-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board can boot with UEFI. With the latest changes in U-Boot's EFI subsystem we also have support for EFI runtime variables, without SetVariable support. We can also store the EFI variables in a file on the ESP partition and preserve them across reboots. The env and efidebug commands are missing in order to configure EFI variables and the efibootmgr though. Since U-Boot's default config enables other EFI related commands (e.g bootefi), let's add the env related and efidebug commands and allow users to do that Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | arm: dts: stm32mp15: remove duplicate uart nodesPatrick Delaunay2021-02-261-80/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated uart nodes introduced with commit 62f95af92a3f ("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4"), because the uart nodes wasn't correctly ordered in alphabetic order. Only cosmetic: the generated device tree don't change. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | ARM: stm32: Add USB host boot supportMarek Vasut2021-02-261-0/+7
| |/ | | | | | | | | | | | | | | | | | | Add support for booting from USB pen drive, since USB host port is available on the STM32MP1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-02-2622-53/+123
|\ \ | | | | | | | | | | | | | | | | | | | | | - turris_mox: Enhancements, mostlly defconfig changes (Pali) - pci-aardvark: Set Max Payload Size and Max Read Request Size to 512 bytes (Pali) - pci_mvebu: Minor cleanup and refactoring (Marek) - Upgrade A38x DDR3 training to version 14.0.0 (Marek)
| * | ddr: marvell: a38x: fix comment in conditional macroMarek Behún2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code was processed with unifdef utility to omit portions not relevant to A38x and DDR3. This removes usage of many macros, including A70X0, A80X0 and A3900. It seems that the unifdef utility did not remove the macros from #else comment. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: bump version to 14.0.0Marek Behún2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bump version of a38x DDR3 trianing to version 14.0.0 to reflect the version in the mv-ddr-devel branch of upstream repository https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. There is a new version numbering system, where after 18.12.0 came 1.0.0, 2.0.0, and so on until 14.0.0. So 14.0.0 is newer than 18.12.0. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: enum mv_ddr_twin_die: change orderheaterC2021-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 56db5d1464b44df10a02b99e615ebd6f6a35c428 upstream. @pali suggested this change In commit 6285efb ("mv_ddr: add support for twin-die combined memory device") was added support for twin-die combined memory device and default value for explicitly uninitialized structure members is zero, s also twin_die_combined is initialized to zero. Which means COMBINED value. As prior this commit there was no support for twin-die combined memory device, default value for twin_die_combined should be NOT_COMBINED. This change change order of enum mv_ddr_twin_die to ensure that NOT_COMBINED has value zero. Signed-off-by: heaterC <airyguy@gmx.de> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: import code change from upstreamMarek Behún2021-02-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 2bdd12dd68b1f8e27a03a3443ae49a09a14c18e4 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes code in ddr3_training.c. Import this change to remain consistent with upstream. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: fix memory cs size functionMoti Buskila2021-02-262-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c8b301463d508c807a33f7b7eaea98bbda4aa35e upstream. The funtion returnd cs size in byte instead of MB, that cause calculation error since the caller was expected to get u32 and when he got above 4G it refers it as 0. The fix was to get the cs memory size from function as in MB and then multiply it by 1MB. Signed-off-by: Moti Buskila <motib@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: import header change from upstreamMarek Behún2021-02-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d653b305d0b3da9727c49124683f1a6d95d5c9a5 upstream. The commit mentioned above changes non-DDR3 stuff in upstream, but it also changes header ddr_topology_def.h. Import this header change to remain consistent with upstream. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bitMoti Buskila2021-02-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream. WL phase correcion stage is failing while using bus_width of 16bit, not to be fix this stage is un-necessary when working with bus_width of 16 bit. Signed-off-by: Moti Buskila <motib@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: add support for twin-die combined memory deviceMoti Buskila2021-02-269-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream. the twin-die combined memory device should be treatened as X8 device and not as X16 one Signed-off-by: Moti Buskila <motib@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> [ - the default value for twin_die_combined is set to NOT_COMBINED for all boards, as this was default behaviour prior this change ] Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: add 16Gbit memory devices supportMoti Buskila2021-02-262-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | commit 994509eb4fe6771d92cd06314c37895098ac48fa upstream. Signed-off-by: Moti Buskila <motib@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
| * | ddr: marvell: a38x: allow board specific ODT configurationBaruch Siach2021-02-262-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 2d3b9437cf38c06c4330e0de07f29476197f5e04 upstream. The ODT enable heuristic based on active chip-selects is not always correct. Some board might use two chip-selects, but have only one ODT line connected. Allow board specific mv_ddr_topology_map to directly set the ODT configuration register value. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Moti Buskila <motib@marvell.com> Reviewed-by: Nadav Haklai <Nadav.Haklai@cavium.com> Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>