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* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-08-2577-94/+34981
|\ | | | | | | | | | | | | - Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel) - Infrastructure changes to PCI uclass to support these SoC's (Suneel) - Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel) - Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
| * x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LENStefan Roese2020-08-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the upcoming increase of the malloc area in U-Boot ("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU x86 test fails: U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000) alloc space exhausted Error binding driver 'cpu_qemu': -12 Some drivers failed to bind alloc space exhausted initcall sequence fff6a760 failed at call fff13b3d (err=-19) This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is already used on qemu-x86_64_defconfig. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * arm: octeontx2: Add support for OcteonTX2 SoC platformsSuneel Garapati2020-08-2518-0/+1105
| | | | | | | | | | | | | | | | | | This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * arm: octeontx: Add support for OcteonTX SoC platformsSuneel Garapati2020-08-2517-0/+1104
| | | | | | | | | | | | | | | | | | This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * watchdog: Add reset support for OcteonTX / TX2Suneel Garapati2020-08-253-0/+77
| | | | | | | | | | | | | | | | | | Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati2020-08-254-0/+4114
| | | | | | | | | | | | | | | | | | Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
| * pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati2020-08-253-0/+373
| | | | | | | | | | | | | | | | | | Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati2020-08-251-0/+15
| | | | | | | | | | | | | | | | For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: octeontx2: Add headers for OcteonTX2Suneel Garapati2020-08-2513-0/+25948
| | | | | | | | Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
| * arm: octeontx: Add headers for OcteonTXSuneel Garapati2020-08-257-0/+1828
| | | | | | | | | | Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: include/asm/io.h: Add 64bit clrbits and setbits helpersSuneel Garapati2020-08-251-0/+16
| | | | | | | | | | | | | | Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: pci-uclass: Check validity of ofnodeSuneel Garapati2020-08-251-3/+7
| | | | | | | | | | | | | | | | Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati2020-08-252-0/+35
| | | | | | | | | | | | | | | | | | If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati2020-08-252-5/+65
| | | | | | | | | | | | | | | | | | Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati2020-08-253-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati2020-08-251-6/+18
| | | | | | | | | | | | | | | | | | If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati2020-08-256-5/+43
| | | | | | | | | | | | | | | | | | | | Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati2020-08-251-1/+2
| | | | | | | | | | | | | | | | | | | | Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati2020-08-251-2/+2
| | | | | | | | | | | | | | | | | | Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
| * pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese2020-08-252-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
| * ARM: renesas: Drop unnecessary function ft_board_setup()Stefan Roese2020-08-251-47/+0
| | | | | | | | | | | | | | | | | | | | Marek explained on IRC, that ft_board_setup() is not used / necessary at all. So its best to just drop it completely, as it interferes with the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed). Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese2020-08-251-16/+1
| | | | | | | | | | | | | | | | | | | | | | Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
| * dm: core: Add API to read PCI bus-range propertyStefan Roese2020-08-252-0/+29
| | | | | | | | | | | | | | Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * fdtdec: Add API to read pci bus-range propertySuneel Garapati2020-08-252-0/+29
| | | | | | | | | | | | | | | | Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'i2c-bugfixes-for-v2020.10' of ↵Tom Rini2020-08-253-35/+28
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for v2020.10 - fix some issues with octeon_i2c driver on ARM Octeon TX2 - fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
| * | Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954xTrommel, Kees (Contractor)2020-08-252-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix for the case of a U-Boot configuration with CONFIG_SPL, CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because dm_write_i2c does not exist because CONFIG_SPL_DM is not defined. Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com> Cc: Heiko Schocher <hs@denx.de>
| * | i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 supportStefan Roese2020-08-251-33/+26
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a few issues noticed, when testing this new driver on ARM Octeon TX2 again. Here the details: - Remove "common.h" header inclusion - Use correct THP define on Octeon TX2 - Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi" compatible and add a check to the Octeon TX2 specific "cavium,thunderx-i2c" so that the correct driver data is selected. - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Merge tag 'u-boot-rockchip-20200820' of ↵Tom Rini2020-08-254-2/+20
|\ \ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3399 evb sdcard support - Fix for SPL_LED support
| * | rockchip: firefly-rk3288: Fix the code support for SPL_LEDKever Yang2020-08-211-1/+3
| | | | | | | | | | | | | | | | | | Fix the build error for the wrong code when CONFIG_SPL_LED is enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rk3188: Fix the code support for SPL_LEDKever Yang2020-08-211-1/+3
| | | | | | | | | | | | | | | | | | Fix the build error for the wrong code when CONFIG_SPL_LED is enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: config: evb-rk3399: Add rockchip dwmmc supportKever Yang2020-08-211-0/+1
| | | | | | | | | | | | | | | | | | This enable support for SD card on evb-rk3399. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: dts: rk3399-evb: add sdmmc nodeKever Yang2020-08-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | The sdmmc node is missing after the dts sync patch: 167efc2c7a arm64: dts: rk3399: Sync v5.7-rc1 from Linux But we still need it for boot from SD card, so add it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2020-08-2512-5/+197
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
| * | | cmd: provide command sbiHeinrich Schuchardt2020-08-255-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a command to display information about the SBI implementation. The output might look like: => sbi SBI 0.2 OpenSBI Extensions: sbi_set_timer sbi_console_putchar sbi_console_getchar sbi_clear_ipi sbi_send_ipi sbi_remote_fence_i sbi_remote_sfence_vma sbi_remote_sfence_vma_asid sbi_shutdown SBI Base Functionality Timer Extension IPI Extension RFENCE Extension Hart State Management Extension The command can be used to construct a unit test checking that the communication with the SEE is working. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
| * | | configs: defconfig for Sipeed Maix in S-modeHeinrich Schuchardt2020-08-253-1/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a defconfig that can be used to build U-Boot for the Maix boards running upon OpenSBI. Update the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
| * | | riscv: fix building with CONFIG_SPL_SMP=nHeinrich Schuchardt2020-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building with CONFIG_SPL_SMP=n results in: arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’: arch/riscv/lib/spl.c:33:6: error: unused variable ‘ret’ [-Werror=unused-variable] 33 | int ret; | ^~~ Define the variable ret as __maybe_unused. Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL") Fixes: 8c59f2023cc8 ("riscv: add SPL support") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
| * | | clk: kendryte/pll.h: do not redefine nop()Heinrich Schuchardt2020-08-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kendryte PLL code uses nop as barrier. The macro is not defined for the sandbox on x86 but is defined on RISC-V. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
| * | | ram: sifive: Fix compiler warnings for 32-bitBin Meng2020-08-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | priv->info.size is of type 'size_t' but the length modifier is l. Fix this by casting priv->info.size. Note 'z' cannot be used as the modifier as SPL does not support that. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
| * | | riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng2020-08-251-1/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | At present fdtdec_get_addr() is used to get L2 cache controller base address. This only works for a fixed #address-cells and #size-cells. Change to use fdtdec_get_addr_size_auto_parent() instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
* | | Merge branch '2020-08-24-misc-improvements'Tom Rini2020-08-2542-176/+838
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Squashfs compression support - Coverity fixes - XEN guest updates - Finish previous MediaTek updates - Arm Total Compute platform support
| * | | xen: Code style conformityWIP/2020-08-24-misc-improvementsAnastasiia Lukianenko2020-08-244-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleaning up the following: ERROR: do not use assignment in if condition #281: FILE: drivers/xen/pvblock.c:260: + if ((err = xenbus_switch_state(XBT_NIL, nodename, CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err" #52: FILE: drivers/xen/pvblock.c:298: + if (err != NULL) { ERROR: do not use assignment in if condition #176: FILE: drivers/xen/gnttab.c:103: + if ((flags = nflags) & (GTF_reading | GTF_writing)) { WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #329: FILE: include/xen/gnttab.h:1: +/* WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead #330: FILE: include/xen/gnttab.h:2: + * SPDX-License-Identifier: GPL-2.0 ERROR: do not use assignment in if condition #630: FILE: lib/sscanf.c:558: + if ((n = inr) < width) { Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | board: xen: Remove unnecessary CONFIG_INITRD_TAG and CONFIG_CMDLINE_TAGAnastasiia Lukianenko2020-08-241-3/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | board: xen: Remove CONFIG_CMD_RUN define and clean xenguest_arm64_defconfigAnastasiia Lukianenko2020-08-242-50/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CMD_RUN is set on by default in Kconfig. Create xenguest_arm64_defconfig by using savedefconfig to avoid unnecessary options. Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | MAINTAINERS: Add maintainers to XEN sectionAnastasiia Lukianenko2020-08-242-1/+18
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | board: xen: Remove unnecessary CONFIG_BOARD_EARLY_INIT_F define and ↵Anastasiia Lukianenko2020-08-242-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | board_early_init_f function Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | | arm: dts: mt7623: add USB nodesFrank Wunderlich2020-08-242-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds USB nodes for MT7623/BPI-R2 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
| * | | arm: dts: mt7622: add USB nodesFrank Wunderlich2020-08-243-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DTS nodes for MT7622/BPI-R64 Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
| * | | arm: dts: rename mt7622-bpi-r64.dtsFrank Wunderlich2020-08-242-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | rename mt7622-bpi-r64.dts to mt7622-bananapi-bpi-r64.dts to follow naming convensions Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
| * | | clk: mt7622: add needed clocks for ssusb-nodeFrank Wunderlich2020-08-241-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | MT7622 needs additional clock definitions to work properly Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
| * | | ahci: mediatek: fix copyright and author-linesFrank Wunderlich2020-08-241-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | after review of sam copyright should be on one line and link should not between author lines just remove the link and put ryder first as he is author of linux-driver Signed-off-by: Frank Wunderlich <frank-w@public-files.de>