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* rockchip: rk3399: default enable SPL LIBCOMMON and LIBGENERICKever Yang2019-07-2013-24/+6
* rockchip: rk3368: use defaule value for SYS_MALLOC_F_LENKever Yang2019-07-204-3/+3
* rockchip: rk3328: use defaule value for SYS_MALLOC_F_LENKever Yang2019-07-202-2/+1
* rockchip: rk3399: use default value for SYS_MALLOC_F_LENKever Yang2019-07-2013-13/+1
* rockchip: rk3288: use default value for SYS_MALLOC_F_LENKever Yang2019-07-2013-13/+1
* rockchip: rk322x: use defconfig for SYS_MALLOC_F_LENKever Yang2019-07-202-2/+1
* rockchip: Kconfig: move ROCKCHIP_BOOT_MODE_REG to soc KconfigKever Yang2019-07-2010-8/+27
* rockchip: Kconfig: move rk3399 config into its KconfigKever Yang2019-07-202-16/+12
* rockchip: Kconfig: move rk3368 config into its KconfigKever Yang2019-07-202-13/+9
* rockchip: Kconfig: move rk3288 config into its KconfigKever Yang2019-07-202-13/+9
* rockchip: Kconfig: move rk322x config into its KconfigKever Yang2019-07-202-13/+10
* rockchip: fixup board choice in KconfigKever Yang2019-07-203-0/+15
* rockchip: remove redundant pinctrl header includingKever Yang2019-07-202-2/+0
* rockchip: rk3288: remove pinctrl init in spl_board_initKever Yang2019-07-202-28/+0
* rockchip: rk3188: remove pinctrl init in spl_board_initKever Yang2019-07-202-32/+0
* rockchip: rk3399: remove pinctrl init in spl_board_initKever Yang2019-07-201-8/+0
* rockchip: dts: rk3399: rock-pi-4: Use LPDDR4-100 dtsiJagan Teki2019-07-201-0/+2
* rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsiJagan Teki2019-07-201-0/+1
* rockchip: dts: rk3399: rockpro64: Use LPDDR4-100 dtsiJagan Teki2019-07-211-0/+1
* rockchip: dts: rk3399: Add LPDDR4-100 timingsJagan Teki2019-07-211-0/+1537
* configs: rock-pi-4: Enable LPDDR4 supportJagan Teki2019-07-211-0/+1
* configs: rockpro64: Enable LPDDR4 supportJagan Teki2019-07-211-0/+1
* ram: rk3399: Add lpddr4 set rate supportJagan Teki2019-07-201-12/+661
* ram: rk3399: Add set_rate sdram rk3399 opsJagan Teki2019-07-211-3/+8
* ram: rk3399: Add LPPDDR4-800 timings incJagan Teki2019-07-211-0/+1570
* ram: rk3399: Add LPPDDR4-400 timings incJagan Teki2019-07-211-0/+1570
* clk: rockchip: rk3399: Set 400MHz ddr clockJagan Teki2019-07-211-0/+4
* clk: rockchip: rk3399: Set 50MHz ddr clockJagan Teki2019-07-211-0/+4
* rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmuJagan Teki2019-07-211-0/+4
* rockchip: rk3399: syscon: Add pmu supportJagan Teki2019-07-211-0/+8
* arm: include: rockchip: Add rk3399 pmu fileJagan Teki2019-07-211-0/+72
* ram: rk3399: Add LPPDR4 mr detectionJagan Teki2019-07-211-0/+226
* ram: rk3399: Handle data training via opsJagan Teki2019-07-211-10/+33
* ram: rk3399: Simplify data training first argumentJagan Teki2019-07-211-5/+4
* ram: rk3399: Update lpddr4 vref_mode_acJagan Teki2019-07-201-1/+2
* ram: rk3399: Update lpddr4 mode_sel based on io settingsJagan Teki2019-07-201-2/+5
* ram: rk3399: Update lpddr4 vref based on io settingsJagan Teki2019-07-201-5/+14
* ram: rk3399: Get lpddr4 tsel_rd_en from io settingsJagan Teki2019-07-201-2/+6
* ram: rk3399: Configure soc odt supportJagan Teki2019-07-201-1/+48
* ram: rk3399: Add tsel control clock driveJagan Teki2019-07-201-2/+14
* ram: sdram: Configure lpddr4 tsel rd, wr based on IO settingsJagan Teki2019-07-201-6/+36
* ram: rk3399: Add IO settingsJagan Teki2019-07-201-0/+104
* ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1Jagan Teki2019-07-201-2/+12
* ram: rk3399: Configure tsel write ca for lpddr4Jagan Teki2019-07-201-3/+12
* ram: rk3399: Map chipselect for lpddr4Jagan Teki2019-07-201-0/+10
* ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4Jagan Teki2019-07-201-0/+22
* ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4Jagan Teki2019-07-201-0/+21
* ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4Jagan Teki2019-07-201-0/+24
* ram: rk3399: Configure PHY_898, PHY_919 for lpddr4Jagan Teki2019-07-201-0/+5
* ram: rk3399: Avoid two channel ZQ Cal Start at the same timeJagan Teki2019-07-201-0/+14