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* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2018-06-0434-580/+1280
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| * board: sun50i: Add Amarula A64-Relic initial supportJagan Teki2018-06-044-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Amarula A64-Relic is A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * configs: orangepi-prime: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-prime: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | orangepi-prime has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: orangepi-pc2: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-pc2: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-pc2: Order nodes in alphabeticJagan Teki2018-05-281-28/+28
| | | | | | | | | | | | | | Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: bananapi-m2-plus: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * ARM: dts: sun8i-h3: bananapi-m2-plus: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: a64: bananapi-m64: Sync usb host nodes from LinuxJagan Teki2018-05-281-0/+16
| | | | | | | | | | | | | | Sync bananapi-m64 usb host nodes from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * ARM: dts: sun8i: a83t: Sync usbphy node from LinuxJagan Teki2018-05-281-0/+20
| | | | | | | | | | | | | | Sync sun8i-a83t usbphy node details from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: bananapi-m64: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: a64: bananapi-m64: Sync usb_otg node from LinuxJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Sync bananapi-m64 usb_otg node from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: h3: Sync OTG and HCI nodes from Linux DTJun Nie2018-05-281-0/+32
| | | | | | | | | | | | | | | | | | Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: Drop legacy usb_phy.cJagan Teki2018-05-284-436/+0
| | | | | | | | | | | | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so drop existing legacy handling like arch/arm/mach-sunxi.c and related code areas. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * usb: sunxi: Switch to use generic-phyJagan Teki2018-05-285-39/+133
| | | | | | | | | | | | | | | | | | | | Allwinner USB PHY handling can be done through driver-model generic-phy so add the generic-phy ops to relevant places on host and musb sunxi driver and enable them in respective SOC's. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add a sunxi specific function for setting squelch-detectJagan Teki2018-05-285-11/+42
| | | | | | | | | | | | | | | | | | | | | | | | The sunxi otg phy has a bug where it wrongly detects a high speed squelch when reset on the root port gets de-asserted with a lo-speed device. The workaround for this is to disable squelch detect before de-asserting reset, and re-enabling it after the reset de-assert is done. Add a sunxi specific phy function to allow the sunxi-musb glue to do this. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * board: sunxi: Use generic-phy for board_usb_cable_connectedJagan Teki2018-05-281-1/+32
| | | | | | | | | | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so use it in board_usb_cable_connected. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * device-tree-bindings: phy: Sync sun4i-usb-phy bindingsJagan Teki2018-05-281-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | Sync sun4i-usb-phy bindings from Linux, since the drivers/phy/allwinner/phy-sun4i-usb.c follow similar. Sync changes from Linux with below commit: "phy: sun4i-usb: add support for R40 USB PHY" (sha1: f3d96f8d23d8e6d0b7642ee946b9b2ac3418fb4d) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A23 USB PHY configJagan Teki2018-05-281-0/+9
| | | | | | | | | | | | | | Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A33 USB PHY configJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A31 PHY configJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Allwinner A31 has 3 USB PHY's and rest similar to A10. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A10/A13/A20 PHY configJagan Teki2018-05-281-0/+28
| | | | | | | | | | | | | | Add PHY configs for Allwinner A10/A13/A20 which are SUN4I. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A83T USB PHY configJagan Teki2018-05-281-17/+68
| | | | | | | | | | | | | | | | | | Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has 2 USB PHY's and second one is HSIC. So phy control need to configure to handle these HSIC and SIDDQ requirement. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add V3S PHY configJagan Teki2018-05-281-0/+11
| | | | | | | | | | | | | | V3S has 1 USB PHY, rest are similar to A64. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add H3/H5 PHY configJagan Teki2018-05-281-0/+11
| | | | | | | | | | | | | | H3/H5 has 4 USB PHY, rest are similar to A64. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add id_detect and vbus_detect opsJagan Teki2018-05-282-0/+65
| | | | | | | | | | | | | | | | ID and VBUS detection code require when musb changing between Host and/or Peripheral modes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: Add Allwinner A64 USB PHY driverJagan Teki2018-05-285-0/+422
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB PHY implementation for Allwinner SOC's can be handling in to single driver with different phy configs. This driver handle all Allwinner USB PHY's start from 4I to 50I(except 9I). Currently added A64 compatibility more will add in next coming patches. Current implementation is unable to get pinctrl, clock and reset details from DT since the dm code on these will add it future. Driver named as phy-sun4i-usb.c since the same PHY logic work for all Allwinner SOC's start from 4I to A64 except 9I with different phy configurations. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add support for H3/H5/A64Jagan Teki2018-05-281-1/+2
| | | | | | | | | | | | | | | | | | Like other Allwinner SoC, the H3/H5/A64 is missing the config register from the musb hardware block. Use a known working value for it like other SoC. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: clock: Fix OHCI clock gating for H3/H5Chen-Yu Tsai2018-05-281-7/+4
| | | | | | | | | | | | | | | | Clock gating bits on H43/H5 were wrong, fix them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Use BIT instead of numerical shiftJagan Teki2018-05-281-14/+14
| | | | | | | | | | | | | | Use BIT is possible areas instead of numerical shift. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add OTG device clkgate and reset for H3/H5Jagan Teki2018-05-281-0/+17
| | | | | | | | | | | | | | Add OTG device clkgate and reset for H3/H5 through driver_data. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: clock: Fix clock gating for H3/H5/A64Jagan Teki2018-05-281-3/+9
| | | | | | | | | | | | | | | | clock gating bits on a64 are different than H3_H5, so fixed only required bits on clock_sun6i.h. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add fifo configJagan Teki2018-05-281-5/+65
| | | | | | | | | | | | | | | | | | Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints with relevant fifo configs, rest all have 5 endpoints. So add the fifo configs and defer them based on driver_data. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Use simple way to fill musb_hdrc pdataJagan Teki2018-05-281-13/+10
| | | | | | | | | | | | | | | | | | | | Filling musb_hdrc pdata using structure will unnecessary add extra ifdefs, so fill them inside probe call for better code understanding and get rid ifdefs using devicetree compatible. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add proper macros instead of numericalsJagan Teki2018-05-281-4/+8
| | | | | | | | | | | | | | | | - add proper macros for musb_config members - use bool 'true' for multipoint and dyn_fifo instead of numerical 1 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * usb: sunxi: Simplify ccm reg base codeJagan Teki2018-05-283-25/+43
| | | | | | | | | | | | | | | | | | Move struct sunxi_ccm_reg pointer to private structure so-that accessing ccm reg base become more proper way and avoid local initialization in each function. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * Revert "sunxi: binman: Add U-Boot binary size check"Maxime Ripard2018-05-251-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 819f1e081c527d2d02cdaeec0027384688cf5de0. This check was introduced in order to cope with the size limitation we had when we were still using the raw environment in MMC. However, this introduces padding as well, which can result in an overly huge binary if one wants to flash the environment to some other location. Since we now have a FAT-based environment, this check is not so useful anymore, so we can just drop it. Cc: Andre Przywara <andre.przywara@arm.com> Cc: Måns Rullgård <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | SPDX: Fixup tags from latest EFI PRTom Rini2018-06-032-3/+2
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini2018-06-0343-588/+1299
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch queue for efi - 2018-06-03 A number of fixes and feature completeness work this time around: - Fix sunxi GOP reservation - Fix cursor position - Fix efi_get_variable - Allow more selftest parts to build on x86_64 - Allow unaligned memory access on armv7 - Implement ReinstallProtocolInterface - More sandbox preparation
| * | efi_loader: Fix warning in raw/cols queryAlexander Graf2018-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The code to determine rows / cols on the screen could potentially run into a case where it doesn't know how big the screen is. In that case, assume 80x25. Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_loader: create handles from normal memoryHeinrich Schuchardt2018-06-031-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Handles are not used at runtime. They are freed by the firmware when the last protocol interface is uninstalled. So there is no reason to use EFI memory when creating handles. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_loader: efi_mem_carve_out should return s64Heinrich Schuchardt2018-06-031-14/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | efi_mem_carve_out() is used to remove memory pages from a mapping. As the number of pages to be removed is a 64bit type the return type should be 64bit too. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_loader: avoid anonymous constants for AllocatePagesHeinrich Schuchardt2018-06-032-5/+9
| | | | | | | | | | | | | | | | | | | | | Do not use anonymous constants when calling efi_allocage_pages. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_selftest: check for buffer overflow in efi_get_variableIvan Gorinov2018-06-031-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | Allocate a buffer on the stack instead of an array of uninitialized pointers; check if GetVariable writes past the end of the buffer. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | Makefile: clean should delete *.soHeinrich Schuchardt2018-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Files *.so are generated files. So the clean target should delete them. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_selftest: imply FAT, FAT_WRITEHeinrich Schuchardt2018-06-031-0/+2
| | | | | | | | | | | | | | | | | | | | | efi_selftest_block_device accesses a FAT file system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | efi_loader: DocBook comments for boot servicesHeinrich Schuchardt2018-06-034-397/+455
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With 'make htmldocs' we can generate a documentation if the function comments follow the DocBook conventions. This patch adjusts the comments for EFI boot services and provides the DocBook template for the EFI subsystem. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | Add a comment for board_quiesce_devices()Simon Glass2018-06-031-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This exported function should have a comment describing what it does. Also it should really be removed in favour of device_remove(), which handles this sort of thing now. Add a comment with a TODO. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | Define board_quiesce_devices() in a shared locationSimon Glass2018-06-035-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This undocumented function relies on arch-specific code to declare a nop weak version. Add the weak function in common code instead to avoid having to duplicate the same function in each arch. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
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