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* rockchip: sdram: update the sys_reg to sys_reg2Kever Yang2019-11-171-16/+16
| | | | | | | | We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable name to what we real use to avoid confuse people. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: sdram: extend to use sys_reg3 for capacity infoKever Yang2019-11-173-47/+152
| | | | | | | | | | | | | Since we have new DRAM type and to support different DRAM size in different CS, we need more bits, so introduce sys_reg3 to record the info. Note that the info in sys_reg3 is extension to sys_reg2 and the info in sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as VERSION2. All the ENC macro are moved to sdram_common.h since the sdram.c only need to do the info decode. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: sdram: move cap structure and debug function to sdram_common.hKever Yang2019-11-174-48/+61
| | | | | | | | | The sdram.h suppose to be helper file for sdram.c which including dram size decode and some u-boot related dram init interface, and all structure and function for dram driver move to sdram_common.h Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* ram: rockchip: rename sdram_common.c/h to sdram.cKever Yang2019-11-1713-14/+14
| | | | | | | | | | rename sdram_common.c in arch/arm/mach-rockchip to sdram.c; so that we can use the file name sdram_common.c in dram driver for better understand the code; clean the related file who has use the header file at the same time. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* ram: rockchip: rename sdram.h to sdram_rk3288.hKever Yang2019-11-175-4/+3
| | | | | | | | The header file sdram.h is used for rk3288 and similar SoCs, rename it to make it more understandable. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'Tom Rini2019-11-12204-70/+176
|\ | | | | | | | | | | | | - Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This is size neutral outside of two platforms with latent bugs being fixed now and they no longer have "ENV_IS_NOWHERE" set along with their intended location.
| * defconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENTTom Rini2019-11-12202-68/+174
| | | | | | | | | | | | | | | | Move this symbol to Kconfig. As part of this we can drop a UBI-specific symbol that was a stop-gap for not having this particular symbol in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
| * pfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfigTom Rini2019-11-122-1/+1
| | | | | | | | | | | | | | | | This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather than defconfig, fix. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
| * evb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfigTom Rini2019-11-122-1/+1
|/ | | | | | | | This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than defconfig, fix. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-imx-20191105' of ↵Tom Rini2019-11-1254-341/+5802
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191105 ------------------- i.MX8MN SoC support ROM API image download support i.MX8MM enet enabling
| * imx: imx8mm-evk: enable ethernetPeng Fan2019-11-054-0/+56
| | | | | | | | | | | | | | | | add phy-reset-gpios to reset phy Add board_phy_config to configure phy Enable DM_ETH Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * net: fec_mxc: support i.MX8M with CLK_CCFPeng Fan2019-11-052-15/+68
| | | | | | | | | | | | | | | | | | | | | | Add more clks for fec_mxc according to Linux Kernel 5.4.0-rc1 drivers/net/ethernet/freescale/fec_main.c. Since i.MX8MQ not support CLK_CCF, so add a check to restrict the code only effect when CONFIG_IMX8M and CONFIG_CLK_CCF both defined. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * net: Kconfig: FEC: Add dependency on i.MX8MPeng Fan2019-11-051-1/+1
| | | | | | | | | | | | | | | | | | Make FEC driver could be used by i.MX8M when CONFIG_FEC_MXC defined in defconfig. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
| * arm: dts: imx8mm: drop assigned clocks for clk nodePeng Fan2019-11-051-0/+3
| | | | | | | | | | | | | | Drop assigned clocks for clk node, this will break boot on i.MX8MM EVK board. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * clk: imx: imx8mm: add set_parent callbackPeng Fan2019-11-051-0/+19
| | | | | | | | | | | | | | | | | | Add set_parent callback, then assigned-clock-parents in dts could be work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
| * clk: imx8mm: add enet clkPeng Fan2019-11-051-0/+27
| | | | | | | | | | | | | | | | | | Add enet ref/timer/PHY_REF/root clk which are required to make enet function well. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
| * imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not definedPeng Fan2019-11-051-6/+8
| | | | | | | | | | | | | | | | | | | | When CONFIG_$(SPL_)CLK not defined, the clock controller device not exist, so to avoid boot failure for platform not have CONFIG_$(SPL_)CLK, add a check. Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add i.MX8MN DDR4 board supportPeng Fan2019-11-0513-3/+1956
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add dtsi for i.MX8MNPeng Fan2019-11-053-0/+1573
| | | | | | | | | | | | Add dtsi for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: add i.MX8MN ddr4 image cfg filePeng Fan2019-11-051-0/+17
| | | | | | | | | | | | Add cfg file for i.MX8MN DDR4 Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * clk: imx: add i.MX8MN ccf driverPeng Fan2019-11-053-0/+433
| | | | | | | | | | | | | | | | | | Add i.MX8MM ccf driver support. Modifed from Linux Kernel 5.3.0-rc1, drop some entries that not used in U-Boot and adapt to U-Boot CCF style. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Lukasz Majewski <lukma@denx.de>
| * tools: imx8m_image: support ddr4 firmwarePeng Fan2019-11-051-0/+10
| | | | | | | | | | | | some boards use ddr4, not lpddr4, so we need to check ddr4 firmware. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * pinctrl: imx8m: support i.MX8MNPeng Fan2019-11-051-0/+1
| | | | | | | | | | | | Support i.MX8MN in imx8m pinctrl driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * tools: imx8mimage: add ROM VERSIONPeng Fan2019-11-052-2/+23
| | | | | | | | | | | | | | | | | | The IVT offset is changed on i.MX8MN. Use ROM_VERSION to pass the v1 or v2 to mkimage. v1 is for iMX8MQ and iMX8MM v2 is for iMX8M Nano (iMX8MN) Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mn: add get_boot_devicePeng Fan2019-11-051-0/+48
| | | | | | | | | | | | | | No ROM INFO structure on iMX8MN, use new ROM API to get boot device from ROM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: cpu: restrict get_boot_devicePeng Fan2019-11-051-1/+1
| | | | | | | | | | | | | | i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and i.MX8MM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add rom api supportPeng Fan2019-11-054-0/+331
| | | | | | | | | | | | | | i.MX8MN support loading images with rom api, so we implement reuse board_return_to_bootrom to let ROM loading images. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: spl: use spl_board_boot_device for i.MX8MNPeng Fan2019-11-051-1/+1
| | | | | | | | | | | | i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mn: add pin headerPeng Fan2019-11-051-0/+763
| | | | | | | | | | | | Add pin header for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add i.MX8MN PE propertyPeng Fan2019-11-051-1/+1
| | | | | | | | | | | | i.MX8MN does not have LVTTL, it has a PE property Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mn: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan2019-11-051-1/+1
| | | | | | | | | | | | | | Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: add clk support for i.MX8MNPeng Fan2019-11-054-3/+83
| | | | | | | | | | | | | | | | i.MX8MN has similar architecture with i.MX8MM, so it could reuse the clock code of i.MX8MM, but i.MX8MN has different CCM root configurations, so need a separate root entry. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mn: support get_cpu_revPeng Fan2019-11-054-1/+8
| | | | | | | | | | | | Add a dummy cpu type and support get_cpu_rev for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add i.MX8MN kconfig entryPeng Fan2019-11-051-0/+4
| | | | | | | | | | | | Add i.MX8MN kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * power: domain: add i.MX8 scu power domain driverPeng Fan2019-11-052-1/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power domain tree is not accepted by Linux Kernel upstream. only a single pd node is used currently, as following: pd: imx8qx-pd { compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd"; #power-domain-cells = <1>; }; So to migrate to use upstream linux dts, we also need a driver to support this. This patch is to support the new method, compared with legacy power domain tree, it will be simpiler, because each device will has resource id as power domain index, it will be directly passed to scfw, and no need to let power domain build that tree. If multiple power domain is needed, it is the dts node should has correctly power domains entry added and sequence correct. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * power: domain: make imx8-power-domain.c legacyPeng Fan2019-11-052-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The current i.MX8 power domain driver is based on i.MX vendor power domain tree which will retire later. The Linux upstream use a single pd node for power domain driver, and U-Boot will adopt that. When U-Boot i.MX8 dts synced with Linux Kernel upstream and related driver ready, the legacy driver will be removed. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * misc: imx8: scu: simplify code to make it extendablePeng Fan2019-11-051-39/+7
| | | | | | | | | | | | | | | | | | | | | | clk and pinctrl will be get(probed) during each device probe, we don't need to probe them in scu driver. Only need to bind the sub-nodes (clk and iomuxc) of MU node with their drivers. So drop the code to probe the clk/pinctrl, and this patch will make it easy to add more subnodes. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8qm-mek: add u-boot, dm-spl for lpuart0Peng Fan2019-11-051-0/+8
| | | | | | | | | | | | | | | | | | lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL is enabled. Since uclass power domain is also enabled, to make lpuart work properly, need add u-boot,dm-spl for lpuart power domain and its parent. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: dts: imx8qxp-mek: add u-boot, dm-spl for lpuart0Peng Fan2019-11-051-0/+8
| | | | | | | | | | | | | | | | | | lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL is enabled. Since uclass power domain is also enabled, to make lpuart work properly, need add u-boot,dm-spl for lpuart power domain and its parent. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8qm: mek: enable dm-spl for pmPeng Fan2019-11-053-17/+6
| | | | | | | | | | | | | | | | | | with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled, the bind and probe code in board file could be removed. Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Prepare v2020.01-rc2v2020.01-rc2Tom Rini2019-11-111-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | configs: Resync with savedefconfigTom Rini2019-11-1129-32/+30
| | | | | | | | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* | gitattributes: dont treat non-text files as textVignesh Rajendran2019-11-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent update in u-boot gitattributes all files are treated as regular text files. This creates problems with special files and repo always shows uncommitted files like below. Your branch is up-to-date with 'origin/master'. Changes not staged for commit: (use "git add <file>..." to update what will be committed) (use "git checkout -- <file>..." to discard changes in working directory) modified: tools/logos/compulab.bmp modified: tools/logos/denx-comp.bmp modified: tools/logos/toradex.bmp To fix above problem special files bmp/ttf files are treated as binary files in the gitattributes. Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com> Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
* | .gitignore: Ignore .img filesMichael Trimarchi2019-11-111-0/+1
| | | | | | | | | | | | | | The generated idbloader.img file that rockchip uses should be not included in git status report Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
* | binman: tegra: Adjust symbol calculation depending on end-at-4gbSimon Glass2019-11-1110-26/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent change adjusted the symbol calculation to work on x86 but broke it for Tegra. In fact this is because they have different needs. On x86 devices the code is linked to a ROM address and the end-at-4gb property is used for the image. In this case there is no need to add the base address of the image, since the base address is already built into the offset and image-pos properties. On other devices we must add the base address since the offsets start at zero. In addition the base address is currently added to the 'offset' and 'size' values. It should in fact only be added to 'image-pos', since 'offset' is relative to its parent and 'size' is not actually an address. This code should have been adjusted when support for 'image-pos' and 'size' was added, but it was not. To correct these problems: - move the code that handles adding the base address to section.py, which can check the end-at-4gb property and which property (offset/size/image-pos) is being read - add the base address only when needed (only for image-pos and not if the image uses end-at-4gb) - add a note to the documentation - add a separate test to cover x86 behaviour Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | Merge tag 'u-boot-rockchip-20191110' of ↵Tom Rini2019-11-1148-158/+2032
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x40000 - Fix the u8 type comparision with '-1'. - Fix checkpatch warning for multi blank line and review signature.
| * | rockchip: firefly-rk3288: Enable TPL supportKever Yang2019-11-102-3/+3
| | | | | | | | | | | | | | | | | | | | | This patch enable TPL support for firefly-rk3288 board, which works ths same way with other RK3288 board like Tinker, evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: adding the missing "/" in entries of boot_devicesLevin Du2019-11-105-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work as expected. When board_boot_order() `spl-boot-order.c` meets "same-as-spl", it gets the conf by looking the boot_devices table by boot source, and parse the node by the conf with: node = fdt_path_offset(blob, conf); which will failed without the "/" indicating the path. Currently only entries of boot_devices in rk3399 have the "/" prefix. Therefore add the missing ones in other boards. Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUsKever Yang2019-11-103-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rk3399: update SPL_STACK_R_ADDRKever Yang2019-11-1018-17/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config; default to 0x4000000(64MB) instead of 0x80000(512KB) for this address can support all the SoCs including those may have only 64MB memory, and also reserve enough space for atf, kernel(in falcon mode) loading. After the ATF entry move to 0x40000, the stack from 0x80000 may be override when loading ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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