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* Merge git://git.denx.de/u-boot-rockchipTom Rini2018-01-2832-1010/+2554
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| * spl: atf: pass NULL for bl32_ep pcKever Yang2018-01-281-1/+2
| | | | | | | | | | | | | | | | | | ATF use bl32_ep_info->pc to decide if thre is an available bl32, let's mark it as NULL first. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: rk3036: enable rockusb support on rk3036 based deviceEddie Cai2018-01-281-0/+2
| | | | | | | | | | | | | | | | | | Rockchip Rockusb driver already merged. So we enable rockusb support on rk3036 based device. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: dts: rk3128: update pwm-cell for pwm0Kever Yang2018-01-281-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | The backlight pwm-cell is 3. This remove the warning in buildman: arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3]) Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: clk: guard set_parent implementations against OF_PLATDATAPhilipp Tomsich2018-01-283-6/+12
| | | | | | | | | | | | | | | | The set_parent implementations do not make sense when OF_PLATDATA is enabled. We guard these against OF_PLATDATA and don't populate the set_parent-op when this is the case. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * clk: rockchip: clk_rk3368: Implement "assign-clock-parent"David Wu2018-01-282-7/+91
| | | | | | | | | | | | | | | | | | Implement the setting parent for gmac clock, and add internal pll div set for mac clk. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and ↵David Wu2018-01-282-8/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "assign-clock-rate" The RK3288 CRU-node assigns rates to a number of clocks that are not implemented in the RK3288 clock-driver (but which have been sufficiently initialised from rkclk_init()): for these clocks, we implement the gmac clock set parent, but simply ignore the others' set_rate() operation and return 0 to signal success. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * ARM: dts: rk3288: Remove unused LCDC clock assignedDavid Wu2018-01-281-5/+2
| | | | | | | | | | | | | | | | | | | | | | The LCDC assigned rate is 0, it will make boot error, error log:"pll_para_config: the frequency can not be 0 Hz". Remove them, and the lcdc driver will do the correct clock rate setting. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * config: evb-rk3229: Enable rk gmac configsDavid Wu2018-01-281-0/+5
| | | | | | | | | | | | | | | | Add gmac config support for rk3229 evb. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * net: gmac_rockchip: Add support for the RK3228 GMACDavid Wu2018-01-281-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | The GMAC in the RK3228 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3368-specific logic necessary to reuse this driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * clk: rockchip: Add rk322x gamc clock supportDavid Wu2018-01-281-0/+107
| | | | | | | | | | | | | | | | | | Assuming mac_clk is fed by an external clock, set clk_rmii_src clock select control register from IO for rgmii interface. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: pinctrl: Add rk322x gmac pinctrl supportDavid Wu2018-01-281-0/+148
| | | | | | | | | | | | | | | | | | Set gmac pins iomux and rgmii tx pins to 12ma drive-strength, clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu2018-01-284-456/+492
| | | | | | | | | | | | | | | | | | | | Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evbDavid Wu2018-01-281-0/+30
| | | | | | | | | | | | | | | | Add rk3328-evb gmac support. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: dts: rk3328: Add gmac2io supportDavid Wu2018-01-281-0/+19
| | | | | | | | | | | | | | | | Add basic dts configuration for rk3328 gmac2io. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: configs: Enable GMAC configs for evb-rk3328David Wu2018-01-281-0/+5
| | | | | | | | | | | | | | | | Enable GMAC configs for evb-rk3328 Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * net: gmac_rockchip: Add rk3328 gmac supportDavid Wu2018-01-281-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | The GMAC2IO in the RK3328 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3328-specific logic necessary to reuse this driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * clk: rockchip: Add rk3328 gamc clock supportDavid Wu2018-01-282-3/+181
| | | | | | | | | | | | | | | | | | | | The rk3328 soc has two gmac controllers, one is gmac2io, the other is gmac2phy. We use the gmac2io rgmii interface for 1000M phy here. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: pinctrl: Add rk3328 gmac pinctrl supportDavid Wu2018-01-282-1/+275
| | | | | | | | | | | | | | | | | | | | Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2 and bit10 at com iomux register. After that, set rgmii m1 tx pins to 12ma drive-strength, and clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driverDavid Wu2018-01-282-113/+113
| | | | | | | | | | | | | | | | | | Clean the iomux definitions at grf_rk3328.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * net: gmac_rockchip: Add support for the RV1108 GMACDavid Wu2018-01-281-6/+109
| | | | | | | | | | | | | | | | | | | | | | The rv1108 GMAC only support rmii interface, so need to add the set_rmii() ops. Use the phy current interface to set rmii or rgmii ops. At the same time, need to set the mac clock rate of rmii with 50M, the clock rate of rgmii with 125M. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driverDavid Wu2018-01-283-399/+416
| | | | | | | | | | | | | | | | | | | | | | If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h, and move them into pinctrl-driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: grf_rv1108.h: Fix the grf offsetsDavid Wu2018-01-281-2/+6
| | | | | | | | | | | | | | | | | | | | The last 4 grf registers offset of rv1108 are wrong, fix them for correct usage. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evbDavid Wu2018-01-281-0/+1
| | | | | | | | | | | | | | | | | | If the Ethernet address is not set, the network can't work, enable the random address config for default use. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission qualityDavid Wu2018-01-281-2/+2
| | | | | | | | | | | | | | | | | | | | Give the mac controller the correct tx-delay and rx-delay value for the rgmii mode transmission. If they are not matched, there would be Ethernet packets lost, the net feature may not work. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-nodePhilipp Tomsich2018-01-281-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The RK3399 CRU-node assigns rates to a number of clocks that are not implemented in the RK3399 clock-driver (but which have been sufficiently initialised from rkclk_init()): for these clocks, we simply ignore the set_rate() operation and return 0 to signal success. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
| * clk: implement clk_set_defaults()Philipp Tomsich2018-01-283-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux uses the properties 'assigned-clocks', 'assigned-clock-parents' and 'assigned-clock-rates' to configure the clock subsystem for use with various peripheral nodes. This implements clk_set_defaults() and hooks it up with the general device probibin in drivers/core/device.c: when a new device is probed, clk_set_defaults() will be called for it and will process the properties mentioned above. Note that this functionality is designed to fail gracefully (i.e. if a clock-driver does not implement set_parent(), we simply accept this and ignore the error) as not to break existing board-support. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address. Series-version: 2 Cover-letter: clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC), the parent-clock needs to be set via the DTS. This adds the required plumbing and implements the GMAC case for the RK3399. END
| * rockchip: clk: rk3399: implement set_parent() operationPhilipp Tomsich2018-01-281-2/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements the (newly added) set_parent() operation for the RK3399 with a focus on allowing the RGMII clock parent to be configured via the assigned-clock-parents property of the GMAC node. This implementation supports only the GMAC (in fact only the RGMII clock parent) and allows to set this clock's parent either to the internal SCLK_GMAC or to an external clock input (identifiable by it providing a 'clock-output-name' of "gmac_clkin"). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
| * clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()Philipp Tomsich2018-01-281-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic in clk_get_by_index() may be useful for other properties than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents' follows the same model. This commit refactors clk_get_by_index() by introducing an internal function clk_get_by_indexed_prop() that allows to specify the name of the property to process. The original clk_get_by_index() call is simply directed through this helper function with the property name fixed to "clocks". Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
| * clk: add clk_set_parent()Philipp Tomsich2018-01-283-0/+31
| | | | | | | | | | | | | | | | | | | | | | Clocks may support multiple parents: this change introduces an optional operation on the clk-uclass to set a clock's parent. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
* | omap3_logic: Clean up I2C pin muxing.Adam Ford2018-01-281-8/+8
| | | | | | | | | | | | | | The SOM has external pull-up resistors, so let's turn these off. It was helping reduce some errors when running I2C1 @ 2.6MHz. Signed-off-by: Adam Ford <aford173@gmail.com>
* | spl: add option to disable SPL banner outputAnatolij Gustschin2018-01-282-0/+9
| | | | | | | | | | | | | | | | | | Selecting this option will reduce SPL boot time by approx. 6 ms (e. g. with 70 bytes long banner string at 115200 baud). Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | bcm2835_pinctrl: Probe pre-relocAlexander Graf2018-01-282-1/+6
| | | | | | | | | | | | | | | | | | | | The serial drivers now depend on the pinctrl driver to determine whether they are enabled. That means if a serial device wants to be used pre-reloc, we also need the pinctrl device pre-reloc. Adapt the pinctrl driver as well as dts overlay accordingly. Signed-off-by: Alexander Graf <agraf@suse.de>
* | bcm2835_pl011_serial: Add BCM2835 specific serial driverAlexander Graf2018-01-286-9/+101
| | | | | | | | | | | | | | | | | | On bcm2835 we need to ensure we only access serial devices that are muxed to the serial output pins of the pin header. To achieve this for the pl011 device, add a bcm2835 specific pl011 wrapper device that does this check but otherwise behaves like a pl011 device. Signed-off-by: Alexander Graf <agraf@suse.de>
* | MAINTAINERS: Take over BCM2835 maintainershipAlexander Graf2018-01-281-2/+2
| | | | | | | | | | | | | | | | It seems as if I have more interest in BCM2835 support than most others, so I'll bite the bullet and declare myself maintainer. It'd be a shame to leave that platform orphaned. Signed-off-by: Alexander Graf <agraf@suse.de>
* | bcm2835_mu_serial: Convert to KconfigAlexander Graf2018-01-283-4/+7
| | | | | | | | | | | | | | Setting config options using headers is deprecated. This patch converts the BCM2835 Mini-UART to Kconfig. Signed-off-by: Alexander Graf <agraf@suse.de>
* | pl01x: Convert CONFIG_PL01X_SERIAL to KconfigAlexander Graf2018-01-2811-18/+17
| | | | | | | | | | | | | | | | | | We want to use Kconfig logic to depend on whether pl01x devices are built in, so let's convert their inclusion selection to Kconfig. This round goes to pl01x. Signed-off-by: Alexander Graf <agraf@suse.de>
* | pl011: Convert CONFIG_PL011_SERIAL to KconfigAlexander Graf2018-01-289-7/+25
| | | | | | | | | | | | | | | | | | We want to use Kconfig logic to depend on whether pl01x devices are built in, so let's convert their inclusion selection to Kconfig. This round goes to pl011. Signed-off-by: Alexander Graf <agraf@suse.de>
* | pl010: Convert CONFIG_PL010_SERIAL to KconfigAlexander Graf2018-01-284-2/+7
| | | | | | | | | | | | | | | | | | We want to use Kconfig logic to depend on whether pl01x devices are built in, so let's convert their inclusion selection to Kconfig. This round goes to pl010. Signed-off-by: Alexander Graf <agraf@suse.de>
* | pl01x: Convert to dev_readAlexander Graf2018-01-281-5/+3
| | | | | | | | | | | | | | The fdtdec API is deprecated, convert the pl010 and pl011 devices to use the dev_read API instead. Signed-off-by: Alexander Graf <agraf@suse.de>
* | serial_bcm283x_mu: Fail loading if not muxedAlexander Graf2018-01-281-0/+28
| | | | | | | | | | | | | | | | | | | | The bcm283x mini-uart is only really usable as U-Boot serial output when it is muxed to the UART pins of the RPi pin header. So fail probing in case it is not muxed correctly, as in that case firmware did not initialize it properly either. Signed-off-by: Alexander Graf <agraf@suse.de>
* | serial_bcm283x_mu: Always skip initAlexander Graf2018-01-281-1/+6
| | | | | | | | | | | | | | | | The serial initialization doesn't always quite work for me, so let's always skip it for now. We know that firmware on the RPi initializes us properly already. Signed-off-by: Alexander Graf <agraf@suse.de>
* | serial_bcm283x_mu: Convert to dev_readAlexander Graf2018-01-281-7/+3
| | | | | | | | | | | | | | The fdtdec API got deprecated in favor of dev_read calls. Use those instead. Signed-off-by: Alexander Graf <agraf@suse.de>
* | rpi: Determine PL011/Mini-UART availability at runtimeAlexander Graf2018-01-281-4/+1
| | | | | | | | | | | | | | | | | | | | | | Firmware on the Raspberry Pi family of devices can dynamically configure either the PL011, Mini-UART or no device at all to be routed to the user accessible UART pins. That means we need to always include both drivers, because we can never be sure which of the two serial devices firmware actually chooses to use. Signed-off-by: Alexander Graf <agraf@suse.de>
* | serial: bcm283x_mu: Remove support for post-init disablingAlexander Graf2018-01-282-18/+1
| | | | | | | | | | | | | | | | We are switching to a model where a serial device doesn't even get probed when it's not muxed properly, so we don't need device specific disabling functionality anymore. Signed-off-by: Alexander Graf <agraf@suse.de>
* | rpi: Remove runtime disabling support for serialAlexander Graf2018-01-281-43/+0
| | | | | | | | | | | | | | | | We are switching to a model where our board file can directly fail probing of serial devices when they're not usable, so remove the current runtime hack we have. Signed-off-by: Alexander Graf <agraf@suse.de>
* | serial: Use next serial device if probing failsAlexander Graf2018-01-281-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently our serial device search chokes on the fact that the serial probe function could fail. If it does, instead of searching for the next usable serial device, it just quits. This patch changes the fallback logic so that even when a serial device was not probed correctly, we just try the next ones until we find one that works. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | am33xx: board: Call spl_early_init() to support sdram_init()Faiz Abbas2018-01-281-0/+3
| | | | | | | | | | | | | | | | | | With driver model enabled in SPL, sdram_init() requires device tree and malloc to be initialized. Therefore call spl_early_init() in early_system_init(). Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: add support for PDU001Felix Brack2018-01-2814-1/+1342
| | | | | | | | | | | | | | This patch adds support for the PDU001 board. Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: Add bcm2835 sdhost controllerAlexander Graf2018-01-284-0/+995
| | | | | | | | | | | | | | | | | | | | | | The BCM2835 family of SoCs has 2 different SD controllers: One based on the SDHCI spec and a custom, home-grown one. This patch implements a driver for the latter based on the Linux driver. This is needed so that we can make use of device trees that assume driver presence of both SD controllers. Signed-off-by: Alexander Graf <agraf@suse.de>
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