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| * configs: meson64_android: implement AVB supportMattijs Korpershoek2021-08-101-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | AVB (Android Verified Boot) is well supported in U-Boot already. Add support for it in meson64_android. This is controlled by the "force_avb" environment variable and the CONFIG_CMD_AVB option. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: increase SYS_MALLOC_LEN to 128M for AVBMattijs Korpershoek2021-08-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | To prepare for AVB support, increase SYS_MALLOC_LEN to 128M. This value has been found by testing the following on khadas vim3l: => avb init => avb verify Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64: permit redefining SYS_MALLOC_LENMattijs Korpershoek2021-08-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | Permit redefining SYS_MALLOC_LEN for board specific configs. This is especially useful for Android with AVB, which requires a malloc length of 128M. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * board: amlogic: odroid-n2: fix fdtfile suffix for n2-plusChristian Hewitt2021-08-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | The N2+ dtb is meson-g12b-odroid-n2-plus.dtb, not n2_plus, so correct the suffix provided in the board file. Also align the board ident string shown during boot to match. Fixes: 8bc780106c13 ("board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * Revert "ARM: meson: Add support for fastboot_set_reboot_flag()"Mattijs Korpershoek2021-07-301-34/+0
| | | | | | | | | | | | | | | | | | | | | | | | With the introduction of a generic reboot flag implemented in commit a362ce214f ("fastboot: Implement generic fastboot_set_reboot_flag"), we no longer need the custom PSCI implementation to handle the reboot reason. This reverts commit 9a34dedfae0ebb031a45324c2fed8c39b2c6fcf2. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: sei610/sei510: set CONFIG_CMD_BCB=yMattijs Korpershoek2021-07-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | SEI-610 and SEI-510 are both for Android boards based on Yukawa[1] Enable the BCB command to enable the standard Android boot flow. [1] https://android.googlesource.com/device/amlogic/yukawa/ Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: reboot to fastbootd from bootloaderMattijs Korpershoek2021-07-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whenever we test for boot-fastboot in the BCB, it means that Android wants us to boot into recovery with a special mode (fastbootd). Force reboot into recovery in that case. Note: we don't erase the bcb on purpose here: recoveryOS needs to read the BCB as well to know if it boots into regular recovery mode or fastbootd mode. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: implement recovery boot via BCBMattijs Korpershoek2021-07-301-7/+23
| | | | | | | | | | | | | | | | | | | | | | | | Right now meson64_android does not know how to boot into Android Recovery: it simply falls back to "fastboot" mode in the bootloader. Implement the boot to recovery. While at it, use the standard BCB way instead of a sm for consistency. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: use BCB for reboot to bootloaderMattijs Korpershoek2021-07-301-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of today, we use a "vendor specific" secure monitor call for the reboot reason (sm). We should not need this. Android uses the BCB (Bootloader Control Block) to communicate with the bootloader. Implement "reboot into bootloader" using the standard BCB way instead of using sm calls. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: don't set console bootargsMattijs Korpershoek2021-07-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The console bootargs are already set from the kernel commandline. On Android, this is done in yukawa at [1] Don't set it in the bootloader since it's overridden by the kernel anyways. [1] https://android-review.googlesource.com/c/device/amlogic/yukawa/+/1112994 Signed-off-by: Guillaume La Roque <mkorpershoek@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: use logo part label instead of indexMattijs Korpershoek2021-07-291-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To display the bootup logo, we read the gpt and assume that the partition with index "2" will be the "logo" partition. This might not always be the case, and it's very error-prone. Load the logo partition by label instead of by index. Signed-off-by: Guillaume La Roque <mkorpershoek@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: use boot part label instead of indexMattijs Korpershoek2021-07-291-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To boot Android, we read the gpt and assume that the partition with index "1" will be the "boot" partition. This might not always be the case, as there are no requirements from Android on the partition order. However, Android does seem to use the "boot" label quite a lot on their public documentation [1] Load the boot partition by label instead of by index [1] https://source.android.com/devices/bootloader/partitions Signed-off-by: Guillaume La Roque <mkorpershoek@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: use CONFIG_FASTBOOT_USB_DEVMattijs Korpershoek2021-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Right now, when running fastboot we use a hard-coded "0" for the device number. Use the Kconfig option named CONFIG_FASTBOOT_USB_DEV instead. Signed-off-by: Guillaume La Roque <mkorpershoek@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: meson64_android: fix bad indent in EXTRA_ENV_SETTINGSMattijs Korpershoek2021-07-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | both lines seem to be joined together which is not the case for the meson64.h EXTRA_ENV_SETTINGS. Add a newline for consistency. Signed-off-by: Guillaume La Roque <mkorpershoek@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: sei610: fix typo in header commentMattijs Korpershoek2021-07-291-1/+1
| | | | | | | | | | | | | | | | | | s/510/610/ Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | configs: Resync with savedefconfigTom Rini2021-08-1098-210/+154
| | | | | | | | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'u-boot-imx-20210809' of ↵Tom Rini2021-08-09128-832/+11843
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210809 - new SOC: add support for imx8ulp - Toradex fixes for colibri (vf / imx6 / imx7 / imx8x) - convert to DM for mx28evk - Fixes for Gateworks ventana boards CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8639
| * | imx: cmd: use struct cmd_tblPeng Fan2021-08-092-2/+2
| | | | | | | | | | | | | | | | | | cmd_tbl_t is removed, need use struct cmd_tbl Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx: add i.MX8ULP EVK supportPeng Fan2021-08-0913-0/+2047
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot upower_init: soc_id=48 upower_init: version:11.11.6 upower_init: start uPower RAM service user_upwr_rdy_callb: soc=b user_upwr_rdy_callb: RAM version:12.6 Turn on switches ok Turn on memories ok Clear DDR retention ok Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F0 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. complete De-Skew PLL is locked and ready WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x3a800 by ROM_API NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94 NOTICE: BL31: Built : 01:56:58, Jun 29 2021 NOTICE: upower_init: start uPower RAM service NOTICE: user_upwr_rdy_callb: soc=b NOTICE: user_upwr_rdy_callb: RAM version:12.6 U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) CPU: Freescale i.MX8ULP rev1.0 at 744 MHz Reset cause: POR Boot mode: Single boot Model: FSL i.MX8ULP EVK DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@293a0000 Out: serial@293a0000 Err: serial@293a0000 Net: Warning: ethernet@29950000 (eth0) using random MAC address - 96:35:88:62:e0:44 eth0: ethernet@29950000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: add i.MX8ULP dtsiPeng Fan2021-08-093-0/+1953
| | | | | | | | | | | | | | | | | | Add i.MX8ULP dtsi Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | ddr: Add DDR driver for iMX8ULPYe Li2021-08-095-0/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com>
| * | imx8ulp: add upower api supportPeng Fan2021-08-096-0/+948
| | | | | | | | | | | | | | | | | | | | | Add upower api support, this is modified from upower firmware exported package. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8ulp: move struct mu_type to common headerPeng Fan2021-08-092-18/+26
| | | | | | | | | | | | | | | | | | | | | Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8ulp: Add workaround for eMMC bootYe Li2021-08-092-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting from boot part1/2, the image offset should be 0, but ROM has a bug to return 0x8000. Has to workaround the issue before ROM fix it. Use a ROM function to know boot from emmc boot part or user part So we can set the image offset accordingly. Signed-off-by: Ye Li <ye.li@nxp.com>
| * | imx8ulp: Use DGO_GP5 to get boot configYe Li2021-08-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since CMC1 MR0 only reflects high 16 bits boot cfg used for AP domian, it does not connect to low 16 bits for RTD. So we can't get the correct boot mode. Change to use DGO_GP5 of SEC_SIM which is set by ROM. Signed-off-by: Ye Li <ye.li@nxp.com>
| * | imx8ulp: soc: correct reset causePeng Fan2021-08-091-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The CMC1 SRS reflects the current reset cause, not SSRS. Then you could get "Reset cause: WARM-WDG" when issue reset in U-Boot. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | driver: misc: imx8ulp: Add fuse driver for imx8ulpYe Li2021-08-092-0/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li <ye.li@nxp.com>
| * | arm: imx8ulp: add iomuxc supportPeng Fan2021-08-092-1/+137
| | | | | | | | | | | | | | | | | | Add i.MX8ULP iomuxc support Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: add dummy imx_get_mac_from_fusePeng Fan2021-08-091-0/+5
| | | | | | | | | | | | | | | | | | Add imx_get_mac_from_fuse for enet build pass Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: Allocate DCNANO and MIPI_DSI to AD domainYe Li2021-08-091-0/+2
| | | | | | | | | | | | | | | | | | | | | Configure DCNANO and MIPI_DSI to be controlled by AD for single boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: iMX8ULP: Add boot device relevant functionsYe Li2021-08-092-0/+85
| | | | | | | | | | | | | | | | | | | | | Read from ROM API to get current boot device. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: Probe the S400 MU device in arch initYe Li2021-08-091-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | Need probe the S400 MU device in arch_cpu_init_dm, so we can use S400 API in u-boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | imx8ulp: unify rdc functionsPeng Fan2021-08-093-173/+317
| | | | | | | | | | | | | | | | | | | | | Unify rdc function to rdc.c Update soc.c to use new rdc function Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: release trdc and assign lpav from RTD to APDPeng Fan2021-08-091-1/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rlease LPAV from RTD to APD Release gpu2D/3D to APD Set TRDC MBC2 MEM1 for iomuxc0 access Since upower depends AP/M33 SW to configure IOMUX for its PMIC i2c and MODE pins. we have to open iomuxc0 access for A35 core (domain 7) in single boot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
| * | arm: imx8ulp: add trdc release requestPeng Fan2021-08-091-9/+17
| | | | | | | | | | | | | | | | | | | | | Add TRDC release request, then we could configure resources to be accessible by A35 Domain. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: add rdc supportPeng Fan2021-08-093-1/+147
| | | | | | | | | | | | | | | | | | | | | There is xrdc inside i.MX8ULP, we need to configure permission to make sure AP non-secure world could access the resources. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: release and configure XRDC at early phaseYe Li2021-08-094-24/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | drivers: misc: s400_api: Update API for fuse read and writeYe Li2021-08-092-1/+87
| | | | | | | | | | | | | | | | | | Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com>
| * | drivers: misc: imx8ulp: Update S400 API for release RDCYe Li2021-08-092-3/+6
| | | | | | | | | | | | | | | | | | The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com>
| * | drivers: misc: imx8ulp: Add S400 API for image authenticationYe Li2021-08-092-2/+127
| | | | | | | | | | | | | | | | | | | | | Add S400 API for image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6Ye Li2021-08-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | According to latest S400 API doc, the the success indicate value is changed to 0xd6. So update the driver codes. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: Update the reset vector in u-bootYe Li2021-08-091-13/+22
| | | | | | | | | | | | | | | | | | | | | | | | Because we have set reset vector to ATF in SPL, have to set it back to ROM for any reset in u-boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: disable wdog3Peng Fan2021-08-091-1/+35
| | | | | | | | | | | | | | | | | | Disable wdog3 which is configured by ROM Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: Enable full L2 cache in SPLYe Li2021-08-091-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SRAM2 is half L2 cache and default to SRAM after system boot. To enable the full l2 cache (512KB), it needs to reset A35 to make the change happen. So re-implement the jump entry function in SPL: 1. configure the core0 reset vector to entry (ATF) 2. enable the L2 full cache 3. reset A35 So when core0 up, it runs into ATF. And we have 512KB L2 cache working. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: soc: Change to use CMC1 to get bootcfgYe Li2021-08-091-1/+1
| | | | | | | | | | | | | | | | | | CMC1 also has a MR register for bootcfg Signed-off-by: Ye Li <ye.li@nxp.com>
| * | drivers: mmc: fsl_esdhc_imx: support i.MX8ULPPeng Fan2021-08-092-5/+9
| | | | | | | | | | | | | | | | | | i.MX8ULP reuse same SDHC IP as i.MX8M, so follow i.MX8M code logic. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: imx8ulp: add clock supportPeng Fan2021-08-099-4/+1558
| | | | | | | | | | | | | | | | | | Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | driver: serial: fsl_lpuart: support i.MX8ULPPeng Fan2021-08-091-1/+1
| | | | | | | | | | | | | | | | | | i.MX8ULP lpuart has same register layout as i.MX7ULP and i.MX8 Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | pinctrl: Add pinctrl driver for imx8ulpYe Li2021-08-093-0/+59
| | | | | | | | | | | | | | | | | | | | | Add pinctrl driver for i.MX8ULP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | net: fec_mxc: support i.MX8ULPPeng Fan2021-08-092-2/+2
| | | | | | | | | | | | | | | | | | | | | Support i.MX8ULP in fec_mxc Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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