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* arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce SPL_SYS_THUMB_BUILDTom Rini2017-03-1877-67/+94
| | | | | | | | | | | | Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for various reasons. We also have cases where we only build SPL in Thumb2 mode due to size constraints and wish to build the rest of the system in ARM mode. So in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to control if we build everything or just SPL (or in theory, just U-Boot) in Thumb2 mode. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
* Kconfig: Disable non-FIT SPL loading for TI secure devicesAndrew F. Davis2017-03-181-2/+2
| | | | | | | | | | Non-FIT SPL image loading support should be disabled for TI secure devices as the image handlers for those image types do not follow our secure boot flow. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: Add option to enable SPL Legacy image supportAndrew F. Davis2017-03-182-2/+16
| | | | | | | | | | | | Add a Kconfig option that enables Legacy image support, this allows boards to explicitly disable this, for instance when needed for security reasons. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Move to common/spl/Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* spl: Convert CONFIG_SPL_ABORT_ON_RAW_IMAGE into a positive optionAndrew F. Davis2017-03-187-13/+18
| | | | | | | | | | | | | | CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it encounters RAW images, express this same functionality as a positive option enabling support for RAW images: CONFIG_SPL_RAW_IMAGE_SUPPORT Also move uses of this to defconfigs. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Rework Kconfig logic a little, move to common/spl/Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2017-03-17106-243/+12558
|\ | | | | | | | | | | This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it booting again (spl_early_init()).
| * rockchip: video: Remove CSC initialization (HDMI)Jernej Skrabec2017-03-161-39/+0
| | | | | | | | | | | | | | | | | | | | Despite the comment in the code, CSC unit is never used. According to the only public description of DW HDMI controller (i.MX6 manual), CSC unit is bypassed in MC_FLOWCTRL register and then actually powered down in MC_CLKDIS register. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: video: Fix HDMI audio clocksJernej Skrabec2017-03-161-16/+16
| | | | | | | | | | | | | | | | Function hdmi_lookup_n_cts() is feed with clock in Hz, which gets compared with clocks in kHz. Fix that by converting all clocks to Hz. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: config: enable the USB host for rk3288 based boardEddie Cai2017-03-163-0/+9
| | | | | | | | | | | | | | | | RK3288 using the dwc2 USB host controller, enable it and other usb host funtion like storage and ethernet. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: dts: tinker: add usb host power supply nodeEddie Cai2017-03-162-0/+23
| | | | | | | | | | | | | | Tinker board have a usb host. add dts node to provide power supply. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3036: dts: bind usb vbus-supply sourceKever Yang2017-03-161-0/+2
| | | | | | | | | | | | | | Bind usb host and otg vbus to its source. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3188: drop CONFIG_SYS_NO_FLASHHeiko Stübner2017-03-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit e856bdcfb492 ("flash: complete CONFIG_SYS_NO_FLASH move with renaming") obsoleted the CONFIG_SYS_NO_FLASH option, which still is in our rk3188_common.h header, resulting in warnings like The following new ad-hoc CONFIG options were detected: CONFIG_SYS_NO_FLASH So also drop it from the rk3188 header. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: Return actual bools in dm_fdt_pre_relocHeiko Stübner2017-03-162-7/+7
| | | | | | | | | | | | | | | | Documentation says that we're returning true/false, not 1/0 so adapt the function to return actual booleans. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: configs: Enable networking support on rk3288 boardsJacob Chen2017-03-164-2/+16
| | | | | | | | | | | | | | | | At current, only firefly and rock2 have network enabled. Let's enable other boards. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: rockchip: enable gmac for rk3288 boardsJacob Chen2017-03-163-2/+24
| | | | | | | | | | | | | | | | Enable gmac interface for rk3288 board dts. use "okay" not "ok" Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dts: rk3036: add sdmmc for rk3036Eddie Cai2017-03-161-0/+13
| | | | | | | | | | | | | | rk3036 support sdmmc, add dts node to support it. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dts: rk3399: add mmc alias for rk3399Eddie Cai2017-03-161-0/+2
| | | | | | | | | | | | | | add mmc alias for rk3399 Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add defconfig for evb-rk3328Kever Yang2017-03-161-0/+36
| | | | | | | | | | | | | | | | | | | | Enable board config for evb-rk3328. SDcard and eMMC boot is OK in this initial version, USB and EMAC function is not available now, will comes later. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add evb-rk3328 supportKever Yang2017-03-167-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | evb-rk3328 is an evb from Rockchip based on rk3328 SoC: - 2 USB2.0 Host port; - 1 USB3.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add sysreset driverKever Yang2017-03-162-0/+46
| | | | | | | | | | | | | | | | Add rk3328 sysreset driver. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add pinctrl driverKever Yang2017-03-164-0/+563
| | | | | | | | | | | | | | | | Add rk3328 pinctrl driver and grf/iomux structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add clock driverKever Yang2017-03-165-0/+684
| | | | | | | | | | | | | | Add rk3328 clock driver and cru structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3328: add soc basic supportKever Yang2017-03-167-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3328: add device tree fileKever Yang2017-03-165-0/+1919
| | | | | | | | | | | | | | | | Add dts binding header for rk3328, files origin from kernel. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: config: rk3399: enable SPL config for evb-rk3399Kever Yang2017-03-163-1/+26
| | | | | | | | | | | | | | | | | | | | | | Enable all the CONFIGs which need by SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Drop CONFIG_ROCKCHIP_DWMMC for now due to build error: Move changes to arch/arm/mach-rockchip/Kconfig to this patch: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: arm64: rk3399: add SPL supportKever Yang2017-03-163-0/+165
| | | | | | | | | | | | | | | | | | Add SPL support for rk3399, default with of-platdata enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Drop Kconfig changes to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: dts: rk3399: update for spl require driverKever Yang2017-03-162-0/+46
| | | | | | | | | | | | | | | | | | | | Add syscon and dmc node, and 'u-boot,dm-pre-reloc' option for required driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: arm64: rk3399: add ddr controller driverKever Yang2017-03-166-0/+3020
| | | | | | | | | | | | | | | | | | RK3399 support DDR3, LPDDR3, DDR4 sdram, this patch is porting from coreboot, support 4GB lpddr3 in this version. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Added rockchip: tag: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: tinker: configs: use correct mmc instance as boot target deviceEddie Cai2017-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are using wrong mmc instance as boot target device now. below Jaehoon Chung's patch use mmc alias which correct it. That make tinker board can not find mmc device. So give it correct mmc device instance. commit 02ad33aa3a84821c8d9a6c4f167f143f6248b084 Author: Jaehoon Chung <jh80.chung@samsung.com> Date: Thu Feb 2 13:41:14 2017 +0900 mmc: mmc-uclass: use the fixed devnum with alias node Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: firefly: configs: remove config_spl_of_platdataJacob Chen2017-03-161-1/+0
| | | | | | | | | | | | | | | | | | | | We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin rather than u-boot-spl-nodtb.bin since we use spl_back_to_brom. I miss it because i forget to clean build-dir.. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3188: Add main, spl and tpl boardsHeiko Stübner2017-03-164-1/+381
| | | | | | | | | | | | | | | | | | The rk3188 needs 3 U-Boot stages: a tpl living in 1KB of sram, a spl the resides in the rest of the sram and loads the regular U-Boot living in regular ram. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add sdram driverHeiko Stübner2017-03-163-0/+1021
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sdram controller blocks are very similar to the rk3288 in utilizing memory scheduler, Designware uPCTL and Designware PUBL blocks, only limited to one bank instead of two. There are some minimal differences when setting up the ram, so it gets a separate driver for the rk3188 but reuses the driver structs, as there is no need to define the same again. More optimization can happen when the modelling of the controller parts in the dts actually follow the hardware layout hopefully at some point in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add core supportHeiko Stübner2017-03-167-0/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3188: Add core devicetree filesHeiko Stübner2017-03-162-0/+1018
| | | | | | | | | | | | | | | | | | | | The rk3188 shares a lot of peripherals with the rk3066 and thus has a common include called rk3xxx.dtsi. Add both this one and the specialized rk3188 on top of it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add clock driverHeiko Stübner2017-03-163-0/+719
| | | | | | | | | | | | | | | | | | Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add rk3066/rk3188 clock bindingsHeiko Stübner2017-03-163-0/+336
| | | | | | | | | | | | | | | | | | | | | | Bring in required device clock binding files from Linux. The clock trees for rk3066 and rk3188 are largely similar, which makes them share the common parts in a shared header. While we focus on rk3188 for now, bring in both headers already for completeness sake. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add sysreset driverHeiko Stübner2017-03-162-0/+48
| | | | | | | | | | | | | | | | Driver for the sysreset of Rockchip rk3188 socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add pinctrl driverHeiko Stübner2017-03-163-0/+621
| | | | | | | | | | | | | | | | | | Add a driver which supports pin multiplexing setup for the most commonly used peripherals. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3188: Add header files for PMU and GRFHeiko Stübner2017-03-162-0/+625
| | | | | | | | | | | | | | | | | | PMU is the power management unit and GRF is the general register file. Both are heavily used in U-Boot. Add header files with register definitions. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: serial: Adapt rockchip of-platdata driver for rk3188Heiko Stübner2017-03-161-1/+18
| | | | | | | | | | | | | | | | | | Add necessary structs to have the driver also work for the serial on the rk3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: mkimage: Add support rk3188 serialHeiko Stübner2017-03-161-0/+1
| | | | | | | | | | | | | | | | Add the entry for the rk3188 requiring rc4-encryption of the SPL. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: mkimage: Allow encoding of loader code in spl imagesHeiko Stübner2017-03-165-4/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip SoCs allow the spl code to be rc4-encoded, not only the image header, but only newer SoCs allow this encoding to be disabled. The rk3188 is not part of those and requires its boot code to be rc4-encoded with the regular key. So add the ability to do this encoding via a setting on a per-soc basis when building spl images. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: Move bootrom-related declarations to a headerHeiko Stübner2017-03-163-3/+25
| | | | | | | | | | | | | | | | | | | | So far spl-boards have declared the back_to_brom() function as simple extern in the files themself. That doesn't scale well if every boards defines this on its own. Therefore move the declarations to a bootrom header. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: Move bootrom helper compilation to a hidden optionHeiko Stübner2017-03-162-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now the ROCKCHIP_SPL_BACK_TO_BROM option both triggers compilation of the bootrom hook-code as well as enabling the behaviour of loading the full U-Boot via the boot. New added socs may always need the bootrom code, while still being able to decide between loading U-Boot regularly or via the bootrom separately. So move the compilation of the bootrom code to a hidden option that gets selected by ROCKCHIP_SPL_BACK_TO_BROM, but can also be selected by other parts. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3288: sdram: style fixes from rk3188 sdram reviewHeiko Stübner2017-03-161-28/+31
| | | | | | | | | | | | | | | | | | | | The sdram IP blocks used on rk3066, rk3188 and rk3288 are very similar and we want to unify things once all 3 work as expected. Therefore try to keep the rk3288 sdram driver in line by applying the general review comments received for the rk3188 variant to it as well. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3288: sdram: use constants in ddrconf tableHeiko Stübner2017-03-162-10/+18
| | | | | | | | | | | | | | | | Use defines to describe the bit shifts used to create the table for ddrconf register values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: clk: rk3288: limit gpll and cpll init to SPL buildHeiko Stübner2017-03-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | The gpll and cpll init values are only used in rk_clk_init in the SPL and therefore produce compile time warnings in regular uboot builds. Fix that with an #ifdef. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: allow limiting pre-reloc markings to spl or tplHeiko Stübner2017-03-168-4/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now the u-boot,dm-pre-reloc flag will make each marked node always appear in both spl and tpl. But systems needing an additional tpl might have special constraints for each, like the spl needing to be very tiny. So introduce two additional flags to mark nodes for only spl or tpl environments and introduce a function dm_fdt_pre_reloc to automate the necessary checks in code instances checking for pre-relocation flags. The behaviour of the original flag stays untouched and still marks a node for both spl and tpl. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: arm64: rk3399: syscon addition for rk3399Kever Yang2017-03-162-0/+42
| | | | | | | | | | | | | | | | | | | | rk3399 has different syscon registers which may used in spl, add to support rk3399 spl. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: pinctrl: rk3399: add the of-platdata supportKever Yang2017-03-161-1/+4
| | | | | | | | | | | | | | | | | | Do not use the API which of-platdata not support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rockchip: sdhci: rk3399: update driver to support of-platdataKever Yang2017-03-161-1/+16
| | | | | | | | | | | | | | | | | | Change some API in order to enable of-platdata. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
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