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* rsa: sig: fix config signature check for fit with paddingPhilippe Reynes2020-05-011-1/+1
| | | | | | | | | | | | | | The signature check on config node is broken on fit with padding. To compute the signature for config node, U-Boot compute the signature on all properties of requested node for this config, except for the property "data". But, when padding is used for binary in a fit, there isn't a property "data" but two properties: "data-offset" and "data-size". So to fix the check of signature, we also don't use the properties "data-offset" and "data-size" when checking the signature on config node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* test/py: vboot: add a test to check fit signature on fit with paddingPhilippe Reynes2020-05-011-19/+33
| | | | | | | | The pytest vboot does all his tests on fit without padding. We add the same tests on fit with padding. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* hush: avoid NULL check before free()Heinrich Schuchardt2020-05-011-2/+1
| | | | | | | | free() checks if its argument is NULL. Don't duplicate this in the calling code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* fs: ext4: avoid NULL check before free()Heinrich Schuchardt2020-05-011-10/+5
| | | | | | | free() checks if its argument is NULL. Don't duplicate this in the calling code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* cmd/gpt: avoid NULL check before free()Heinrich Schuchardt2020-05-011-4/+2
| | | | | | | | free() checks if its argument is NULL. Do not duplicate this in the calling code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* tools/fit-image: print a warning when cmd-line for dtc might be truncatedSven Roederer2020-05-011-0/+4
| | | | Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
* tools/mkimage: fix handling long filenamesSven Roederer2020-05-011-1/+1
| | | | | | | | | | | | | | | The cmdline for calling the dtc was cut-off when using long filenames (e.g. 245 bytes) for output-file and datafile of "-f" parameter. For FIT-images cmd[MKIMAGE_MAX_DTC_CMDLINE_LEN] is declared (hardcoded 512 bytes), and contains some static values, the path of a tmpfile and a datafile. tmpfile is max MKIMAGE_MAX_TMPFILE_LEN (256) and datafile might be also this size. Having two very long pathname results in a truncation os the executed shell command, as the truncated datafile path will not be found. Redefine MKIMAGE_MAX_DTC_CMDLINE_LEN to "2 * MKIMAGE_MAX_TMPFILE_LEN + 35 for the parameters. This likely applies to the "-d" parameter, too. Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
* arm: enable distro boot for bananapi-r2Matthias Brugger2020-05-012-5/+22
| | | | | | | This patch enables distro boot for the bananapi-r2, based on a MediaTek mt7623n. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* watchdog MediaTek add upstream compatibleMatthias Brugger2020-05-011-0/+1
| | | | | | | The upstream compatible is called mt6589-wdt. Add this compatible to the driver. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* timer MediaTek use upstream compatibleMatthias Brugger2020-05-011-0/+1
| | | | | | | The timers compatible string in upstream is called mt6577-timer. Add this compatible to the driver. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* doc: describe the analysis of crash dumpsHeinrich Schuchardt2020-05-013-0/+143
| | | | | | | Provide an overview of the analysis of U-Boot crash dumps. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
* rtc: pcf2127: don't add/subtract 1 to tm_monRasmus Villemoes2020-05-011-2/+2
| | | | | | | | | | | | As noted in rtc_def.h, the tm_mon field in struct rtc_time is 1-12, unlike in struct tm where it is 0-11. Currently, running "date" prints the wrong Date: 2020-04-01 (Friday) Time: 13:05:30 and setting the RTC via the date command is also broken. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
* arm: caches: manage phys_addr_t overflow in mmu_set_region_dcache_behaviourPatrick Delaunay2020-05-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Solved the overflow on phys_addr_t type for start + size in mmu_set_region_dcache_behaviour() function. This overflow is avoided by dividing start and end by 2 before addition, and we only expecting that start and size are even. This patch doesn't change the current function behavior if the parameters (start or size) are not aligned on MMU_SECTION_SIZE. For example, this overflow occurs on ARM32 with: start = 0xC0000000 and size = 0x40000000 then start + size = 0x100000000 and end = 0x0. For information the function behavior change with risk of regression, if we just shift start and size before the addition. Example with 2MB section size: MMU_SECTION_SIZE 0x200000 and MMU_SECTION_SHIFT = 21 with start = 0x1000000, size = 0x1000000, - with the proposed patch, start = 0 and end = 0x1 as previously - with the more simple patch: end = (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT) the value of end change: start >> 21 = 0, size >> 21 = 0 and end = 0x0 !!! Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arm: caches: add DCACHE_DEFAULT_OPTIONPatrick Delaunay2020-05-012-9/+10
| | | | | | | | | | | | Add the new flags DCACHE_DEFAULT_OPTION to define the default option to use according the compilation flags CONFIG_SYS_ARM_CACHE_*. This new compilation flag allows to simplify dram_bank_mmu_setup() and can be used as third parameter (option=dcache option to select) of mmu_set_region_dcache_behaviour function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* arm: caches: protect dram_bank_mmu_setup access to bi_dramPatrick Delaunay2020-05-011-0/+4
| | | | | | | | | | | | | | Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram before relocation. This patch allow to use the generic weak function dram_bank_mmu_setup to activate the MMU and the data cache in SPL or in U-Boot before relocation, when bd->bi_dram is not yet initialized. In this cases, the MMU must be initialized explicitly with mmu_set_region_dcache_behaviour function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* configs: migrate CONFIG_SYS_ARM_CACHE_* in KconfigPatrick Delaunay2020-05-015-5/+28
| | | | | | | | | | | | | Move CONFIG_SYS_ARM_CACHE_WRITETHROUGH and CONFIG_SYS_ARM_CACHE_WRITEALLOC into Kconfig done by moveconfig.py. Kconfig uses a choice between the 3 values supported in U-Boot, including the new configuration CONFIG_SYS_ARM_CACHE_WRITEBACK (the default configuration). The patch also avoids to select simultaneously 2 configurations. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* tiny-printf: Support %iMarek Vasut2020-05-011-1/+2
| | | | | | | | | The most basic printf("%i", value) formating string was missing, add it for the sake of convenience. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spiWIP/30Apr2020Tom Rini2020-04-3019-1176/+1059
|\ | | | | | | | | - distro boot support for SPI flash - sifive spi flash driver
| * sifive: fu540: Enable spi-nor flash supportJagan Teki2020-04-302-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HiFive Unleashed A00 support is25wp256 spi-nor flash, So enable the same and add test result log for future reference. Tested on SiFive FU540 board. Thanks to Sagar for various use cases and tests. [QUAD mode in dt with spi-tx-bus-width: <4>] pp opcode = 0x34 [QUAD MODE] read opcode = 0x6c [QUAD MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc [SPI MODE in dt with spi-tx-bus-width: <1>] pp opcode = 0x12 [SPI MODE] read opcode = 0xc [SPI MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
| * riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsiJagan Teki2020-04-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add U-Boot specific dts file for hifive-unleashed-a00, this would help to add u-boot specific properties and other node changes without touching the base dts(i) files which are easy to sync from Linux. Added spi2 alias for qspi2 as an initial u-boot specific property change. spi probing in current dm model is very much rely on aliases numbering. Even though the qspi2 can't come under any associated spi nor flash it would require to specify the same to make proper binding happen for other spi slaves. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
| * spi: sifive: Fix QPP transferJagan Teki2020-04-301-20/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The guessed reason is that the existing logic of filling tx fifo with data, rx fifo with NULL for tx transfer and filling rx fifo with data, tx fifo with NULL for rx transfer is not clear enough to support the Quad Page Program.     SiFive SPI controllers have specific sets of watermark registers and SPI I/O directions bits in order to program SPI controllers clear enough to support all sets of operating modes.     Here is the exact programing sequence that would follow on this patch and tested via SPI-NOR and MMC_SPI.     - set the frame format proto, endian - set the frame format dir, set it for tx and clear it for rx - TX transfer:   fill tx fifo with data.   wait for TX watermark bit to clear. - RX transfer:   fill tx fifo with 0xff.   write nbytes to rx watermark register   wait for rx watermark bit to clear.   read the rx fifo data. So, this patch adopts this program sequence and fixes the existing I/O direction bit. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
| * spi: sifive: Fix format register proto fieldJagan Teki2020-04-301-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SiFive SPI controller has a proto bit field in frame format register which would be used to configure the SPI I/O protocol lines used on specific transfer.  Right now the driver is configuring this proto using slave->mode, for all types of transctions. This makes the driver unable to function since the proto needs to configure dynamically for each and every transaction separately at runtime. Now, the controller driver supports per transfer via spi-mem exec_opo, so add the fmt_proto flag and fill the per transfer buswidth so that the controller configures the proto bit at runtime. This patch fixes the SPI controller works with SPI NOR flash on quad read with page program. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
| * spi: sifive: Add spi-mem exec opJagan Teki2020-04-301-1/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SiFive SPI controller is responsible to handle the slave devices like mmc spi and spi nor flash. The controller is designed such a way that it would handle the slave transactions based on the I/O protocol numbers, example if spi nor slave send quad write opcode it has to send alone with I/O protocol number of 4 and if it try to send data it has to send I/O protocol number along with 4 line data. But the current spi-xfer code from spi-mem is combining the opcode and address in a single transaction, so the SPI controller will be unable to identify the I/O protocol number of opcode vs address. So, add the spi-mem exec_op with spi-xfer of opcode, address and data as a separate transaction. This doesn't remove the .xfer of dm_spi_ops since mmc spi will make use of it. Note: This code might have moved to the spi-mem core area once we have done the dedicated tests on other controllers and have real reason to move. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
| * mtd: spi-nor-ids: Add Spansion s25fs512s flash entryKuldeep Singh2020-04-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Spansion "s25fs512s" flash is incorrectly decoded as "s25fl512s" on various platforms as former is not present. Add the entry. Linux already has both the flashes present. A snippet below: { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256...}, { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256...}, Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * watchdog: kconfig: Enable designware for rk3399Jagan Teki2020-04-301-0/+1
| | | | | | | | | | | | | | | | Enable designware watchdog driver for rk3399 if WDT defined. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256Jagan Teki2020-04-301-1/+2
| | | | | | | | | | | | | | | | IS25WP256 flash chips do support 4byte address opcodes, so enable support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
| * mtd: spi-nor: Enable QE bit for ISSI flashJagan Teki2020-04-302-0/+2
| | | | | | | | | | | | | | | | | | | | Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: sifive: Tidy up dm_spi_slave_platdata variableJagan Teki2020-04-301-15/+15
| | | | | | | | | | | | | | | | | | | | | | Usually variable name slave is used for spi_slave structure and slave_plat for the dm_spi_slave_platdata. Let's follow this meaningful notation by replacing slave with slave_plat for dm_spi_slave_platdata structure. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * rk3399: Enable SF distro bootcmdJagan Teki2020-04-302-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPI flash(SF) distro boot command in rk3399. This distro boot will read the boot script at specific location at the flash and start sourcing the same. Included the SF device at the last of the target devices list since all the rest of the devices on the list have more possibility to boot the distribution due to the size of the SPI flash is concern. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rk3399: Add boot flash script offset, sizeJagan Teki2020-04-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Most of the SPI flash devices in rockchip (rk3399) are 16MiB size. So, let's use the script offset at the end of 8K.  This way it cannot overlap any offsets being used by software components in flash layout. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * environment: distro: Add SF distro commandJagan Teki2020-04-291-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add distro boot command support for SPI flash (SF). This distro boot will read the boot script at specific location at the flash and start sourcing the same. This file need to include on required include/config file. Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enumTudor Ambarus2020-04-292-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit: 0ebb261a0b2d ("spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum") in linux. When defining spi_mem_op templates we don't necessarily know the size that will be passed when the template is actually used, and basing the supports_op() check on op->data.nbytes to know whether there will be data transferred for a specific operation is not possible. Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum so that we can base our checks on op->data.dir instead of op->data.nbytes. This also fixes a bug identified with the atmel-quaspi driver. The spi-nor core, when erasing sectors, fills the spi_mem_op template using SPI_MEM_OP_NO_DATA, which initializes all the data members with value zero. This is wrong because data.dir is treated as SPI_MEM_DATA_IN, which translates in our driver to read accesses for erases (RICR), while the controller expects write accesses (WICR). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: nand: spi: add support for Toshiba TC58CVG2S0HRAIJRobert Marko2020-04-291-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Toshiba recently launched new revisions of their serial SLC NAND series. TC58CVG2S0HRAIJ is a refresh of previous series with minor improvements. Basic parameters are same so lets add support for this new revision. Datasheet: https://business.kioxia.com/info/docget.jsp?did=58601&prodName=TC58CVG2S0HRAIJ Signed-off-by: Robert Marko <robert.marko@sartura.hr> Tested-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi-nand: Import Toshiba SPI-NAND supportRobert Marko2020-04-294-1/+194
| | | | | | | | | | | | | | | | | | Linux has good support for Toshiba SPI-NAND, so lets import it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Tested-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi-nor: Enable dual and quad read for s25fl256s0Bacem Daassi2020-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | The s25fl256s0 supports dual and quad read like s25fl256s1. Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags to the flash_info entry. Tested on real silicon and confirmed to be working. Signed-off-by: Bacem Daassi <Bacem.Daassi@cypress.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*Kuldeep Singh2020-04-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") enables octal mode(1-1-8) support in spi-nor framework. mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable SPI_NOR_OCTAL_READ flag for these flashes. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: cadence-qspi: Move ref clock calculation to probePratyush Yadav2020-04-291-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "assigned-clock-parents" and "assigned-clock-rates" DT properties take effect only after ofdata_to_platdata() when clk_set_defaults() is called in device_probe(). Therefore clk get rate() would return a wrong value in ofdata_to_platdata() when compared with probe. Hence it needs to be moved to probe. Tested on u-boot-ti/next. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: use is_power_of_2 instead of hweight32 in spi_nor_write()Rasmus Villemoes2020-04-291-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | hweight32 is a somewhat expensive way to check for power-of-2. Use the is_power_of_2 helper, which does the standard and cheap idiom foo&(foo-1)==0. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-96 (-96) Function old new delta spi_nor_write 388 292 -96 Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: Transform the FSL QuadSPI driver to use the SPI MEM APIKuldeep Singh2020-04-292-1114/+608
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support the SPI MEM API, instead of modifying the existing U-Boot driver, this patch adds a port of the existing Linux driver. This also has the advantage that porting changes and fixes from Linux will be easier. Porting of driver left most of the functions unchanged while few of the changes are: -Remove lock(mutexes) and irq handler as u-boot is a single core execution. -Remove invalid masterid as it was required specially for multicore execution in LS2088ARDB which is not the case in u-boot. -Remove clock support as changing spi speed is not supported in uboot and nor in linux. Currently tested on LS1088ARDB, LS1012ARDB, LS1046ARDB, LS1046AFRWY, LS1043AQDS, LS1021ATWR, LS2088ARDB, I.MX6ULL EVK. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge tag 'efi-2020-07-rc2' of ↵Tom Rini2020-04-3011-140/+179
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-07-rc2 This pull request contains bug fixes needed due to the merged changes for EFI secure boot. Patches are supplied to identify EFI system partitions.
| * | efi_loader: fix 'efidebug bootorder'Heinrich Schuchardt2020-04-301-21/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | * don't copy GUIDs for no reason * shorten print format strings by using variable names * don't use the run-time table to access exported functions * check the result of malloc() (fixes Coverity CID 300331) Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | efi_loader: efidebug, avoid illegal memory accessHeinrich Schuchardt2020-04-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For EFI_PERSISTENT_MEMORY_TYPE the 'efidebug memmap' command produces an illegal memory access. * Add the missing descriptive string for EFI_PERSISTENT_MEMORY_TYPE. * Replace the check for EFI_MAX_MEMORY_TYPE by the ARRAY_SIZE() macro. Reported-by: Coverity (CID 300336) Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | efi_loader: fix 'efidebug boot dump'Heinrich Schuchardt2020-04-301-25/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Do not recreate a variable name that we already have as u16 string. * Check the return value of malloc() * EFI_NOT_FOUND cannot occur for a variable name returned by GetNextVariableName(). Remove a print statement. * Don't copy a GUID for no reason. * Don't use the run-time service table to call exported functions. * Don't pass NULL to show_efi_boot_opt_data() (fixes Coverity CID 300338). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | MAINTAINERS: assign test/py/tests/test_efi*/ to EFI PAYLOADHeinrich Schuchardt2020-04-301-0/+1
| | | | | | | | | | | | | | | | | | | | | Some UEFI related files are not assigned currently. Add them to the EFI PAYLOAD area. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | efi_loader: remove CONFIG_EFI_SECURE_BOOT in efi_loader.hAKASHI Takahiro2020-04-301-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | The guard doesn't make any difference, so remove it. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | doc/efi: rework secure boot descriptionHeinrich Schuchardt2020-04-301-48/+62
| | | | | | | | | | | | | | | | | | | | | Ensure a uniform formatting. Some rephrasing. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | efi_loader: identify EFI system partitionHeinrich Schuchardt2020-04-302-0/+27
| | | | | | | | | | | | | | | | | | | | | In subsequent patches UEFI variables shalled be stored on the EFI system partition. Hence we need to identify the EFI system partition. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | part: detect EFI system partitionHeinrich Schuchardt2020-04-304-13/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Up to now for MBR and GPT partitions the info field 'bootable' was set to 1 if either the partition was an EFI system partition or the bootable flag was set. Turn info field 'bootable' into a bit mask with separate bits for bootable and EFI system partition. This will allow us to identify the EFI system partition in the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | efi_loader: remove superfluous NULL check in bootefi.cHeinrich Schuchardt2020-04-301-4/+2
| | | | | | | | | | | | | | | | | | | | | efi_free_pool() and efi_delete_handle() both check if their argument is NULL. The caller should not duplicate this check. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | test/py: fix test_efi_secboot/conftest.pyHeinrich Schuchardt2020-04-301-24/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If udisksctl is present test/py/tests/test_efi_secboot/conftest.py fails because the disk image is never mounted. Normal users can only mount fuse file systems. Unfortunately fusefat is still in an experimental state and seems not to work here correctly. So as we have to be root or use the sudo command anyway delete all coding referring to udisksctl. -- We should not use mount point /mnt as this directory or one of its sub-directories might already be in use as active mount points. Instead create a new directory in the build root as mount point. -- Remove debug print statements that have been commented out. print without parentheses is anyway invalid in Python 3. And pytest anyway filters out the output if there is no exception reported. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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