| Commit message (Collapse) | Author | Age | Files | Lines |
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When dma_addr_t is u32 in 64-bit, there are some warnings when
building NVME driver. Fix it by doing an additional (long) cast.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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coreboot makes it possible to add own entries into coreboot's
table at a per mainboard basis. As there might be some custom
ones it makes sense to provide a way to process them.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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- arndale fixes
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Arndale board has an Asix AX88760 USB 2.0 Hub and Fast Ethernet combo.
The appropriate driver for it is USB_ETHER_ASIX.
The mistake probably came from misinterpretation of commit e9954b867ce0
("usb: eth: add ASIX AX88179 DRIVER") which was tested on RECS5250 COM
module. This module indeed has Exynos5250 and some similarities with
Arndale 5250 board but the USB/Ethernet chip used there is apparently
different.
Fixes: f58ad98a621c ("usb: net: migrate USB Ethernet adapters to Kconfig")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The CONFIG_DM_I2C_COMPAT was introduced in
include/configs/exynos5-common.h in commit 189d80166b31 ("exynos5:
enable dm i2c") and then it propagated up to configs/arndale_defconfig.
However since beginning the Arndale board (Exynos5250) was not using
I2C.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus. This setting can be thus safely removed to fix build
warning:
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The CONFIG_POWER and CONFIG_POWER_I2C were introduced in
include/configs/exynos5-common.h in commit 19bd3aaa5991 ("exynos5: fix
build break by adding CONFIG_POWER") and then it propagated up to
include/configs/arndale.h. However before that commit, there was no
build break at all on Arndale and SMDK5250 boards. It seems the commit
fixed nothing and just added unused defines.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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- SoCFPGA DT and reset cleanup, AE MCVEVK board support.
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Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle
the bridges on/off as needed according to the handoff file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
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Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi
into separate dtsi header file to make it easier to patch in custom handoff
dtsi files, without having to manually add the U-Boot bits. Shuffle the include
clauses in the A10 DT files to make it obvious what gets included where without
having to follow confusing long chain of includes, i.e. board DT file includes
everything it needs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
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Re-add support for Aries Embedded MCV SoM, which is CycloneV based
and the associated MCVEVK and MCVEVP baseboard. The board can boot
from eMMC. Ethernet and USB is supported.
The Aries Embedded boards have been removed with commit 03b54997d568
("board/aries: Remove"). I will now take care of them.
The device-tree files are from mainline Linux commit e93c9c99a629
("Linux v5.1)".
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
CC: Marek Vasut <marex@denx.de>
CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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commit c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset")
has removed the call to 'reset_deassert_peripherals_handoff()' from
socfpga gen5 SPL since the reset driver now handles resets. However,
commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
has re-added this ad-hoc reset code, so that all peripherals were now
again enabled instead of letting the drivers enable them by request.
While at it, remove this function for gen5 as it should not be used.
Fixes: commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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- Align env position on GR-Peach with downstream U-Boot.
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Move the U-Boot environment to 0x80000 to match the downstream
vendor fork and allow easy migration from one to the other.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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- micrel, ti PHY fixes
- rtl8169, mtk-eth fixes
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In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the
node itself:
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
reg = <0>;
}
However the driver used ofnode_find_subnode("phy-handle") to read the node.
It will always fail.
This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to
make sure the node can be read correctly.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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There is a need to fill node before clk_output_sel is setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: <hannes.schmelzer@br-automation.com>
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Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from
KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns
that you shouldn't select both of them due to a device ID clash between
the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a
system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately
boards like the SAMA5D3xEK do contain both types of PHY, but fortunately
the Linux Micrel PHY driver provides a solution by using different PHY
ID and mask values to distinguish these chips.
This commit contains the following changes:
- The PHY ID and mask values for the KSZ9021 and the KS8721 now match
those used by the Linux driver.
- The warnings about not enabling both drivers have been removed.
- The description for PHY_MICREL_KSZ8XXX has been corrected (these are
10/100 PHYs, not GbE PHYs).
- PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE
since this is selected by PHY_MICREL_KSZ90X1.
- All of the relevant defconfig files have been updated now that
PHY_MICREL_KSZ8XXX does not default to 'Y'.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
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Disable unused PINCTRL_FULL flag.
Series-cc: pde, cke, pch, uboot-stm32
Cover-letter:
SPI flash STM32 MCU's fixes
This series update MCU's DT in order to fix SPI flash
configuration:
- Adds MPU region dedicated for SPI flash used in memory mapped mode.
- Fixes compatible string.
- Fixes memory map size.
- Updates spi-tx-bus-width and spi-rx-bus-width property values.
- Adds QSPI flash support for STM32F469-disco board
END
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Enable CMD_SF, MTD, DM_SPI_FLASH, SPI_FLASH, SPI, DM_SPI and
STM32_QSPI flags to be able to use the embedded n25q128a QSPI flash
on stm32f469-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Allow to select STM32_QSPI driver on STM32F4 SoCs.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add device tree nodes to support qspi for stm32f469-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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As mx66l512 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Compatible string "micron,n25q128a13" is useless, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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As n25q128 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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As n25q512a qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add missing flash compatible string to be able to read/write into
qspi flash.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Add missing flash compatible string to be able to read/write into
qspi flash.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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stm32f746-disco embeds a 16Mb qspi flash, stm32f746-eval and
stm32f769-disco embeds a 64Mb qspi flash.
Update the reg property accordingly
Remove deprecated memory-map property.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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The Quad-SPI interface is able to manage up to 256Mbytes Flash
memory starting from 0x90000000 to 0x9FFFFFFF in the memory
mapped mode.
Add a dedicated MPU region into stm32_region_config.
See application note AN4760 available at www.st.com
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Pull request for UEFI sub-system for v2019.07-rc3
The development target for the UEFI sub-system is EBBR compliance. We have
already implemented some further protocols to enable running the UEFI Shell
and the UEFI SCT test suite.
As some boards are severely memory constrained make some of these extras
customizable.
Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory
allocation tests.
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Describe that efi_install_fdt() defaults to using the device tree
indicated by environment variable fdtcontroladdr.
ACPI tables and device trees are mutually exclusive.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Move duplicate initialization code to single instance.
Adjust comments of concerned functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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The device path to text protocol renders ACPI device nodes incorrectly.
Use capital hexadecimal numbers as shown in the UEFI spec examples.
Always output the optional UID. This matches what UEFI SCT expects and
saves us an `if`.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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UEFI SCT uses this call sequence to determine the current TPL level inside
notification functions:
OldTpl = BS->RaiseTPL(TPL_HIGH_LEVEL);
BS->RestoreTPL(OldTpl);
In RestoreTPL() we trigger the notification function of queued events. If
we do not mark the event as non-queued before calling the notification
function, this results in an infinite recursive call sequence.
Mark the event as non-queued before entering the notification function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Replace unnecessary control structures by using return statements.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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If AllocatePages() is called with AllocateAddress, the UEFI spec requires
to return EFI_NOT_FOUND in case the memory page does not exist.
The UEFI SCT II 2017 spec additionally requires to return EFI_NOT_FOUND if
the page is already allocated.
Check that *Memory refers to an unallocated page.
UEFI SCT II (2017): AllocatePages(), 5.1.2.1.9 - 5.1.2.1.10
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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According to the UEFI AllocatePages() has to return EFI_OUT_OF_RESOURCES if
sufficient memory is not available.
Change the return value.
UEFI SCT II (2017): 3.2.1 AllocatePages(), 5.1.2.1.8
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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When we call FreePages() we essentially add memory to our memory map. We
shouldn't do this for memory that does not exit.
Check if the memory that is to be freed via FreePages() or FreePool() is in
our memory map and is not EFI_CONVENTIONAL_MEMORY.
This check is mandated by the UEFI specification.
Cf. UEFI SCT II (2017), 3.2.2 FreePages(), 5.1.2.1 - 5.1.2.2
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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According to the UEFI specification UninstallProtocolInteface() has to
return EFI_NOT_FOUND if the interface is not found.
Correct the return value.
Cf. UEFI SCT II spec (2017), 3.3.2 UninstallProtocolInterface(), 5.1.3.2.4
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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efi_search_protocol() already checks that the GUID matches. Don't check
a second time.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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A parameter check in LocateDevicePath() does not match the requirements of
the UEFI spec.
If device is NULL, only return EFI_INVALID_PARAMETER if a matching handle
is found.
Cf. UEFI SCT II specification (2017)3.3.7 LocateDevicePath(), 5.1.3.7.3
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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%s/not buffer/no buffer/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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The device path to text protocol is not needed for EBBR compliance. So
let's make it a customizable option.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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The Unicode collation protocol is not needed for EBBR compliance. So let's
make it a customizable option.
The Unicode capitalization table is only needed by this protocol. So let it
depend on the Unicode collation protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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No need to mention U-Boot in brief description.
Fix several typos, mention iPXE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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