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| * | net: mvpp2: increase PHY reset pulseBaruch Siach2018-10-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default Linux PHY reset delay is 10ms. This is also the requirement for Marvell 88E151x PHYs, which are likely to be used with this Ethernet MAC. Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | net: mvpp2: fix polarity of PHY reset signalBaruch Siach2018-10-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dm_gpio_set_value() call sets the logical level of the GPIO signal. That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The driver needs to assert the reset, and then deassert it. Not the other way around. Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | net/phy: Add phy-id for IN112525_S03Priyanka Jain2018-10-241-3/+4
| | | | | | | | | | | | | | | Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: dm: fec: Obtain the transceiver type from the DTMartin Fuzzey2018-10-241-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | The DT property "phy-mode" already provides the transceiver type. Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: dm: fec: Support the phy-supply bindingMartin Fuzzey2018-10-242-0/+23
| | | | | | | | | | | | | | | | | | | | | Configure the phy regulator if defined by the "phy-supply" DT phandle. Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: dm: fec: Fix phy-reset-duration clamping and defaultsMartin Fuzzey2018-10-241-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT binding says: - phy-reset-duration : Reset duration in milliseconds. Should present only if property "phy-reset-gpios" is available. Missing the property will have the duration be 1 millisecond. Numbers greater than 1000 are invalid and 1 millisecond will be used instead. However the current code: - clamps values greater than 1000ms to 1000ms rather than 1. - does not initialize the delay if the property does not exist (else clause mismatch) - returns an error if phy-reset-gpios is not defined Fix all this and simplify by using dev_read_u32_default() Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: dm: fec: Fix time unit error in phy-reset-durationMartin Fuzzey2018-10-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT binding says that phy-reset-duration is in ms, but the driver currently uses udelay(). Switch to mdelay() to fix this. Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: aquantia: autodetect if firmware needs to be loadedJeremy Gebben2018-10-241-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the phy reports a valid firmware version and doesn't indicate a fault, skip loading the firmware. This allows the same image to be used on boards that have firmware storage and those that do not. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: aquantia: add firmware loading supportJeremy Gebben2018-10-242-2/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aquantia phys have firmware that can be loaded automatically from storage directly attached to the phy or via MDIO commands. Add support for loading firmware from either a file or a raw location on an MMC device. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | configs: migrate CONFIG_PHY_AQUANTIA to KconfigJeremy Gebben2018-10-2455-61/+48
| | | | | | | | | | | | | | | | | | | | | The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | miiphy: Add function to retrieve MDIO bus list headPankaj Bansal2018-10-242-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In upcoming freescale board LX2160AQDS, the MDIO bus is muxed. i.e. same MDIO bus can be routed to eight different slots depending on mux register settings. To support this mdio mux behavior, we add each MDIO bus mux as a separate MDIO bus. Now, various phy devices can be attached to each of these slots(mux). The information about these devices is passed to OS via device tree. To do the fdt fixups related to MDIO bus, its necessary that MDIO bus list is accessed.Therefore, add a function to retrieve the list head. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | cmd: mii: don't check address for 'device' subcommandHector Palacios2018-10-241-1/+1
| |/ | | | | | | | | | | | | | | All mii operations require a valid PHY address except the 'device' command, which expects the PHY name rather than the address. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini2018-10-25144-282/+9488
|\ \ | |/ |/| | | Merged imx8 architecture, fix build for imx8 + warnings
| * arm: dts: imx8qxp: fix build wariningPeng Fan2018-10-251-2/+0
| | | | | | | | | | | | | | | | | | | | Fix below build warning. arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size): /regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: mkimage: avoid stop CI when required files not existsPeng Fan2018-10-252-2/+37
| | | | | | | | | | | | | | | | | | | | | | | | Introduce a new script to check whether file exists and use that check in Makefile to avoid break CI system. The script return 1 when the required files not exists, return 0 when files exists. The script will ignore check to u-boot-dtb.bin, because if there is something wrong to generate u-boot-dtb.bin, there must be some code error. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfigFabio Estevam2018-10-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add an entry for the warp7_bl33_defconfig target. This fixes the following warnings: WARNING: no status info for 'warp7_bl33' WARNING: no maintainers for 'warp7_bl33' Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
| * serial: mxc: Add match string for i.mx6 quad/dual lite serialBernhard Messerklinger2018-10-221-0/+1
| | | | | | | | | | | | Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
| * warp7: configs: add bl33 defconfigRui Miguel Silva2018-10-221-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add default configuration to run u-boot as BL33 in the ARM Trusted Firmware boot flow for AArch32 case. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: u-boot@lists.denx.de
| * warp7: include: configs: set skip low level initRui Miguel Silva2018-10-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | If we have defined the OPTEE ram size and not OPTEE means that we are in the case where OPTEE is loaded already (maybe by ARM Trusted Firmware) and that most of the low level initialization is already done and that we may/should skip it doing them here. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: u-boot@lists.denx.de
| * optee: adjust dependencies and default values for dramRui Miguel Silva2018-10-222-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We may have, the not yet considered, scenario where OPTEE is loaded before u-boot and *not* by u-boot, e.g, the boot flow using the ARM Trusted Firmware (ATF), where in the 32bit flow is: BootRom->ATF(BL2)->Optee(BL32)->u-boot(BL33) In this case we need still to reserve the memory used by optee, to avoid for example to realocate ourself to the same address at the end of DRAM. So, we change here the dependencies on the OPTEE lib and we set the default size and base of TZRAM to zero. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Ryan Harkin <ryan.harkin@linaro.org> Cc: u-boot@lists.denx.de
| * imx: mx7: avoid some initialization if low level is skippedRui Miguel Silva2018-10-222-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can have the case where u-boot is launched after some other low level enabler, like for example when u-boot runs after arm-trusted-firmware and/or optee. So, because of that we may need to jump the initialization of some IP blocks even because we may no longer have the permission for that. So, if the config option to skip low level init is set disable also timer, board and csu initialization. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Peng Fan <peng.fan@nxp.com> Cc: u-boot@lists.denx.de Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * i2c: imx_lpi2c: fix typo and register base address formatAnatolij Gustschin2018-10-221-2/+2
| | | | | | | | | | | | | | Output the register base address in hex notation. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * Kconfig: Convert CONFIG_IMX_WATCHDOG to KconfigXiaoliang Yang2018-10-2221-18/+18
| | | | | | | | | | | | | | Move this option to Kconfig and tidy up the config file of eight boards which use it. Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
| * board: ge: bx50v3: fix initialization of i2c bus0Dan Cimpoca2018-10-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C bus 0 was not initialized correctly. There is an offset between i2c index and the structure number of pad info. So i2c bus 0 can be in an inconsistent state. This problem become visible on B{4,6}50v3 with the CPUC HW watchdog enabled. Sometimes when the CPUC HW watchdog interrupted the boot process, U-Boot was not able to read VPD from I2C/EEPROM and the system failed to boot up again, because a device connected to that bus was stuck in data transfer state (from previous boot attempt) and there was no method to recover (struct mxc_i2c_bus::idle_bus_fn was not set) courtesy of incorrect initialization. Signed-off-by: Dan Cimpoca <dan.I.cimpoca@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
| * board: ge: bx50v3: b{4,6}50v3 modelineIan Ray2018-10-221-0/+2
| | | | | | | | | | | | | | | | The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise the LVDS panel shows garbage. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
| * board: ge: bx50v3: correct LDB clockIan Ray2018-10-221-13/+17
| | | | | | | | | | | | | | Use Video PLL to provide 65MHz for all displays. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
| * board: ge: bx50v3: Change maintainerFabien Lahoudere2018-10-221-1/+1
| | | | | | | | | | | | | | | | While using ./scripts/get_maintainer.pl I detect that the Maintainer name and address for bx50v3 boards are not valid. The new maintainer for GE bx50v3 products must be Ian Ray. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
| * doc: imx: Improve i.MX documentation namingBreno Matheus Lima2018-10-228-0/+0
| | | | | | | | | | | | | | | | There is no need to have README in all i.MX documents name. Remove README from i.MX docs name and add .txt file extension. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
| * doc: imx: misc: Reorganize miscellaneous documentationBreno Matheus Lima2018-10-221-0/+0
| | | | | | | | | | | | | | | | | | The Serial Download Protocol feature is availible in various i.MX SoCs. Move README.sdp document to imx/misc directory. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * doc: imx: hab: Reorganize High Assurance Boot documentationBreno Matheus Lima2018-10-222-44/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current High Assurance Boot document README.mxc_hab include details for the following features in a single file: - HAB Secure Boot - HAB Encrypted Boot Split HAB documentation in a specific directory for a cleaner documentation structure, subsequent patches will include more content in HAB documentation. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * doc: imx: Reorganize i.MX SoC common documentationBreno Matheus Lima2018-10-225-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following documents describe device details according to the i.MX family: - README.imx25 - README.imx27 - README.imx5 - README.imx6 - README.mxs Move all device common related document to doc/imx/common for a better directory structure. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * doc: imx: mkimage: reorganize i.MX mkimage documentationBreno Matheus Lima2018-10-222-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The following documents describe the image type used by the mkimage tool to generate U-Boot images for i.MX devices. - README.imximage - README.mxsimage Move all mkimage related document to doc/imx/mkimage for a better directory structure. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * doc: imx: Move SPD related info to the appropriate docBreno Matheus Lima2018-10-222-27/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the Serial Download Protocol tools and procedure are documented in two places: - doc/imx/README.sdp - doc/imx/README.imx6 It is better to consolidate all SDP related information into README.sdp file, so move the content from README.imx6 to README.sdp. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * doc: imx: reorganize i.MX documentationBreno Matheus Lima2018-10-229-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the U-Boot doc/ directory contains the following files that are only relevant for i.MX devices: - doc/README.imx25 - doc/README.imx27 - doc/README.imx5 - doc/README.imx6 - doc/README.imximage - doc/README.mxc_hab - doc/README.mxs - doc/README.mxsimage - doc/README.sdp Move all content to a common i.MX folder for a better documentation structure. Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * imx: imx8qxp_mek: update to build image in U-BootPeng Fan2018-10-223-29/+38
| | | | | | | | | | | | | | | | Update README Add imximage.cfg Update defconfig to include imximage.cfg Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm: imx: include imx8image supportPeng Fan2018-10-221-6/+11
| | | | | | | | | | | | | | | | | | When building i.MX8/8X board, use imx8image type. `-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but no harm to keep it for i.MX8/8X Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * tools: add i.MX8/8X image supportPeng Fan2018-10-227-0/+1245
| | | | | | | | | | | | | | | | | | i.MX8/8X bootable image type is container type. The bootable image, containers a container set which supports two container. The 1st container is for SECO firmware, the 2nd container needs to include scfw, m4_0/1 image, ACore images per your requirement. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: add i.MX8QXP MEK board supportPeng Fan2018-10-2211-0/+819
| | | | | | | | | | | | | | | | | | | | | | Add i.MX8QXP MEK board support Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver. Added README file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * arm: dts: introduce dtsi for i.MX8QXPPeng Fan2018-10-224-0/+627
| | | | | | | | | | | | | | | | Introduce dtsi for i.MX8QXP, since there is other variants i.MX8DX(P), so add them there, because i.MX8QXP includes the dtsi of them. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * mmc: fsl_esdhc: add uclass clk supportPeng Fan2018-10-221-4/+22
| | | | | | | | | | | | | | | | | | | | When CONIFG_CLK is enabled, use uclass clk api to handle the clock. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
| * fsl_esdhc: Update usdhc driver to support i.MX8Ye Li2018-10-221-4/+4
| | | | | | | | | | | | | | | | | | Add CONFIG_ARCH_IMX8 to use the 64bits support in usdhc driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com>
| * serial: lpuart: support uclass clk apiPeng Fan2018-10-221-19/+76
| | | | | | | | | | | | | | | | | | | | Modify most APIs to use udevice as the first parameter, then it will be easy to get the clk reference by using udevice pointer. Use uclass api to get lpuart clk when CONFIG_CLK is enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * serial: lpuart: Enable RX and TX FIFOYe Li2018-10-221-7/+26
| | | | | | | | | | | | | | | | | | | | Enable the RX and TX FIFO in LPUART driver to avoid the input lost during U-Boot boot up. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * serial_lpuart: Update lpuart driver to support i.MX8Peng Fan2018-10-222-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX8 compatible string and cpu type support to lpuart driver, to use little endian 32 bits configurations. Also, according to RM, the Receive FIFO Enable (RXFE) field in LPUART FIFO register is bit 3, so this definition should change to 0x08 (not 0x40) for i.MX8, otherwise the Receive FIFO is not disabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * clk: imx: add clk driver for i.MX8QXPPeng Fan2018-10-225-0/+406
| | | | | | | | | | | | | | | | | | | | Add clk driver for i.MX8QXP. This basic version supports clk enable/disable/get_rate/set_rate operations for I2C, ENET, SDHC0 and UART clocks. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * power: Add power domain driver for i.MX8Peng Fan2018-10-224-1/+338
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the power domain DM driver for i.MX8, that it depends on the DTB power domain trees to generate the power domain provider devices. Users need to add power domain trees with property "compatible = "nxp,imx8-pd";" When power on a PD device, the driver will power on its ancestor PD devices in power domain tree. When power off a PD device, the driver will check its child PD devices first. Only if all child PD devices are off, then power off the current PD device. Then the driver checks sibling PD devices. If sibling PD devices are off, then it will power off parent PD device. There is no counter maintained in this driver, but a state to hold current on/off state. So the request and free functions are empty. The power domain implementation in i.MX8 DTB set the "#power-domain-cells" to 0, so there is no ID binding with each PD device. We don't use "id" variable in struct power_domain. At the same time, we have to set of_xlate to empty to bypass standard of_xlate in uclass driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * pinctrl: Add pinctrl driver for i.MX8Peng Fan2018-10-226-93/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl driver for i.MX8. The pads configuration is controlled by SCU, so need to ask SCU to configure pads through scfw API. Add pinctrl-scu to invoke sc_pad_set to configure pads. Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms which could directly configure pads from Acore side. Add CONFIG_PINCTRL_IMX8 as the built gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * gpio: mxc_gpio: add support for i.MX8Peng Fan2018-10-222-9/+42
| | | | | | | | | | | | | | | | Add i.MX8 support, there are 8 GPIO banks. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add dummy clockPeng Fan2018-10-222-0/+48
| | | | | | | | | | | | | | | | | | This driver is mostly used to avoid build errors. We use uclass clk driver for clk related operations. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8: add iomux configuration apiPeng Fan2018-10-223-1/+84
| | | | | | | | | | | | | | | | Add iomux configuration api. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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