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* ARM64: zynqmp: Adding prefetchable memory space to pcieBharat Kumar Gogada2016-11-151-2/+3
| | | | | | | | | | Adding prefetchable memory space to pcie device tree node. Shifting configuration space to 64-bit address space. Removing pcie device tree node from amba as it requires size-cells=<2> in order to access 64-bit address space. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add clocks for LPDDMAKedareswara rao Appana2016-11-151-0/+8
| | | | | | | | | | | | | | | Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure. xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2 This patch fixes this issue. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add description for LPDDMA channel usageKedareswara rao Appana2016-11-151-1/+4
| | | | | | | | | | | LPDDMA default allows only secured access. inorder to enable these dma channels, one should ensure that it allows non secure access. This patch updates the same. Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Use 64bit size cell format for main amba busMichal Simek2016-11-151-65/+65
| | | | | | | Use 64bit size cell for main amba bus instead of 32bit because PCIe node requires it Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add ocm node in dtsiNaga Sureshkumar Relli2016-11-151-0/+7
| | | | | | | | This patch adds ocm controller node in zynqmp.dtsi. needed for OCM edac support. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add device tree properties for ZynqMP GT coreAnurag Kumar Vulisha2016-11-151-0/+23
| | | | | | | | | This patch adds the ZynqMP GT core device-tree properties for zynqmp.dtsi file. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Hyun Kwon <hyunk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"Michal Simek2016-11-151-2/+0
| | | | | | | | | | This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1 Implemented the new workaround for auto tuning based on zynqmp compatible string, so removed the 'broken-tuning' property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: change sdhci compatible string.Sai Krishna Potthuri2016-11-154-2/+9
| | | | | | | | This patch changes the compatible string for sdhci node, adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: List all SMMU idsMichal Simek2016-11-151-1/+72
| | | | | | Add SMMU description for all tested IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add support for zynqmp fpga managerNava kishore Manne2016-11-151-0/+4
| | | | | | | Add support for zynqmp fpga manager. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add cortexa53 edac nodeNaga Sureshkumar Relli2016-11-151-0/+4
| | | | | | | | This patch adds edac node for arm cortexa53 to report errors on L1 and L2 caches. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Revert "ARM64: zynqmp: Add serdes address space dp driver"Michal Simek2016-11-151-2/+1
| | | | | | | | | | | This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c. Since we are using serdes driver , no need of mapping serdes register space into DP driver. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Hyun Kwon <hyunk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: drm: Add DMA indexHyun Kwon2016-11-151-3/+5
| | | | | | | | Each plane can be associated with multiple DMA channels. So add index for each DMA channel. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Sync gpio node propertiesMichal Simek2016-11-151-2/+2
| | | | | | Keep dtsi in sync with mainline kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Remove xlnx,id propertyMichal Simek2016-11-151-16/+0
| | | | | | | Remove unused xlnx,id property because it is not the part of DT binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: pci: Updating device tree as per upstreamBharat Kumar Gogada2016-11-151-1/+4
| | | | | | | | Updating required device tree changes as per mainlined driver from 4.6 kernel. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domainFilip Drazic2016-11-151-1/+1
| | | | | | | | | | | | | | | | | | | Previously, it was assumed that there is a 1:1 mapping between PM ID defined in the platform firmware and a PM domain. However, there can be a situation where multiple PM IDs belong to a single PM domain (e.g. PM IDs for GPU and two pixel processors correspond to a single PM domain). This patch adds support for assigning more than one PM ID to a single PM domain. Updated documentation accordingly. Assigned pixel processors PM IDs to GPU PM domain. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: DT: Add PM domains for GPU and PCIEFilip Drazic2016-11-151-0/+12
| | | | | | Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: DT: Remove unused PM domains for PLLFilip Drazic2016-11-151-25/+0
| | | | | | Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: DT: Remove unused DDR PM domainFilip Drazic2016-11-151-5/+0
| | | | | | | | | | DDR power states are handled by the PM firmware, so this domain is redundant. Also, since there is no device using this PM domain, it will be powered off during boot, which is wrong. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Remove note about level shifter on zcu102Michal Simek2016-11-151-1/+1
| | | | | | i2c device is just level shifter. Remove reference from dts. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add dcc port to dtsiMichal Simek2016-11-152-0/+11
| | | | | | | | Add dcc to dtsi for supporting system without serial port. DCC is enabled by default on ZynqMP. Adding dcc to zcu100 and zcu102 which were tested. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add gpio-keys for zcu102Michal Simek2016-11-151-0/+15
| | | | | | | There is gpio push button on MIO22. Add it to DTS to have full board description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable gpio-led as heartbeat on zcu102Michal Simek2016-11-151-0/+9
| | | | | | Show user that Linux is alive on the board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable can1 for ep108Naga Sureshkumar Relli2016-11-152-0/+8
| | | | | | | | This patch enables can1 for ep108. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Added clocks to DT for ep108VNSL Durga2016-11-151-0/+44
| | | | | | | Added clks for ep108 platform. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add clocks for LPDDMAKedareswara rao Appana2016-11-151-0/+32
| | | | | | | | | | | | Zynqmp DMA driver expects two clocks (main clock and apb clock) LPDDMA clock cofiguration is missing for the same in the zynqmp-clk.dtsi file. This patch updates for the same. Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Remove DTC 1.4.2 warningsMichal Simek2016-11-157-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DTC 1.4.2 reports these warnings: Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /amba has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /amba/usb@fe200000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/usb@fe300000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video0channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video1channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video2channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-graphicschannel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-audio0channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-audio1channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name This patch is fixing them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Remove DTC 1.4.2 warningsMichal Simek2016-11-1512-14/+15
| | | | | | | | | | | | | | DTC 1.4.2 reports these warnings: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property This patch is fixing them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Add support for the topic-miami system-on-modules and carrier boardsMike Looijmans2016-11-153-0/+116
| | | | | | | | | | | | | | The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM, 32MB QSPI NOR flash and 256MB NAND flash. The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC, 2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources and a fan controller. The "Florida" carrier boards add SD, USB, ethernet and other interfaces. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: dts: dra7xx: Update spi-max-frequency for qspi slave nodeVignesh R2016-11-132-2/+2
| | | | | | | | | Update the spi-max-frequency property of m25p80 flash slave to match that of TI QSPI controller node, so that QSPI operations happen at maximum supported frequency of 76.8MHz. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* ARM: tegra: enable Ethernet on p2771-0000Stephen Warren2016-11-071-0/+5
| | | | | | | | | Enable the Ethernet device in DT, provide board-specific configuration, and enable the driver in Kconfig. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ARM: tegra: add DWC EQoS (ethernet) to Tegra186 DTStephen Warren2016-11-071-0/+20
| | | | | | | | | Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the Tegra186 SoC DT so that boards can make use of it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* dts: rk3288: remove node in dmc which not need anymoreKever Yang2016-10-307-18/+0
| | | | | | | | | | Since we implement the dram capacity auto detect, we don't need to set the channel number and sdram-channel in dts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Vagrant Cascadian <vagrant@debian.org>
* sunxi: A64: enable USB supportAmit Singh Tomar2016-10-302-0/+41
| | | | | | | | | | | | | | | | Mostly by adding MACH_SUN50I to some existing #ifdefs enable support for the the HCI0 USB host controller on the A64. Fix up some minor 64-bit hiccups on the way. Add the bare minimum DT bits to the A64 .dtsi and enable the controllers and the PHY on the Pine64. This is limited to the first USB controller at the moment, which is connected to the lower USB socket on the Pine64 board. [Andre: remove unneeded defines, enable OHCI, add commit message] Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: dts: Pine64: add Ethernet aliasAndre Przywara2016-10-301-0/+1
| | | | | | | | | | | The sun8i-emac driver works fine with the A64 Ethernet IP, but we are missing an alias entry to trigger the driver instantiation by U-Boot. Add the line to point U-Boot to the Ethernet DT node. This enables TFTP boot on the Pine64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-10-281-70/+70
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| * ARM: at91/dt: sama5d2: Fix the warning from dtcWenyou Yang2016-10-281-70/+70
| | | | | | | | | | | | | | | | | | | | Fix the warning from dtc like, ---8<---- Warning (unit_address_vs_reg): Node /ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but no unit name --->8---- Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-10-289-1/+4169
|\ \ | |/ |/| | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: common/Kconfig configs/dms-ba16_defconfig
| * arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/DualJagan Teki2016-10-262-1/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: imx6q: Add pinctrl definesJagan Teki2016-10-261-0/+1047
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add imx6q pinctrl defines support from Linux. Here is the last commit: "ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ" (sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: Add devicetree for i.MX6QJagan Teki2016-10-261-0/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX6Q dtsi support from Linux. Here is the last commit: "ARM: dts: add gpio-ranges property to iMX GPIO controllers" (sha1: bb728d662bed0fe91b152550e640cb3f6caa972c) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/SoloJagan Teki2016-10-263-1/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: imx6dl: Add pinctrl definesJagan Teki2016-10-261-0/+1091
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add imx6dl pinctrl defines support from Linux. Here is the last commit: "ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ" (sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: Add devicetree for i.MX6DQLJagan Teki2016-10-261-0/+1281
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX6DQL dtsi support from Linux. Here is the last commit: "ARM: dts: imx6qdl: Fix SPDIF regression" (sha1: f065e9e4addd75c21bb976bb2558648bf4f61de6) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: Add devicetree for i.MX6DLJagan Teki2016-10-261-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i.MX6DL dtsi support from Linux. Here is the last commit: "ARM: dts: add gpio-ranges property to iMX GPIO controllers" (sha1: bb728d662bed0fe91b152550e640cb3f6caa972c) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | ARM: dts: uniphier: sync DT with latest LinuxMasahiro Yamada2016-10-1824-151/+261
|/ | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-10-121-42/+75
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| * colibri_t20: fix usb operation and controller orderMarcel Ziswiler2016-10-101-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch the following error will be shown: Colibri T20 # usb start starting USB... No controllers found This patch fixes USB operation and also the controller order as the CI UDC driver may only be instantiated on the first aka OTG port. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * colibri_t20: fix display configurationMarcel Ziswiler2016-10-101-20/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch the following error will be shown: stdio_add_devices: Video device failed (ret=-22) As commit ec5507707a1d1e84056a6c864338f95f6118d3ca (video: tegra: Move to using simple-panel and pwm-backlight) states the Colibri T20 needs updating too which this patch finally attempts doing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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