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* imx: sync with kernel device tree for Phycore SoMParthiban Nallathambi2020-01-0711-233/+722
| | | | | | | | | | Sync the Linux Kernel 5.4-rc6 device tree for Phytec Phycore SoM and Segin board based on imx6UL and imx6ULL. Changes includes Phytec naming convention for the devicetree files. Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* ARM: dts: dh-imx6: add u-boot specific wdt-reboot nodeClaudius Heine2020-01-071-0/+11
| | | | | | | | The wdt-reboot node is needed for the sysreset_watchdog driver to register a watchdog as a reset handler in case 'CONFIG_SYSRESET' is enabled. Signed-off-by: Claudius Heine <ch@denx.de>
* arm: dts: hummingboard: add cubox/hummingboard DT (part 2 of 2)Baruch Siach2020-01-0722-0/+1737
| | | | | | | | | | These DT files are copied from kernel v5.3 with no changes. This is part 2 of 2 commits. Included are DT files for SOM rev 1.5, and Hummingboard2 Gate/Edge. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* arm: dts: hummingboard: add cubox/hummingboard DT (part 1 of 2)Baruch Siach2020-01-079-0/+1128
| | | | | | | | | | These DT files are copied from kernel v5.3 with no changes. This is part 1 of 2 commits. Included are DT files for the original Cubox-i and Hummingboard Base/Pro. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* board: ge: mx53ppd: use imx wdtRobert Beckett2020-01-072-0/+13
| | | | | | | Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: bx50v3: use imx wdtRobert Beckett2020-01-072-0/+13
| | | | | | | Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: ppd: sync device tree from LinuxRobert Beckett2020-01-071-19/+1061
| | | | | | Copy device tree from linux for PPD. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* board: ge: bx50v3: sync devicetrees from LinuxRobert Beckett2020-01-077-75/+1651
| | | | | | | | | | Copy device trees from linux, keeping them as separate files for each board to ease future sync. Update board code to use generic bx50v3 dt initially, then select the specific dt based on board detection. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* imx: Add support for i.MX28 based XEA boardLukasz Majewski2020-01-073-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces support for i.MX28 based XEA board. This board supports DM/DTS in U-Boot proper as well as DM aware drivers in SPL (u-boot.sb) by using OF_PLATDATA. More detailed information regarding usage of it can be found in ./board/liebherr/xea/README file. U-Boot SPL 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) Trying to boot from MMC1 MMC0: Command 8 timeout (status 0xf0344020) mmc_load_image_raw_sector: mmc block read error U-Boot 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SPI #3, master, 3V3 NOR Model: Liebherr (LWE) XEA i.MX28 Board DRAM: 128 MiB MMC: MXS MMC: 0 Loading Environment from SPI Flash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 64 KiB, total 16 MiB OK In: serial Out: serial Err: serial Net: Warning: ethernet@800f0000 (eth0) using random MAC address - ce:e1:9e:46:f3:a2 eth0: ethernet@800f0000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski <lukma@denx.de>
* imx6: aristainetos: add support for rev C boardHeiko Schocher2020-01-077-0/+405
| | | | | | | add support for revision C boards. This board has no longer a NAND. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: add aristainetos 2b cslHeiko Schocher2020-01-077-0/+425
| | | | | | add aristainetso board version CSL. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: readd aristainetos 2b boardHeiko Schocher2020-01-077-0/+443
| | | | | | readd aristainetos 2b board. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: prepare dts for other board versionsHeiko Schocher2020-01-079-552/+831
| | | | | | | | | | | as we switch to support DM and DTS, rework the existing DTS trees. Change also Linux specific Device trees, goal is to push this changes to linux. Collect U-Boot specific changes in separate "*u-boot*" dts files. Signed-off-by: Heiko Schocher <hs@denx.de>
* imx6: aristainetos: add device tree from linuxHeiko Schocher2020-01-074-0/+801
| | | | | | | | | | | | Add device trees from Linux in preparation for driver model conversions. device tree files taken from Linux: 71ae5fc87c34: "Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest" and added SPDX license identifier. Signed-off-by: Heiko Schocher <hs@denx.de>
* arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config toolLokesh Vutla2020-01-031-3/+3
| | | | | | | | | Update the ddr settings to use the DDR reg config tool rev 0.2.0. This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order to avoid DSS underflow errors. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
* Merge tag 'u-boot-rockchip-20191231' of ↵Tom Rini2020-01-024-1/+623
|\ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix latest mainline kernel for rk3308 - Update rk3288-evb config to suport OP-TEE - Fix for firefly-px30 DEBUG_UART channel and make it standalone - Script make_fit_atf add python3 support - Fix rk3328 timer with correct COUNTER_FREQUENCY - Fix rk3328 ATF support with enable spl-fifo-mode
| * rockchip: rk3328: enable spl-fifo-mode for emmc and sdmmcKever Yang2019-12-311-0/+6
| | | | | | | | | | | | | | Since mmc to sram can't do dma, add patch to prevent aborts transfering TF-A parts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px30-firefly add standalone dtsKever Yang2019-12-273-1/+617
| | | | | | | | | | | | | | | | Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot proper will use the dts setting to do the IOMUX init, and a separate dts is needed for px30-firefly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2Diego Rondini2019-12-182-1/+141
|/ | | | | | | | | | | | | | | | | | | | | | | | | | Orangepi Zero Plus 2 is an open-source single-board computer, available in two Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the H5 is already supported. H3 Orangepi Zero Plus 2 has: - Quad-core Cortex-A7 - 512MB DDR3 - microSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG + power supply Sync dts from linux v5.2 commit: "ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry" (sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b) Commit: "ARM: dts: sun8i: h3: Refactor the pinctrl node names" (sha1: a4dc791974e568a15f7f37131729b1a6912f4811) has been avoided as it breaks U-Boot build. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* dts: am335x-brsmarc1/xre1: insert phy_id againHannes Schmelzer2019-12-132-0/+4
| | | | | | | | | | | | | | | | commit 3b3e8a37d36e ("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id") did sync with recent linux kernel and replaced therefore the 'phy_id' property with a phy-handle pointing to the mdio. This is OK for linux, but introduces trouble with the already running vxWorks on this target. So this commit here re-inerts the phy_id property beside the phy-handle property to be compatible with both. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netWIP/09Dec2019Tom Rini2019-12-094-2/+257
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| * arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodesVignesh Raghavendra2019-12-091-0/+238
| | | | | | | | | | | | | | | | | | Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking up on J721e EVM. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
| * arm: dts: armada-cp110-*dtsi: add xmdio nodesNevo Hed2019-12-092-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on upstream-linux See https://github.com/torvalds/linux/commit/f66b2aff. However made the XSMI register window 0x16 (22) bytes per my reading of the functional spec. Similar commits in Marvels own repo bump it to 0x200 (512) bytes but I did not see the reasoning for that. https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4. Also added device-name attributes to prevent ambiguity in the `mdio` command. Signed-off-by: Nevo Hed <nhed+github@starry.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxidGrygorii Strashko2019-12-091-2/+1
| | | | | | | | | | | | | | | | | | | | The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with internal RX delay provided by the PHY, the MAC will add an TX delay in this case. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge tag 'u-boot-imx-20191209' of ↵Tom Rini2019-12-094-964/+986
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support
| * ARM: imx: vining2000: Repair PCIe supportMarek Vasut2019-12-061-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ever since the conversion to DM PCI, the board was missing the PCIe DT nodes, hence the PCI did not really work. Fill in the DT nodes and add missing PCIe device reset. Moreover, bring the PCIe power domain up before booting Linux. This is mandatory to keep old broken vendor kernels working, as they do not do so and depend on the bootloader to bring the power domain up. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
| * mx7ulp: Sync the device tree related filesFabio Estevam2019-12-063-964/+969
| | | | | | | | | | | | | | | | | | | | | | | | Sync the mx7ulp device tree related files with the one from NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0). The mainline support for i.MX7ULP is very premature at this stage. We should probably re-sync with mainline Linux dts when it gets in better shape, but for now sync with the U-Boot vendor code. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* | dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CCDavid Wu2019-12-061-0/+9
| | | | | | | | | | | | | | | | The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm: dts: Add mac node for rk3308 at dtsi levelDavid Wu2019-12-061-0/+22
| | | | | | | | | | | | | | | | The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: px5: enable spl-fifo-mode for emmc for px5-evbAndy Yan2019-12-051-0/+2
| | | | | | | | | | | | | | | | | | | | We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: rk3308: enable spl-fifo-mode for emmcAndy Yan2019-12-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | ARM: MediaTek: add basic support for MT8518 boardsmingming lee2019-12-032-1/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds a general board file based on MT8518 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8518 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com> [trini: Migrate env location to defconfig, set ENV_IS_IN_MMC] Signeed-off-by: Tom Rini <trini@konsulko.com>
* | pinctrl: add driver for MT8518mingming lee2019-12-031-1/+8
| | | | | | | | | | | | Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
* | ARM: MediaTek: Add support for MediaTek MT8518 SoCmingming lee2019-12-031-0/+91
|/ | | | | | | Add support for MediaTek MT8518 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
* ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1Patrick Delaunay2019-11-264-8/+66
| | | | | | | | | | | | | Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1. - update slew-rate for pin configuration - update "vqmmc-supply" - remove "st,sig-dir" - add mandatory "pinctrl-names" - add "mmc-ddr-3_3v" This patch solve the eMMC detection issue for command "mmc dev 1". Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* ARM: dts: stm32: DT alignment with kernel v5.4-rc4Patrick Delaunay2019-11-2610-14/+237
| | | | | | | Device tree and binding alignment with kernel v5.4-rc4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* ARM: dts: stm32: DT alignment with kernel v5.3Patrick Delaunay2019-11-2620-508/+367
| | | | | | | | Device tree and binding alignment with kernel v5.3 and converted to SPDX. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-bootWIP/25Nov2019Tom Rini2019-11-251-4/+0
|\ | | | | | | | | | | - add RPi4 upstream compatible to pinctrl - fix boot banner on RPi3/4 - add support for one binary on RPi3/4
| * arm: dts: bcm283x: Rename U-Boot fileMatthias Brugger2019-11-241-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the file bcm283x-uboot.dtsi so that it get automatically include through the scripts/Makefile.lib using $(CONFIG_SYS_SOC))-u-boot.dtsi Without this uarts and pincontroller miss the property dm-pre-reloc and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails as the pins are not set correctly. As a result the U-Boot banner isn't shown on boot. Before commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we included bcm283x-uboot.dtsi directly in the device-tree file. Which got deleted by the metioned commit. This is a much robuster solution. Reported-by: Tom Rini <trini@konsulko.com> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
| * fdt: fix bcm283x dm-pre-reloc definitionsMatthias Brugger2019-11-241-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | In commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we deleted the label for the node soc from bcm283x.dtsi As we don't need to add the property dm-pre-reloc to the soc node, we can delete it from bcm283x-uboot.dtsi Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* | Merge tag 'u-boot-rockchip-20191124' of ↵WIP/23Nov2019Tom Rini2019-11-231-2/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Clean vid/pid in Kconfig and add fastboot for rk3399 - add 'u-boot, spl-fifo-mode' for mmc - Use FIT generator for rk3229 optee and rk3368 ATF - fan53555: add support for Silergy SYR82X and SYR83X
| * | rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evbHeiko Stuebner2019-11-231-2/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | arm: socfpga: stratix10: Add alias for gmac0 in S10 dtsOoi, Joyce2019-11-221-0/+1
| | | | | | | | | | | | | | | | Add 'ethernet0' as alias for 'gmac0' in S10 device tree. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
* | arm: dts: Stratix10: change pad skew values for EMAC0 PHY driverOoi, Joyce2019-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA drive strength has caused CE test to fail. This requires changes on the pad skew for EMAC0 PHY driver. Based on several measurements done, Tx clock does not require the extra 0.96ns delay which was needed in Arria10. Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
* | arm: dts: Stratix10: Fix memory node address and size cellsLey Foon Tan2019-11-201-0/+2
|/ | | | | | | Add #address-cells and #size-cells to memory node to fix incorrect memory size decoding in recent Uboot version. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
* Merge tag 'video-for-v2020.01-rc2' of ↵Tom Rini2019-11-182-12/+0
|\ | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix i.MX6ULL evk black screen observed while reboot stress tests - remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree differences between Linux and U-Boot for stm32mp1 platform
| * video: stm32: remove the compatible "synopsys, dw-mipi-dsi" supportPatrick Delaunay2019-11-122-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the compatible "synopsys,dw-mipi-dsi" added in U-Boot (it don't exist in Linux kernel binding); it is only used to bind the generic synopsys UCLASS_DSI_HOST "dw_mipi_dsi" to the driver "stm32-display-dsi" UCLASS_VIDEO_BRIDGE This binding is done in Linux kernel drivers without compatible (dw_mipi_dsi_bind() is called in bind of driver, for example in drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c). This patch does the same in U-Boot driver, the STM32 driver calls during its bind the function device_bind_driver_to_node to bind the generic driver "dw_mipi_dsi" at the same address. This patch reduces the device tree differences between Linux kernel and U-Boot for stm32mp1 platform. Tested with v2020.01-rc1 on STM32MP157C-EV1 and STM32MP157C-DK2. The dependency of driver is clearer and the probe order is guaranteed. STM32MP> dm tree Class Index Probed Driver Name ----------------------------------------------------------- root 0 [ + ] root_driver root_driver sysreset 0 [ ] syscon_reboot |-- reboot simple_bus 0 [ + ] generic_simple_bus |-- soc serial 0 [ + ] serial_stm32 | |-- serial@40010000 ... video_brid 0 [ + ] stm32-display-dsi | |-- dsi@5a000000 dsi_host 0 [ + ] dw_mipi_dsi | | |-- dsihost panel 0 [ + ] rm68200_panel | | `-- panel-dsi@0 ... Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge tag 'u-boot-rockchip-20191118' of ↵Tom Rini2019-11-1737-50/+5265
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip SoC: PX30, RK3308 - Add and migrate to use common dram driver: PX30, RK3328, RK3399 - Add rk3399 board Tinker-s support - Board config update for Rock960, Rockpro64
| * | rockchip: dts: tinker: Add tinker-s board supportMichael Trimarchi2019-11-173-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support tinker-s board. The board is equivalent of tinker board except of emmc. TODO: - support of usb current burst when the board is powered from pc Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: dts: tinker: Move u-boot dmc initialization to specific sectionMichael Trimarchi2019-11-172-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | dmc is used to initialize the memory controller. It's needed by u-boot. Move it in the specific section Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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