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* ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot properLukasz Majewski2019-11-033-0/+390
| | | | | | | | | | This commit converts mccmon6's u-boot proper (in a single commit to avoid build breaks) to use solely DM/DTS. The DTS description of the mccmon6 has been ported from Linux kernel (v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be) Signed-off-by: Lukasz Majewski <lukma@denx.de>
* imx: Enable RTC (ds1307) support in the U-Boot proper on TPC70 boardLukasz Majewski2019-11-031-0/+5
| | | | | | | The TPC70 is equipped with DS1307 RTC device. Add code to enable support for it. Signed-off-by: Lukasz Majewski <lukma@denx.de>
* ARM: dts: imx6ull-colibri: pre-reloc for uart pinmux modesIgor Opaniuk2019-11-031-0/+8
| | | | | | | | | | | | | Add u-boot,dm-pre-reloc properties for uart pinmux configuration nodes, which enables UART as early as possible (before relocation). Without this we miss almost the half of output (U-boot version, CPU defails, Reset cause, DRAM details etc.). Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm") Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
* ARM: dts: imx6ull-colibri: change hierarchy of DTS filesIgor Opaniuk2019-11-033-626/+639
| | | | | | | | | | | | Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to keep original imx6ull-colibri.dts in sync with Linux. Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi + additionally fix checkpatch warnings. Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
* arm: mxs: Increase VDDD voltage to match specificationMarek Vasut2019-11-031-2/+2
| | | | | | | | | | | | | | According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating Conditions, page 16, the VDDD should be set to 1.55V when the CPU is operating at 454MHz. This is the case in U-Boot, hence increase the VDDD voltage. This fixes instability when performing TFTP transfers. Increase the brownout threshold to 1.4V. The documentation recommends 1.45V setting for the brownout, however, this triggers failure during power block init, so keep the brownout slightly lower. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic numberClaudius Heine2019-11-031-2/+2
| | | | Signed-off-by: Claudius Heine <ch@denx.de>
* ARM: imx: Fix bmode detection from grp10Claudius Heine2019-11-032-6/+1
| | | | | | | | | | | imx6_is_bmode_from_gpr9 always returns false, because IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return. This moves the function body into imx6_src_get_boot_mode, since that is the only one using it and it is on the same abstraction level (accessing registers directly). Signed-off-by: Claudius Heine <ch@denx.de>
* arm: dts: Add devicetree support for iMXQXP AI_ML boardManivannan Sadhasivam2019-11-033-0/+299
| | | | | | | | Add devicetree support for iMXQXP AI_ML board from Einfochips. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* i.MX6: nand: extend nandbcb command for imx6UL(L)Parthiban Nallathambi2019-11-032-0/+70
| | | | | | | | | Firmware Configuration Block(FCB) for imx6ul(l) needs to be BCH encoded. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* mx6: clock: Introduce disable_ipu_clock()Fabio Estevam2019-11-032-0/+13
| | | | | | | | | | Introduce disable_ipu_clock(). This is done in preparation for configuring the NoC registers on i.MX6QP in SPL. Afer the NoC registers are set the IPU clocks can be disabled. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mx6: clock: Use setbits_le32()Fabio Estevam2019-11-031-4/+2
| | | | | | | | The code can be made simpler by using setbits_le32(), so switch to it. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* lib: time: Add microsecond timerMarek Vasut2019-10-311-3/+0
| | | | | | | | | | | Add get_timer_us(), which is useful e.g. when we need higher precision timestamps. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> [trini: Fixup arch/arm/mach-bcm283x/include/mach/timer.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch '2019-10-28-azure-ci-support'Tom Rini2019-10-301-2/+2
|\ | | | | | | | | - Clean up Travis-CI slightly and then add support for Microsoft Azure pipelines, all from Bin Meng.
| * arm: mvebu: Avoid generating kwbimage.cfg in the source treeBin Meng2019-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present some boards generate kwbimage.cfg in the source tree during the build. This breaks buildman testing on some systems where the source tree is read-only. Update makefile rules to generate it in the build tree instead. Note some other boards have the kwbimage.cfg file written in advance, hence we need check if the file exists in the build tree first, otherwise we fall back to one in the source tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2019-10-3012-29/+237
|\ \ | |/ |/| | | | | | | | | | | - H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil)
| * sunxi: set PIO voltage to hardware-detected value on startup on H6Icenowy Zheng2019-10-252-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: dts: sync dts for Allwinner H6Clément Péron2019-10-253-3/+131
| | | | | | | | | | | | | | | | | | | | | | | | Sync Kernel DTS for Allwinner H6 boards. Drop /omit-if-no-ref/ keyword as it's not supported by U-boot. commit <d45331b00ddb> Linux 5.3-rc4 Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * sunxi: Fix pll1 clock calculationStefan Mavrodiev2019-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families. PLL1 clock sets the default system clock, defined as: sun6i: 1008000000 sun8i: 1008000000 sun50i: 816000000 With the current calculation, m = 2 and k = 3. Solving for n, this results 28. Solving back: (24MHz * 28 * 3) / 2 = 1008MHz However if the requested clock is 816, n is 22.66 rounded to 22, which results: (24MHz * 28 * 3) / 2 = 792MHz Changing k to 4 satisfies both system clocks: (24E6 * 21 * 4) / 2 = 1008MHz (24E6 * 17 * 4) / 2 = 816MHz Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)Sunil Mohan Adapa2019-10-252-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A64 OLinuXino board from Olimex has three variants with onboard eMMC: A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In addition, there are two variants without eMMC. One without eMMC and one with SPI flash. This suggests the need for separate device tree for the three eMMC variants. The Linux kernel upstream has chosen to create and use a separate device tree for the eMMC variants instead of adding eMMC support existing device tree. These changes to Linux kernel are queued for Linux 5.4. commit <02bb66b347ff8115f53948f86b884e008ba385b9> ("arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)") This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux device-tree and a64-olinuxino_defconfig. Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org> [jagan: updated linux-next commit details] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * sunxi: H6: DRAM: Add support for half DQJernej Skrabec2019-10-252-25/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Half DQ configuration seems to be very rare for H6 based boards/STBs, but exists nevertheless. Currently the only known product which needs this support is Tanix TX6 mini. This commit adds support for half DQ configuration. Code was tested for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix TX6 4 GiB/DDR3) and none were found. Thanks to Icenowy Zheng for help with this code. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: thomas graichen <thomas.graichen@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Maxime Ripard <mripard@kernel.org>
| * configs: sopine-baseboard: Enable SPI-FLASHJagan Teki2019-10-251-0/+12
| | | | | | | | | | | | | | SoPine has winbond SPI-FLASH, so enable the same in defconfig and add aliases for spi0 in -u-boot.dtsi Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * arm: sunxi: Enable SPI/SPI-FLASH support for A64Jagan Teki2019-10-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | SPI is available in Allwinner A64 SoC, so enable it globally in Kconfig. - CONFIG_SPI - CONFIG_DM_SPI - CONFIG_DM_SPI_FLASH Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge branch '2019-10-24-ti-imports'Tom Rini2019-10-2516-14/+4555
|\ \ | | | | | | | | | | | | - Enable DFU on dra7xx boards - Further Keystone 3 platform improvements
| * | arm: dts: k3-am65: Add R5F ranges in interconnect nodesSuman Anna2019-10-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the address spaces for the R5F cores in MCU domain to the ranges property of the cbass_mcu interconnect node so that the addresses within the R5F nodes can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | armv7R: K3: j721e: Add support for triggering ddr init from SPLLokesh Vutla2019-10-251-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: dts: k3-j721e: Add ddr nodeLokesh Vutla2019-10-253-0/+4409
| | | | | | | | | | | | | | | | | | | | | | | | Use the 3733MTs DDR configuration that is auto generated from DDR_Regconfig tool. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
| * | ram: k3-am654: Do not rely on default values for certain DDR registerJames Doublesin2019-10-252-12/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added the following registers to the DDR configuration: - ACIOCR0, - ACIOCR3, - V2H_CTL_REG, - DX8SLxDQSCTL. Modified enable_dqs_pd and disable_dqs_pd to only touch the associated bit fields for pullup and pulldown registers (to preserve slew rate and other bits in that same register). Also update the dts files in the same patch to maintain git bisectability. Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filenameJames Doublesin2019-10-252-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current configuration of DDR on AM654 base board is for 1600MTs but the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi. Since 1600MHz is misleading, rename it to k3-am654-base-board-ddr4-1600MTs.dtsi Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: K3: Clean and invalidate Linux Image before jumping to LinuxLokesh Vutla2019-10-251-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux by set/way in cleanup_before_linux(). Additionally there is a custom hook provided to clean and invalidate L3 cache. Unfortunately on K3 devices(having a coherent architecture), there is no easy way to quickly clean all the cache lines for L3. The entire address range needs to be cleaned and invalidated by Virtual Address. This can be implemented using the L3 custom hook but it take lot of time to clean the entire address range. In the interest of boot time this might not be a viable solution. The best hit is to make sure the loaded Linux image is flushed so that the entire image is written to DDR from L3. When Linux starts running with caches disabled the full image is available from DDR. Reported-by: Andrew F. Davis <afd@ti.com> Reported-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | boot: arm: Enable support for custom board_prep_linuxLokesh Vutla2019-10-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Once the arch specific boot_prepare_linux completes, boards wants to have a custom preparation for linux. Add support for a custom board_prep_linux. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: dts: dra7: Add usb peripheral nodes in splFaiz Abbas2019-10-256-0/+92
| |/ | | | | | | | | | | | | Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2019-10-255-1/+93
|\ \ | | | | | | | | | | | | - DWC3 improvements - i.MX7 EHCI bugfix
| * | ARM: DTS: keystone: complete the description of the USB PHY devicesJean-Jacques Hiblot2019-10-244-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the PHY driver now handles the transitions of USB power domain, we must add this information in the node of each PHY. Also, the phy are expected in the "phys" property, not "usb-phys". Also add the aliases for the USB ports on boards with more than a single port. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
| * | ARM: keystone: increase PSC timeoutJean-Jacques Hiblot2019-10-241-1/+1
| | | | | | | | | | | | | | | | | | | | | Turning off the USB clocks may take longer than 100us. Increase the timeout to 100ms. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* | | Merge tag 'u-boot-atmel-2020.01-b' of ↵Tom Rini2019-10-252-0/+44
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features and fixes for 2020.01 cycle This feature set includes Eugen's work on a new tiny flexcom driver and eeprom mac retrieval for the sam9x60-ek board.
| * | | ARM: dts: sam9x60ek: add i2c0 as flexcom0 subnode and eeprom memoryEugen Hristev2019-10-241-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i2c0 bus as subnode to flx0. Add eeprom memory as slave device to i2c0. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * | | ARM: dts: sam9x60: add flx0 nodeEugen Hristev2019-10-241-0/+15
| |/ / | | | | | | | | | | | | | | | Add node for Flexcom0. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* | | Merge tag 'xilinx-for-v2020.01-part2' of ↵Tom Rini2019-10-2530-423/+2980
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.01 part 2 common: - Fix manual relocation for repeatable commands arm: - Also clean up generated dtbos microblaze: - Add support for Manual relocation in crypto framework - Tune and align architecture bootm support zynq: - DT sync ups - Some defconfig updates - Remove empty board_early_init_f() zynqmp: - Clean firmware handing via drivers/firmware/ - DT/defconfig name alignments - DT cleanups with using firmware based clock driver - Some defconfig updates - Add IIO ina226 DT description - Tune zynqmp_psu_init_minimalize.sh script - Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216 versal: - Clean firmware handing via drivers/firmware/ - Add gpio support - Enable DT overlay/USB/CLK/FPGA - DT updates - Tune mini configuration spi: - gqspi - Remove unused headers
| * | arm64: zynqmp: Add support for e-a2197-00 System ControllerMichal Simek2019-10-242-0/+560
| | | | | | | | | | | | | | | | | | | | | Add support for System Controller available on e-a2197-00 base board. System is very similar to p-a2197-00 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Remove unused board_early_init_f()Michal Simek2019-10-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | board_early_init_f added by commit e6cc3b25d721 ("arm: zynq: Wire watchdog internals") is no longer needed that's why remove it also with Kconfig enabling. Fixes: ccd063e9812a ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add support for zcu216Michal Simek2019-10-242-0/+593
| | | | | | | | | | | | | | | | | | zcu104/6 defconfig was used as source. Standard features are enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add support for m-a2197-03Michal Simek2019-10-242-0/+487
| | | | | | | | | | | | | | | | | | It is based on m-a2197-01 with some changes in i2c intrastructure. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add support for m-a2197-02Michal Simek2019-10-242-0/+497
| | | | | | | | | | | | | | | | | | | | | It is based on m-a2197-01 with some changes in i2c intrastructure. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: List lpd watchdog in dtsiMichal Simek2019-10-243-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | There are use cases where lpd watchdog can be configured for APU use. By design this IP should be listed in zynqmp.dtsi to make sure that node is properly enabled by DTG. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Use power header in zynqmp.dtsiMichal Simek2019-10-241-0/+44
| | | | | | | | | | | | | | | | | | | | | Use power header and add power-domains property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Use reset header in zynqmp.dtsiMichal Simek2019-10-241-4/+19
| | | | | | | | | | | | | | | | | | Wire reset-controller and use macros from reset header. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Use backward compatible string for gemMichal Simek2019-10-241-4/+4
| | | | | | | | | | | | | | | | | | Add backward compatible string for gem ("cdns,gem"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Switch to xlnx-zynqmp-clk headerMichal Simek2019-10-242-93/+73
| | | | | | | | | | | | | | | | | | Use prepared header instead of hardcoded values. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Update nand device tree node propertiesNaga Sureshkumar Relli2019-10-242-49/+59
| | | | | | | | | | | | | | | | | | | | | | | | This patch updates the nand device tree node properties as per updated driver. Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Fix DT style for ipi mailboxMichal Simek2019-10-241-1/+1
| | | | | | | | | | | | | | | | | | | | | Remove additional empty space. Fixes: 95497afada58 ("arm64: zynqmp: add firmware and mailbox node to DT") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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