Commit message (Expand) | Author | Age | Files | Lines | |
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* | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini | 2018-05-07 | 1 | -2/+1 |
* | MIPS: fix iand optimize setup of CP0 registers | Daniel Schwierzeck | 2016-11-30 | 1 | -0/+1 |
* | MIPS: Hang if run on a secondary CPU | Paul Burton | 2016-09-21 | 1 | -0/+7 |
* | MIPS: L2 cache support | Paul Burton | 2016-09-21 | 1 | -0/+5 |
* | MIPS: Preserve Config implementation-defined bits | Paul Burton | 2016-09-21 | 1 | -0/+1 |
* | MIPS: sync processor and register definitions with linux-4.4 | Daniel Schwierzeck | 2016-01-16 | 1 | -434/+1061 |
* | mips: Use unsigned int when reading c0 registers | Chris Packham | 2015-08-21 | 1 | -2/+2 |
* | mips32: detect L1 cache sizes if they're not defined | Paul Burton | 2013-11-09 | 1 | -0/+6 |
* | Move architecture-specific includes to arch/$ARCH/include/asm | Peter Tyser | 2010-04-13 | 1 | -0/+1364 |