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* common: Move some board functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move enable/disable_interrupts out of common.hSimon Glass2019-12-023-0/+3
| | | | | | | | Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move interrupt functions into a new headerSimon Glass2019-12-026-0/+6
| | | | | | | | | | | | These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: powerpc: Tidy up code style for interrupt functionsSimon Glass2019-12-024-9/+9
| | | | | | | Remove the unwanted space before the bracket. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Drop checkicache() and checkdcache()Simon Glass2019-12-021-65/+65
| | | | | | | | These are used by only one arch and only within a single file. Drop the declarations from the common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | | | | | | These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move checkcpu() out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | This function belongs in cpu_func.h so move it over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some CPU functions out of common.hSimon Glass2019-12-024-0/+4
| | | | | | | | | These functions belong in cpu_func.h since they do not use driver model. Move them over. Don't bother adding comments since these functions should be deleted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some time functions out of common.hSimon Glass2019-12-023-0/+3
| | | | | | | These functions belong in time.h so move them over and add comments. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Move strtomhz() to vsprintf.hSimon Glass2019-12-026-0/+6
| | | | | | | | | | | At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* status_led: Tidy up the code styleSimon Glass2019-12-021-1/+1
| | | | | | | There are a few whitespace problems with this code. Tidy them up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Drop CONFIG_SHOW_ACTIVITYSimon Glass2019-12-021-13/+0
| | | | | | This feature is not enabled by any board. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move older CPU functions to their own headerSimon Glass2019-12-023-0/+3
| | | | | | | | These should be moved to driver model, but in the meantime, move them out of the common header to help reduce its size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge tag 'mmc-11-27-2019' of ↵Tom Rini2019-11-281-22/+0
|\ | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mmc - fsl_esdhc update and some cleanup in ls1021a/mpc83xx code - mmc tmio sdhi update for hs400
| * mpc83xx: remove unused clock.hYangbo Lu2019-11-271-22/+0
| | | | | | | | | | | | | | | | | | The clock.h was to define mxc_get_clock() providing clock value to fsl_esdhc driver. Since fsl_esdhc driver is using global data gd->arch.sdhc_clk directly now, we can remove this file. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to t4240 dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to t4240 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to t104x dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to t104x dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to t102x dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to t102x dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p5040 dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to p5040 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p4080 dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to p4080 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p3041 dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to p3041 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p2041 dtsYinbo Zhu2019-11-251-0/+6
| | | | | | | | | | | | | | Add eSDHC node to p2041 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p2020 dtsYinbo Zhu2019-11-251-0/+7
| | | | | | | | | | | | | | Add eSDHC node to p2020 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | arch: powerpc: add eSDHC node to p1020 dtsYinbo Zhu2019-11-251-0/+7
|/ | | | | | | Add eSDHC node to p1020 dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: t4240: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for T4240 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: t104x: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for T104x platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: t102x: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for T102x platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: p5040: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for P5040 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: p3041: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for P3041 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* powerpc: p2041: dts: Add Sata DT nodesPeng Ma2019-11-191-0/+9
| | | | | | | This patch is to add sata node for P2041 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* ata: fsl_sata: Add DM support for Freescale PowerPC SATA driverPeng Ma2019-11-191-10/+0
| | | | | | | | | | | | | | | | | | | | | | | Add DM support for Freescale PowerPC sata driver used for PowerPC T series SoCs, CONFIG_BLK needs to be enabled on these platforms. It adds the SATA controller as AHCI device, which is strictly speaking not correct, as the controller is not AHCI compatible, But the U-Boot AHCI uclass interface enables the usage of this DM driver, Also fix below warning while PowerPC T series boards compilation, ===================== WARNING ======================" This board does use CONFIG_LIBATA but has CONFIG_AHCI not" enabled. Please update the storage controller driver to use" CONFIG_AHCI before the v2019.07 release." Failure to update by the deadline may result in board removal." See doc/driver-model/MIGRATION.txt for more info." ====================================================" Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* spl: separate SPL_FRAMEWORK config for spl and tplHeiko Stuebner2019-11-171-1/+1
| | | | | | | | | | | | | | Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* freescale/powerpc: Rename the config CONFIG_SECURE_BOOT nameUdit Agarwal2019-11-085-15/+15
| | | | | | | | Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid conflicts with UEFI secure boot. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* mpc85xx, dts, socrates: add u-boot specific dtsiHeiko Schocher2019-11-061-0/+40
| | | | | | | add u-boot specific dtsi file for socrates board. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* mpc85xx: add socrates dts from linuxHeiko Schocher2019-11-062-0/+350
| | | | | | | | | | | | | | | | | add socrates device tree from linux: commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest") and added SPDX license identifier. Did not fix checkpatch warnings: arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible Also, add me as board maintainer. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* MPC8548: dts: Added PCIe DT nodeHou Zhiqiang2019-08-283-0/+21
| | | | | | | | | | MPC8548 integrated a PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for the PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P5040: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | P5040 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P4080: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | P4080 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P3041: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | P3041 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P2041: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | P2041 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P2020: dts: Added PCIe DT nodesHou Zhiqiang2019-08-283-0/+64
| | | | | | | | | | P2020 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* P1020: dts: Added PCIe DT nodesHou Zhiqiang2019-08-284-0/+56
| | | | | | | | | | P1020 integrated 2 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* t104x: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | T104x integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* t102x: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+36
| | | | | | | | | | T102x integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* t4240: dts: Added PCIe DT nodesHou Zhiqiang2019-08-281-0/+48
| | | | | | | | | | T4240 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 3.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* powerpc: Enable device tree support for MPC8548CDSHou Zhiqiang2019-08-265-0/+101
| | | | | | | | Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESSHou Zhiqiang2019-08-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_RESET_VECTOR_ADDRESS definition with the default value in u-boot.dtsi to fix the build error below. In the configuration header file of some MPC85xx boards, there is not the definition of CONFIG_RESET_VECTOR_ADDRESS, while CONFIG_SYS_MPC85XX_NO_RESETVEC is also not defined. In this case, it will lack of definition of CONFIG_RESET_VECTOR_ADDRESS in u-boot.dtsi, and the address 0xfffffffc will be used as the boot page by default. Error log: DTC arch/powerpc/dts/mpc8548cds.dtb DTC arch/powerpc/dts/mpc8548cds_36b.dtb Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error FATAL ERROR: Unable to parse input tree Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error FATAL ERROR: Unable to parse input tree scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds.dtb' failed make[2]: *** [arch/powerpc/dts/mpc8548cds.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds_36b.dtb' failed make[2]: *** [arch/powerpc/dts/mpc8548cds_36b.dtb] Error 1 dts/Makefile:38: recipe for target 'arch-dtbs' failed make[1]: *** [arch-dtbs] Error 2 Makefile:1038: recipe for target 'dts/dt.dtb' failed make: *** [dts/dt.dtb] Error 2 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* powerpc: Enable device tree support for P5040DSHou Zhiqiang2019-08-263-0/+81
| | | | | | | | Add device tree for P5040DS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* powerpc: Enable device tree support for P4080DSHou Zhiqiang2019-08-263-0/+102
| | | | | | | | Add device tree for P4080DS board and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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