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* riscv: Make SBI v0.2 the default SBI versionBin Meng2020-04-231-1/+1
* riscv: Add Kconfig option for SBI v0.2Bin Meng2020-04-231-1/+19
* riscv: Add SMP Kconfig option dependency for U-Boot properBin Meng2020-04-231-0/+1
* riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng2020-04-231-1/+12
* Merge branch 'next' of git://git.denx.de/u-boot-usb into nextWIP/31Mar2020-nextTom Rini2020-03-311-0/+13
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| * riscv: Introduce a new config for SBI v0.1Bin Meng2020-03-171-0/+8
| * riscv: Add basic support for SBI v0.2Bin Meng2020-03-171-0/+5
* | Kconfig: Remove redundant variable setsTom Rini2020-03-161-3/+0
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* riscv: Add option to print registers on exceptionSean Anderson2020-02-101-0/+3
* riscv: increase stack size to avoid a stack overflow during distro bootLukas Auer2019-12-101-1/+1
* riscv: add SPL supportLukas Auer2019-08-261-0/+3
* riscv: add run mode configuration for SPLLukas Auer2019-08-261-5/+28
* riscv: Add Microchip MPFS Icicle board supportPadmarao Begari2019-06-051-0/+4
* CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner2019-05-181-0/+14
* CONFIG_SYS_[DI]CACHE_OFF: convert to KconfigTrevor Woerner2019-05-181-0/+12
* riscv: Introduce CONFIG_XIP to support booting from flashRick Chen2019-05-091-0/+7
* riscv: Add a SYSCON driver for Andestech's PLMTRick Chen2019-04-081-0/+9
* riscv: Add a SYSCON driver for Andestech's PLICRick Chen2019-04-081-0/+9
* riscv: add support for multi-hart systemsLukas Auer2019-04-081-0/+4
* riscv: implement IPI platform functions using SBILukas Auer2019-04-081-0/+5
* riscv: add infrastructure for calling functions on other hartsLukas Auer2019-04-081-0/+19
* riscv: Add SiFive FU540 board supportAnup Patel2019-02-271-0/+4
* riscv: Rename cpu/qemu to cpu/genericAnup Patel2019-02-271-1/+1
* riscv: Enlarge the default SYS_MALLOC_F_LENBin Meng2018-12-181-0/+3
* riscv: qemu: Add platform-specific Kconfig optionsBin Meng2018-12-181-0/+1
* riscv: Implement riscv_get_time() API using rdtime instructionAnup Patel2018-12-181-0/+8
* riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng2018-12-181-0/+9
* riscv: Introduce a Kconfig option for machine modeAnup Patel2018-12-181-5/+16
* riscv: add Kconfig entries for the code modelLukas Auer2018-12-181-0/+18
* riscv: Add kconfig option to run U-Boot in S-modeAnup Patel2018-12-051-0/+5
* riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen2018-11-261-0/+6
* riscv: add Kconfig entries for the C and A ISA extensionsLukas Auer2018-11-261-0/+11
* riscv: select CONFIG_PHYS_64BIT on RV64I systemsLukas Auer2018-11-261-0/+1
* riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64ILukas Auer2018-11-261-8/+8
* riscv: Add QEMU virt board supportBin Meng2018-10-031-0/+4
* riscv: kconfig: Normalize architecture name spellingBin Meng2018-10-031-3/+3
* riscv: cpu: nx25: Rename as ax25Rick Chen2018-05-291-3/+3
* riscv: Add Kconfig to support RISC-VRick Chen2018-01-121-0/+42
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