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* sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam2020-08-041-0/+13
* Merge branch 'next'Tom Rini2020-07-064-17/+87
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| * riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson2020-07-011-0/+40
| * riscv: Clean up IPI initialization codeSean Anderson2020-07-011-0/+43
| * riscv: Add headers for asm/global_data.hSean Anderson2020-07-011-0/+2
| * bdinfo: riscv: Use generic bd_infoSimon Glass2020-06-251-17/+2
* | riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel2020-07-031-0/+14
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* riscv: sbi: Remove sbi_spec_versionBin Meng2020-06-041-2/+0
* riscv: sifive: fu540: add SPL configurationPragnesh Patel2020-06-041-0/+14
* riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel2020-06-042-0/+52
* riscv: Move all SMP related SBI calls to SBI_v01Atish Patra2020-05-261-3/+2
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-181-0/+3
* riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra2020-04-232-0/+3
* riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng2020-04-231-1/+1
* riscv: Implement new SBI v0.2 extensionsBin Meng2020-03-171-0/+24
* riscv: Introduce a new config for SBI v0.1Bin Meng2020-03-171-0/+4
* riscv: Add SBI v0.2 extension definitionsBin Meng2020-03-171-0/+17
* riscv: Add basic support for SBI v0.2Bin Meng2020-03-171-79/+56
* riscv: Mark existing SBI as v0.1 SBIBin Meng2020-03-171-19/+21
* riscv: Fix sbi_remote_sfence_vma{,_asid}Bin Meng2020-03-171-7/+12
* dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>Masahiro Yamada2020-02-191-26/+0
* dma-mapping: fix the prototype of dma_unmap_single()Masahiro Yamada2020-02-191-3/+1
* dma-mapping: fix the prototype of dma_map_single()Masahiro Yamada2020-02-191-2/+3
* asm: dma-mapping.h: Fix dma mapping functionsVignesh Raghavendra2020-01-251-2/+21
* riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer2019-12-101-1/+2
* gpio: sifive: add support for DM based gpio driver for FU540-SoCSagar Shrikant Kadam2019-10-182-0/+41
* riscv: add SPL supportLukas Auer2019-08-261-0/+31
* riscv: add run mode configuration for SPLLukas Auer2019-08-261-1/+1
* riscv: Access CSRs using CSR numbersBin Meng2019-08-152-236/+14
* riscv: Sync csr.h with Linux kernel v5.2Bin Meng2019-08-152-16/+114
* env: Drop environment.h header file where not neededSimon Glass2019-08-111-1/+0
* riscv: Introduce CONFIG_XIP to support booting from flashRick Chen2019-05-091-0/+2
* riscv: Add a SYSCON driver for Andestech's PLMTRick Chen2019-04-082-0/+4
* riscv: Add a SYSCON driver for Andestech's PLICRick Chen2019-04-082-2/+4
* riscv: add support for multi-hart systemsLukas Auer2019-04-081-0/+1
* riscv: import the supervisor binary interface header fileLukas Auer2019-04-081-0/+94
* riscv: add infrastructure for calling functions on other hartsLukas Auer2019-04-082-0/+59
* riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrdAnup Patel2019-02-271-0/+1
* riscv: Add place-holder asm/arch/clk.h for driver compilationAnup Patel2019-02-271-0/+14
* riscv: Add asm/dma-mapping.h for DMA mappingsAnup Patel2019-02-271-0/+38
* riscv: Save boot hart id to the global dataBin Meng2018-12-181-0/+1
* riscv: Add indirect stringification to csr_xxx opsBin Meng2018-12-181-7/+9
* riscv: Add exception codes for xcause registerBin Meng2018-12-181-0/+15
* riscv: Add CSR numbersBin Meng2018-12-181-0/+221
* riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng2018-12-182-0/+22
* riscv: Add kconfig option to run U-Boot in S-modeAnup Patel2018-12-051-0/+6
* riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen2018-11-261-0/+3
* riscv: do not reimplement generic io functionsLukas Auer2018-11-261-28/+3
* riscv: make use of the barrier functions from LinuxLukas Auer2018-11-262-7/+71
* riscv: fix use of incorrectly sized variablesLukas Auer2018-11-263-6/+10
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