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* x86: Set up Chrome OS to boot into developer modeSimon Glass2020-11-061-6/+20
* x86: Use CONFIG_CHROMEOS_VBOOT for verified bootSimon Glass2020-11-065-7/+5
* x86: Define the Chrome OS GNVS regionSimon Glass2020-11-061-1/+50
* acpi: Don't reset the tables with every new generationSimon Glass2020-11-061-0/+1
* x86: acpi: Put the generated code first in DSDTSimon Glass2020-11-061-9/+18
* x86: acpi: Allow the SSDT to be emptySimon Glass2020-11-061-7/+15
* x86: Show the interrupt pointer with 'irqinfo'Simon Glass2020-11-063-7/+27
* x86: nhlt: Fix a few bugs in the table generationSimon Glass2020-11-061-1/+3
* x86: nhlt: Correct output of bytes and 16-bit dataSimon Glass2020-11-061-3/+10
* x86: Allow putting some tables in the bloblistSimon Glass2020-11-061-3/+46
* x86: Use if instead of #ifdef in write_tables()Simon Glass2020-11-051-19/+19
* x86: Add SMBIOS info for CoralSimon Glass2020-11-051-0/+8
* x86: coral: Drop the duplicate PCIe settingsSimon Glass2020-11-051-2/+0
* x86: Don't bother clearing global NVSSimon Glass2020-11-051-1/+0
* x86: acpi: Store the ACPI context in global_dataSimon Glass2020-11-051-1/+6
* x86: Allow writing tables to failSimon Glass2020-11-053-3/+15
* x86: Add support for private filesSimon Glass2020-11-051-0/+4
* x86: Add a layout for Chrome OS verified bootSimon Glass2020-11-051-0/+38
* x86: apl: Add core init for the SoCSimon Glass2020-11-057-21/+170
* x86: Fix up driver names to avoid dtoc warningsSimon Glass2020-11-059-12/+12
* x86: apl: Take advantage of the of-platdata parent supportSimon Glass2020-10-291-1/+2
* x86: apl: Enable SPI flash in TPL with APL_SPI_FLASH_BOOTSimon Glass2020-10-291-0/+2
* bloblist: Allow custom alignment for blobsSimon Glass2020-10-062-2/+2
* x86: edison: Generate an image suitable for xFSTKSimon Glass2020-09-252-0/+35
* x86: Use multiple imagesSimon Glass2020-09-253-21/+10
* x86: Add support for more than 8 MTRRsSimon Glass2020-09-252-8/+19
* x86: hob: Try to show a name instead of a GUIDSimon Glass2020-09-251-0/+25
* x86: coral: Update config and device tree for ACPISimon Glass2020-09-251-14/+212
* x86: Add a way to add to the e820 memory tableSimon Glass2020-09-251-0/+17
* x86: fsp: Show FSP-S or FSP-M address in fsp_get_header()Simon Glass2020-09-251-8/+14
* x86: fsp: Add more debugging for silicon initSimon Glass2020-09-251-1/+3
* x86: apl: Check low-level init in FSP-S pre-initSimon Glass2020-09-251-0/+2
* x86: acpi: Set the log category for x86 table generationSimon Glass2020-09-251-0/+2
* acpi: tpm: Add a TPM1 tableSimon Glass2020-09-251-1/+53
* acpi: tpm: Add a TPM2 tableSimon Glass2020-09-251-0/+74
* x86: Correct handling of MADT table CPUsSimon Glass2020-09-251-3/+6
* x86: Add a header guard to asm/acpi_table.hSimon Glass2020-09-251-0/+4
* x86: Correct the assembly guard in e820.hSimon Glass2020-09-251-2/+1
* x86: Notify the FSP of the 'end firmware' eventSimon Glass2020-09-252-0/+31
* x86: Sort the MTRR tableSimon Glass2020-09-251-0/+12
* x86: cpu: Report address width from cpu_get_info()Simon Glass2020-09-254-0/+38
* x86: fsp: Update the FSP API with the end-firmware methodSimon Glass2020-09-251-3/+12
* x86: apl: Drop unnecessary code in PMC driverSimon Glass2020-09-251-6/+2
* x86: apl: Generate ACPI table for LPCSimon Glass2020-09-251-0/+18
* x86: apl: Generate CPU tablesSimon Glass2020-09-252-1/+79
* x86: apl: Add support for hostbridge ACPI generationSimon Glass2020-09-251-9/+211
* x86: apl: Generate required ACPI tablesSimon Glass2020-09-253-0/+230
* x86: apl: Allow reading hostbridge base addressesSimon Glass2020-09-252-0/+58
* x86: acpi: Add support for additional Intel tablesSimon Glass2020-09-252-0/+226
* x86: Support Atom SoCs using SWSMISCI rather than the SWSCISimon Glass2020-09-252-0/+7
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