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* Merge tag 'u-boot-imx-20200804' of ↵WIP/04Aug2020Tom Rini2020-08-0416-95/+436
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2020.10 ----------- - fixes for Toradex board - fix warnings from previous PR - HAB: reset instead of panic after failure - new board: MYiR Tech MYS-6ULX - mx6cuboxi: use OF_PLATDATA - further changes for DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
| * ARM: imx: hab: panic on authentication failureMarek Vasut2020-08-031-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hang()ing the system and thus disallowing any automated recovery possibility from a HAB authentication failure, panic() . The panic() function can be configured to hang() the system after printing an error message, however the default is to reset the system instead. This allows redundant boot to work correctly. In case the primary or secondary image cannot be authenticated, the system reboots and bootrom can try to start the other one. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| * imx: Add MYiR Tech MYS-6ULX supportParthiban Nallathambi2020-08-036-0/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based on imx6ULL SoC from NXP and provision for expansion board. This commit adds support only for SBC with NAND. CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 45C Reset cause: WDOG Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND Board: MYiR MYS-6ULX 6ULL Single Board Computer DRAM: 256 MiB NAND: 256 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
| * imx8m: soc: Remove unneeded spaceFabio Estevam2020-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkpatch reports the following issue: ERROR: space prohibited before that ',' (ctx:WxW) #936: FILE: arch/arm/mach-imx/imx8m/soc.c:936: + 0, 0 , 0, 0, 0, 0, &res); Remove the unneeded space. ^ Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * ARM: dts: imx7-colibri: multiple node updatesIgor Opaniuk2020-07-274-38/+78
| | | | | | | | | | | | | | | | | | | | | | 1. Move u-boot specific nodes to u-boot dts include: legacy lcdif node and aliases. 2. Add iomux configuration for LCD. 3. Drop un-needed u-boot,dm-pre-reloc for alias node. 4. Fix display-timings, use the one from Toradex downstream kernel [1] [1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n206 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * ARM: dts: imx6ull-colibri: move u-boot specific nodeIgor Opaniuk2020-07-272-43/+45
| | | | | | | | | | | | | | | | | | 1. Move aliases and legacy lcdif node to the u-boot specific dts include. 2. Provide proper display timings, as in the downstream Toradex kernel [1]. [1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n183 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * ARM: dts: imx8mm-verdin: eeprom nodes adjustmentsIgor Opaniuk2020-07-271-8/+14
| | | | | | | | | | | | | | | | | | | | Rename EEPROM nodes. Create aliases for EEPROM to unify their order: eeprom0 - on-module EEPROM eeprom1 - carrier-board EEPROM eeprom2 - MIPI-DSI to HDMI adapter EEPROM Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * imx: mx7: fix DDRC size in A7-M4 mapping tableIgor Opaniuk2020-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | According to i.MX 7Solo Applications Processor Reference Manual, 2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC (Start Address: 0x8000_0000; End Address: 0xDFFF_FFFF). Correct DDRC size to 0x60000000. Fixes: c0f037f6("mach-imx: bootaux: elf firmware support") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2020-08-042-0/+25
|\ \ | | | | | | | | | - add DM based reset driver for SiFive SoC's.
| * | sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam2020-08-041-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PRCI module within SiFive SoC's has register with which we can reset the sub-systems within the SoC. The resets to DDR and ethernet sub systems within FU540-C000 SoC are active low, and are hold low by default on power-up. Currently these are directly asserted within prci driver via register read/write. With the DM based reset driver support here, we bind the reset driver with clock (prci) driver and assert the reset signals of both sub-system's appropriately. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
| * | fu540: dtsi: add reset producer and consumer entriesSagar Shrikant Kadam2020-08-041-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The resets to DDR and ethernet sub-system are connected to PRCI device reset control register, these reset signals are active low and are held low at power-up. Add these reset producer and consumer details needed by the reset driver. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
* | | Merge tag 'mips-pull-2020-08-03' of ↵Tom Rini2020-08-043-3/+90
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - doc: fix qemu-mips build instructions - MIPS: add GPIO, CLK and SPI drivers for Octeon MIPS64
| * | | mips: octeon: Update Octeon KconfigStefan Roese2020-08-031-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch selects DM_SPI & DM_I2C for MIPS Octeon. DM_GPIO, DM_SERIAL and DM_ETH are already selected. Additionally the selections are now alphabetically sorted. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: mrvl, octeon-ebb7304.dts: Add SPI flash DT nodeStefan Roese2020-08-031-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add the SPI flash DT node for the EBB7304. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: mrvl,cn73xx.dtsi: Add SPI DT nodeStefan Roese2020-08-031-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add the Octeon SPI DT node to the dtsi file. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: dts: Add Octeon clock driver DT nodesStefan Roese2020-08-032-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DT nodes for the Octeon clock support via the common clk_ API. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: dts: Add I2C DT nodesStefan Roese2020-08-032-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | Add I2C DT nodes to the Octeon dts / dtsi files. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | mips: octeon: mrvl,cn73xx.dtsi: Add GPIO DT nodesStefan Roese2020-08-031-0/+26
| |/ / | | | | | | | | | | | | | | | Add the Octeon GPIO DT node to the dtsi file. Signed-off-by: Stefan Roese <sr@denx.de>
* | | mscc: Drop dm.h header fileSimon Glass2020-08-035-15/+0
| | | | | | | | | | | | | | | | | | | | | This header file should not be included in other header files. Remove it from each one and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | mediatek: Drop dm.h header fileSimon Glass2020-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | thermal: Drop dm.h header fileSimon Glass2020-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | sf: Drop dm.h header file from spi_flash.hSimon Glass2020-08-033-0/+3
|/ / | | | | | | | | | | | | This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini2020-08-037-11/+72
|\ \ | | | | | | | | | | | | | | | | | | - ApolloLake: add u64 parameters support for FSP2 bindings - ApolloLake: add missing parameters to support full configuration of the latest FSP MR6 release - Append appropriate suffixes in various assembly codes
| * | x86: call32: Append appropriate suffixesAndy Shevchenko2020-08-031-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assembler is not happy: arch/x86/cpu/call32.S: Assembler messages: arch/x86/cpu/call32.S:36: Warning: no instruction mnemonic suffix given and no register operands; using default for `retf' Fix this by adding appropriate suffixes to the assembler commands. Fixes: 6f92ed8f1abf ("x86: Add a way to call 32-bit code from 64-bit mode") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: sipi_vector: Append appropriate suffixesAndy Shevchenko2020-08-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assembler is not happy: arch/x86/cpu/sipi_vector.S: Assembler messages: arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp' arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts' arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp' Fix this by adding appropriate suffixes to the assembler commands. Fixes: 45b5a37836d5 ("x86: Add multi-processor init") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | arch: x86: apl: Update FSP parametersBernhard Messerklinger2020-08-033-2/+35
| | | | | | | | | | | | | | | | | | | | | | | | Add missing parameters to support full configuration of the latest FSP MR6 release. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: apl: fsp_bindings: Add support for u64 parametersBernhard Messerklinger2020-08-032-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Add FSP_UINT64 read support as preparation for FSP-M and FSP-S parameter update. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: irq: Fix some typosWolfgang Wallner2020-08-031-3/+3
| | | | | | | | | | | | | | | | | | | | | Fix some typos in arch/x86/include/asm/irq.h. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | efi_loader: use CONFIG_STACK_SIZE in the UEFI sub-systemHeinrich Schuchardt2020-08-012-25/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig symbol CONFIG_STACK_SIZE is used both by ARM and Microblaze with the same meaning. Move it to menu 'General setup' so that we can use it for all architectures. Use the value of CONFIG_STACK_SIZE instead of a hard coded 16 MiB value for reserving memory in the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | x86: rename CONFIG_STACK_SIZEHeinrich Schuchardt2020-08-012-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | Configuration variables should have the same meaning independent of the architecture. x86 and ARM both use CONFIG_STACK_SIZE: * x86: U-Boot's runtime stack size during reboot * ARM: max stack size that can be used by U-Boot Rename the x86 configuration variable to CONFIG_STACK_SIZE_REBOOT Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge tag 'dm-pull-28jul20' of git://git.denx.de/u-boot-dmWIP/29Jul2020Tom Rini2020-07-2927-128/+230
|\ \ | | | | | | | | | | | | | | | Use binman instead of one of the Rockchip build scripts Refactor to allow any arch to create SPI-flash images New button uclass
| * | test/py: add tests for the button commandsPhilippe Reynes2020-07-281-0/+14
| | | | | | | | | | | | | | | | | | | | | Adds tests for the button commands. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * | sandbox: dtsi: add buttonsPhilippe Reynes2020-07-281-0/+14
| | | | | | | | | | | | | | | | | | | | | Adds two buttons on sandbox so button framework may be tested. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * | sandbox, test: change hog gpioPhilippe Reynes2020-07-281-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 9ba84329dc45 ("sandbox, test: add test for GPIO_HOG function"), the gpio_a 0,1,2 and 3 are used by hog in test.dts. But 2 leds 'sandbox:red' and 'sandbox:green' are using gpio_a 0 and 1. As hog always request his gpios, the led command on both led is broken: => led sandbox:red LED 'sandbox:red' not found (err=-16) The gpio is already requested by hog, so it can't be enabled for led 'sandbox:red'. This commit change the gpio used by hog to 10, 11, 12 and 13, so the led command could be used again with 'sandbox:red' and 'sandbox:green'. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | x86: chromebook_panther: Correct the image layoutSimon Glass2020-07-282-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | This board does not have microcode but at present that is not supported by Kconfig nor the binman image layout. Fix both of these. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Move the fdtmap away from the binary blobsSimon Glass2020-07-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This causes conflicts on chromebook_link64. Move it to after U-Boot where there should be plenty of space. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | rockchip: Drop the fit_spl_optee.sh scriptSimon Glass2020-07-281-84/+0
| | | | | | | | | | | | | | | | | | | | | Now that all board use binman instead of this script, drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | rockchip: Convert evb-rk3288 over to use binmanSimon Glass2020-07-283-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | At present this board uses a custom script to produce the .its file. Update it to use binman instead. Binman can create all the images that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | mediatek: Makefile: Drop explicit targets built by binmanSimon Glass2020-07-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mediatek various files that need to be created by binman. It does not make sense to enumerate these in the Makefile. They are described in the configuration (devicetree) for each board and we can simply run binman (always) to generate them. This avoid sprinkling the Makefile with arch-specific code. Also update the binman definition so that idbloader.img is only needed when SPL is actually being used. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | powerpc: mpc85xx: Only enable binman when it is neededSimon Glass2020-07-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Quite a few boards using this SoC family don't use binman, yet CONFIG_BINMAN is enabled for all of them. But the option should only be enabled if we expect binman to produce an image. Calling binman when the device tree is missing, etc. will cause failer. Add a condition so that CONFIG_BINMAN is only enabled as needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | Makefile: Rename ALL-y to INPUTS-ySimon Glass2020-07-288-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When binman is in use, most of the targets built by the Makefile are inputs to binman. We then need a final rule to run binman to produce the final outputs. Rename the variable to indicate this, and add a new 'inputs' target. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | tegra: Don't enable binman on ARMv8 SoCsSimon Glass2020-07-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | At present only the ARMv7 tegra SoCs actually use binman to create an image. Change the config to reflect this, since otherwise running binman will produce an error. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Enable building a SPI ROM image on bobSimon Glass2020-07-284-1/+34
| | | | | | | | | | | | | | | | | | | | | Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for bob. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Enable building a SPI ROM image on jerrySimon Glass2020-07-284-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for jerry. Change the binman image definition to support multiple images, since it may be used to build both u-boot-rockchip.bin and u-boot.rom Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Allow Bob to use SPI bootSimon Glass2020-07-281-1/+2
| | | | | | | | | | | | | | | | | | | | | Bob is a Chromebook and can boot from SPI flash. Add it to the condition check for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Change how selection of ROMs worksSimon Glass2020-07-283-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most x86 boards build a u-boot.rom which is programmed into SPI flash. But this is not unique to x86. For example some rockchip boards can also boot from SPI flash. Also, at least on x86, binary blobs are sadly quite common. It is not possible to build a functional image without them, and U-Boot needs to know this at build time. Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary blobs are also needed. If they are not needed, it is safe to build the ROM always. Otherwise we still require the BUILD_ROM environment variable. For now this affects only x86, but future patches will enable this for rockchip too. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-stmTom Rini2020-07-2925-183/+1572
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix SPL boot issue due to early dbgmcu_init() call - fix SPL boot issue due to dcache memory region configuration - add support of CONFIG_ENV_IS_IN_MMC - add specific SD/eMMC partition for U-Boot enviromnent - enable env in SPL - use "env info -q" to remove log during boot - remove env location override for dh_stm32mp1 - update management of misc_read - check result of find_mmc_device in stm32prog - use regulator_set_enable_if_allowed for disabling vdd supply in usbphyc - enable CMD_ADTIMG flag to handle Android images - device tree alignment with Linux Kernel v5.8-rc1 - remove hnp-srp-disable for usbotg on dk1 - add reset support to uart nodes on stm32mp15x - use correct weak function name spl_board_prepare_for_linux - use cd-gpios for ST and DHSOM boards - add seeed studio odyssey-stm32mp157c board support - move ethernet PHY into SoM DT - add DHSOM based DRC02 board support
| * | | ARM: dts: stm32: Add DHSOM based DRC02 boardMarek Vasut2020-07-283-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | ARM: dts: stm32: Move ethernet PHY into SoM DTMarek Vasut2020-07-282-69/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY and the VIO regulator is populated on the SoM, move it into the SoM DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | ARM: dts: stm32: add seeed studio odyssey-stm32mp157c boardMarcin Sloniewski2020-07-285-0/+709
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds device tree files supporting SBC from Seeed Studio based on STM32MP157C. This works with generic stm32mp1 config. Right now only booting from SD card is supported. Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
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