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* | | x86: broadwell: Update PCH to work in TPLSimon Glass2019-05-081-3/+9
* | | x86: Enable the RTC on all boardsSimon Glass2019-05-081-0/+1
* | | x86: Fix device-tree indentationSimon Glass2019-05-081-74/+73
* | | x86: Update device tree for Chromium OS verified bootSimon Glass2019-05-081-2/+15
* | | x86: Update device tree for TPLSimon Glass2019-05-081-2/+32
* | | x86: Don't generate a bootstage report in SPLSimon Glass2019-05-081-1/+1
* | | x86: Don't set up MTRRs in SPLSimon Glass2019-05-081-1/+4
* | | x86: Support TPL in Intel common codeSimon Glass2019-05-081-3/+6
* | | x86: broadwell: Implement PCH_REQ_PMBASE_INFOSimon Glass2019-05-081-0/+25
* | | x86: ivybridge: Implement PCH_REQ_PMBASE_INFOSimon Glass2019-05-081-0/+15
* | | x86: mrccache: Add more debuggingSimon Glass2019-05-081-4/+12
* | | x86: Support saving MRC data from SPLSimon Glass2019-05-082-9/+38
* | | x86: Add common Intel code for SPLSimon Glass2019-05-082-0/+33
* | | x86: broadwell: Select refcode and CPU code for SPLSimon Glass2019-05-081-3/+4
* | | x86: broadwell: Allow booting from SPLSimon Glass2019-05-082-0/+78
* | | x86: Allow 16-bit init to be in TPLSimon Glass2019-05-083-4/+4
* | | x86: Add support for starting from SPL/TPLSimon Glass2019-05-084-1/+146
* | | x86: broadwell: Split CPU initSimon Glass2019-05-083-673/+695
* | | x86: broadwell: Move init of debug UART to cpu.cSimon Glass2019-05-082-11/+13
* | | x86: broadwell: Allow SDRAM init from SPLSimon Glass2019-05-083-94/+101
* | | x86: broadwell: Improve SDRAM debugging outputSimon Glass2019-05-081-12/+20
* | | x86: Add a handoff header fileSimon Glass2019-05-081-0/+15
* | | x86: Support booting with TPLSimon Glass2019-05-081-1/+8
* | | x86: Support SPL and TPLSimon Glass2019-05-082-1/+31
* | | x86: dts: Add device-tree labels for rtc and resetSimon Glass2019-05-082-2/+2
* | | x86: Add a way to reinit the cpuSimon Glass2019-05-083-44/+94
* | | x86: mp_init: Use proper error numbersSimon Glass2019-05-081-5/+5
* | | x86: Update a stale comment about ifdtoolSimon Glass2019-05-082-2/+2
* | | x86: start64: Fix copyright messageSimon Glass2019-05-081-1/+1
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* | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-05-0713-343/+963
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| * | ARM: dts: renesas: Add RZ/A1 GR-Peach boardChris Brandt2019-05-074-0/+222
| * | ARM: dts: renesas: Add RZ/A1 platform codeChris Brandt2019-05-076-1/+741
| * | sh: 7785: Remove CPU supportMarek Vasut2019-05-072-121/+0
| * | sh: sh7785lcr: Remove the boardMarek Vasut2019-05-071-5/+0
| * | sh: 7724: Remove CPU supportMarek Vasut2019-05-072-211/+0
| * | sh: ecovec: Remove the boardMarek Vasut2019-05-071-5/+0
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-05-077-203/+39
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| * | ARM: socfpga: stratix10: Probe FPGA status before bridge enableAng, Chee Hong2019-05-061-0/+12
| * | ARM: socfpga: stratix10: Disable FPGA2SOC resetAng, Chee Hong2019-05-062-3/+6
| * | arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan2019-05-062-198/+10
| * | arm: dts: Stratix10: Add SDRAM nodeLey Foon Tan2019-05-061-0/+9
| * | ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan2019-05-061-2/+2
* | | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-05-061-0/+3
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| * | | ARM: rmobile: Always select pin control drivers on Gen3Marek Vasut2019-05-041-0/+3
* | | | arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36Brad Griffis2019-05-051-2/+2
* | | | arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw levelingBrad Griffis2019-05-052-3/+14
* | | | arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr pathBrad Griffis2019-05-051-1/+29
* | | | arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 errorBrad Griffis2019-05-051-0/+3
* | | | arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_...Brad Griffis2019-05-051-2/+10
* | | | spl: fix linker size check off-by-one errorsSimon Goldschmidt2019-05-053-6/+6
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