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* ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada2017-08-2035-898/+26
| | | | | | This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* clk: uniphier: fix unmet direct dependencies warningMasahiro Yamada2017-08-201-1/+0
| | | | | | | | | | | | | | Since commit f0776a551764 ("spl: dm: Kconfig: SPL_CLK depends on SPL_DM"), the following warning is displayed: $ make uniphier_v8_defconfig warning: (ARCH_ZYNQ && ARCH_ZYNQMP && STM32F7 && CLK_UNIPHIER) selects SPL_CLK which has unmet direct dependencies (CLK && SPL_DM) While I am here, I am removing the prompt to make it user-unconfigurable option so that "select CLK_UNIPHIER" can be omitted. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2017-08-185-8/+117
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| * dm: mmc: Drop CONFIG_DM_MMC_OPSSimon Glass2017-08-171-2/+0
| | | | | | | | | | | | | | All boards which use DM_MMC have now been converted to use DM_MMC_OPS. Drop the option and good riddance. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: imx: cm_fx6: Add device tree for cm_fx6Simon Glass2017-08-172-0/+116
| | | | | | | | | | | | | | Add this file so we can use device-tree control for cm_fx6. It comes from linux 4.12. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sata: imx: Allow driver model to be used for sataSimon Glass2017-08-171-1/+1
| | | | | | | | | | | | Update the sata call to work with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mmc: sh_sdhi: Fix the ACMD handlingMarek Vasut2017-08-171-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The command handling in this driver is awful, esp. because the driver depends on command numbers to determine whether this is APPCMD or not. Also, handling of command RSP response types is totally wrong. This patch at least plucks out some of the custom command encoding and fixes the APPCMD handling. The RSP handling still needs work, yet that might not be needed as it turns out the uniphier-sd.c driver is in much better shape and supports the same IP, so we might be able to just drop this driver in favor of the uniphier one. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini2017-08-184-184/+32
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| * | m68k: add board stmark2, mcf5441x basedAngelo Dureghello2017-08-181-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sysam stmark2 board is a generic and fully (hw and sw) open board, with a mcf54415 Coldfire CPU, 128MB of DDR2, 16MB of SPI flash and SD card as non volatile memories, and a wifi module included on-board. The board is actually used mainly for Coldfire custodian testing activity related to the mcf5441x Coldfire family. For further information please see: http://sysam.it/cff_stmark2.html Signed-off-by: Angelo Dureghello <angelo@sysam.it> --- Changes in v2: - remove CMD_REGINFO - add board information in commit message
| * | m68k: mcf5445x: allow CS0 to be undefinedAngelo Dureghello2017-08-182-0/+6
| | | | | | | | | | | | | | | | | | | | | On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
| * | m68k: fix cache.c for Coldfire V4EAngelo Dureghello2017-08-181-12/+13
| | | | | | | | | | | | | | | | | | | | | - fix cache.c CONFIG_CF_V4e to CONFIG_CF_V4E - fix cache.c to properly enable/disable cache for V4E Signed-off-by: Angelo Dureghello <angelo@sysam.it>
| * | m68k: mcf5445x: move early ddr init as board-specificAngelo Dureghello2017-08-181-172/+8
| | | | | | | | | | | | | | | | | | | | | | | | For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
* | | rockchip: rk322x: update MACRO for mmc clksel regKever Yang2017-08-181-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The description for eMMC/SDIO/SDMMC src is not correct, update the CRU_CLKSEL11_CON value definition according to TRM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | | rockchip: rk322x: update dram bank sizeKever Yang2017-08-181-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DRAM start address is not 0, so need to update the last bank size as: DRAM start addr + DRAM_SIZE - last bank start addr Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | rockchip: rk3399: spl: remove unused header inclusionPhilipp Tomsich2017-08-181-1/+0
| | | | | | | | | | | | | | | | | | | | | fdtdec.h is included, but not used in rk3399-board-spl.c: remove the '#include'-statement. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | | rockchip: dts: rk3399-evb: remove redundant gmac nodeKever Yang2017-08-181-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are two same gmac node, remove one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | | rockchip: dts: rk3399-firefly: update gmac parameterKever Yang2017-08-171-2/+2
|/ / | | | | | | | | | | | | | | | | | | Update the tx_delay and rx_delay to match the timing for rk3399-firefly board to improve the stability of gmac data transfer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge git://git.denx.de/u-boot-tegraTom Rini2017-08-164-14/+10
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| * | apalis_t30/tk1, colibri_t20/t30: fix i2c bus frequenciesMarcel Ziswiler2017-08-154-10/+10
| | | | | | | | | | | | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | apalis-tk1: remove duplicate hdmi_ddc device tree nodeMarcel Ziswiler2017-08-151-4/+0
| |/ | | | | | | | | Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-08-167-1/+236
|\ \ | | | | | | | | | | | | | | | Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>
| * | sun50i: a64: Add A64-OLinuXino initial supportJagan Teki2017-08-152-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC. OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver - 5V DC power supply Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | sun50i: a64: Add initial NanoPi A64 supportJagan Teki2017-08-152-0/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
| * | sun50i: a64: Sync Linux [oe]hci0 nodesJagan Teki2017-08-111-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synced ohci0 and ehci0 nodes from Linux for sun50i-a64.dtsi Here is the Linux last merge tag details: Merge: 0e91f43d e5770b7 Author: Stephen Rothwell <sfr@canb.auug.org.au> Date: Fri Jun 9 14:59:55 2017 +1000 Merge remote-tracking branch 'staging/staging-next' Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | sunxi: switch PRCM to non-secure on H3/H5 SoCsIcenowy Zheng2017-08-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PRCM of H3/H5 SoCs have a secure/non-secure switch, which controls the access to some clock/power related registers in PRCM. Current Linux kernel will access the CPUS (AR100) clock in the PRCM block, so the PRCM should be switched to non-secure. Add code to switch the PRCM to non-secure. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sunxi: add PRCM secure switch register definitionIcenowy Zheng2017-08-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some new Allwinner SoCs' PRCM has a secure switch register, which controls the access to some clock and power registers in PRCM block. Add the definition of this register and its bits in the PRCM header file. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmcEmmanuel Vadot2017-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one. This makes the original node (mmc2_pins_a) scrapped out of the dtb and result in a unusable eMMC if U-Boot didn't configured the pins to the correct functions. Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | | Merge git://www.denx.de/git/u-boot-imxTom Rini2017-08-167-31/+72
|\ \ \ | | | | | | | | | | | | | | | | | | | | Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | imx: mx7: fix build warning when CONFIG_IMX_RDC not enabledPeng Fan2017-08-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build warning when CONFIG_IMX_RDC not defined in defconfig. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | | imx: mx6sl: simplify code using setbits_le32Peng Fan2017-08-161-15/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify code by removing set_preclk_from_osc with directly setbits_le32. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | | imx: mx6sx: select OSC as uart's clk parentPeng Fan2017-08-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As M4 is sourcing UART clk from OSC, to make UART work when M4 is enabled, need to select OSC as clk parent, 24M OSC is enough for debug UART in uboot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | | imx: mx6: soc: fix mx6sll settingsPeng Fan2017-08-161-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is not LDO_SOC/PU/ARM/MMDC1 on i.MX6SLL, also no need to gate/ungate all PFDs to make PFD working. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | | imx: mx6: select ARM_ERRATA_845369Peng Fan2017-08-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Select ARM_ERRATA_845369 for i.MX6DQ/DL/QP. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | arm: Implement workaround for Cortex-A9 errata 845369Peng Fan2017-08-162-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | ARM: i.MX6: exclude the ARM errata from i.MX6 UP systemPeng Fan2017-08-161-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM errata 751472, 794072, 761320 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | | imx: imx6ull: correct get_cpu_speed_grade_hzSébastien Szymanski2017-08-161-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | i.MX6ULL has different speed grades than i.MX6UL. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
| * | | imx: imx6ul: correct get_cpu_speed_grade_hz on 696MHz SoCsSébastien Szymanski2017-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Return the correct value when the speed grade is 696MHz. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
| * | | imx6: clock: correct comment for PLL_VIDEOAnatolij Gustschin2017-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This appear to be a copy-paste error, clean it up. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | imx6: use SION macro in SDn_CMD mux mode bitfield argumentsAnatolij Gustschin2017-08-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Select SION by appropriate macro instead of constant. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | mx6: Add support for Phytec pfla02 (NAND)Stefano Babic2017-08-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Phytec pfla02, equipped with NAND. CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 31C Reset cause: POR I2C: ready DRAM: 1 GiB NAND: 2048 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Stefan Christ <s.christ@phytec.de> CC: Stefan Müller-Klieser <S.Mueller-Klieser@phytec.de> CC: Christian Hemp <C.Hemp@phytec.de>
* | | | env: Rename some other getenv()-related functionsSimon Glass2017-08-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these other functions as well, for consistency: getenv_vlan() getenv_bootm_size() getenv_bootm_low() getenv_bootm_mapsize() env_get_default() Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename eth_getenv_enetaddr() to eth_env_get_enetaddr()Simon Glass2017-08-162-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rename this function for consistency with env_get(). Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()Simon Glass2017-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename getenv/_f() to env_get()Simon Glass2017-08-1623-39/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename eth_setenv_enetaddr() to eth_env_set_enetaddr()Simon Glass2017-08-162-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rename this function for consistency with env_set(). Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename common functions related to setenv()Simon Glass2017-08-162-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these commonly used functions, for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Rename setenv() to env_set()Simon Glass2017-08-1613-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | env: Drop saveenv() in favour of env_save()Simon Glass2017-08-151-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the env_save() function directly now that there is only one implementation of saveenv(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | env: Convert CONFIG_ENV_IS_IN... to a choiceSimon Glass2017-08-1522-52/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | Move environment files from common/ to env/Simon Glass2017-08-151-2/+2
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | About a quarter of the files in common/ relate to the environment. It seems better to put these into their own subdirectory and remove the prefix. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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