summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* Merge git://git.denx.de/u-boot-arcTom Rini2018-01-194-80/+153
|\
| * ARC: Invalidate instruction and data caches early on bootEugeniy Paltsev2018-01-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | This is useful to make sure no stale data exists in caches after bootloaders. The worst thing could be some lines of cache were locked in a bootloader for example during DDR recalibration and never unlocked. This may lead to really unpredictable issues later down the line. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: HSDK: DTS: Add cgu-clk nodeEugeniy Paltsev2018-01-191-0/+6
| | | | | | | | | | | | | | Add cgu-clk (clock generation unit) node to HSDK device tree. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: Cache: Fix style violations reported by checkpatchEugeniy Paltsev2018-01-191-10/+8
| | | | | | | | | | Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: Cache: Disable IOC by defaultEugeniy Paltsev2018-01-191-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We'd like to keep IOC HW at the same state as t is right after reset when we start Linux kernel so there will be no re-configuration of IOC on the go. The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a lot of DMA operations especially on multiple cores simultaneously. At the same time re-configuration of IOC in run-time might become quite a tricky experience because we need to make sure there're no DMA trannsactions in flight otherwise unexpected consequencses might affect us much later and debugging those kinds of issues will be a real nightmare. That said let's make our life easier a little bit. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: ARCv2: Cache: Fixed operation without IOCEugeniy Paltsev2018-01-192-69/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous SLC management implementation is broken. Seems like it was never sufficiently tested probably because most of the time IOC was used instead (i.e. no manual cache operations were done). Now if we disable IOC in U-boot we'll get a lot of errors while using DMA-enabled peripherals. This time we fix it by substitution of broken per-line SLC operations region operations as it is done in the Linux kernel (we took it from v4.14 which is the latest stable as of today). Among other things this implementation might be a bit faster because instead of iteration over each and every cache line we're taking care about entire region in one go. Main changes: * Replaced __slc_line_op (per line operations) by __slc_rgn_op (region operations). * Reworked __slc_entire_op to get rid of __after_slc_op and __before_slc_op functions. Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is used, see [1] for more details) is already incorporated here. * Added SLC invalidation to invalidate_icache_all(). * Added (start >= end) check to invalidate_dcache_range() and flush_dcache_range() as some buggy drivers pass region start == end. * Added read-out of MMU BCR so we may know if PAE40 exists in HW and then act on a particular AUX regs accordingly. [1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | configs: stm32: move config flag from defconfig to KconfigPatrice Chotard2018-01-191-0/+22
| | | | | | | | | | | | | | Move system flags from defconfig to mach-stm32/Kconfig Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* | serial: stm32: Rename serial_stm32x7.c to serial_stm32.cPatrice Chotard2018-01-191-1/+1
| | | | | | | | | | | | | | | | Now this driver is used across stm32f4, stm32f7 and stm32h7 SoCs family, give it a generic name. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* | ARM: qemu-arm: Add support for AArch64Tuomas Tynkkynen2018-01-192-2/+11
| | | | | | | | | | | | | | | | | | | | This adds support for '-machine virt' on AArch64. This is rather simple: we just add TARGET_QEMU_ARM_xxBIT to select a few different Kconfig symbols, provide the ARMv8 memory map from the board file and add a new defconfig based on the 32-bit defconfig. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm: mach-omap2: Remove secure certificate name printingAndrew F. Davis2018-01-191-6/+6
| | | | | | | | | | | | | | | | | | The signing certificate name is always 15 chars long, but need not be null terminated. One solution is then to use printf precision modifiers to only print this many chars ("%.15s"), but tiny printf does not support this, so lets just drop printing the cert name for now. Signed-off-by: Andrew F. Davis <afd@ti.com>
* | arm: am33xx: security: Fix size calculation on headerMadan Srinivas2018-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix the size calculation in the verify boot. The header size should be subtracted from the image size, not be assigned to the image size. Fixes: 0830d72bb9f8 ("arm: am33xx: security: adds auth support for encrypted images") Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: omap3-beagle{-xm}: Add support for BeagleBoardDerald D. Woods2018-01-197-0/+953
| | | | | | | | | | | | | | | | This commit adds OMAP3 BeagleBoard devicetree files from Linux v4.15-rc5. This includes standard OMAP34XX board revisions as well as the 'xM' which is OMAP36XX. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
* | ARM: dts: am574x-idk: Add initial supportLokesh Vutla2018-01-196-92/+126
| | | | | | | | | | | | Add initial dts support for am574x-idk Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am57xx: Enable CMD_DDR3Lokesh Vutla2018-01-191-0/+1
| | | | | | | | | | | | Enable CMD_DDR3 on all am57xx based platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am574x-idk: Add hw data supportLokesh Vutla2018-01-191-0/+1
| | | | | | | | | | | | Update prcm, voltages and pinmux support for am574x-idk. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: dra762: Add support for device package identificationLokesh Vutla2018-01-197-2/+78
| | | | | | | | | | | | | | | | | | | | | | | | DRA762 comes in two packages: - ABZ: Pin compatible package with DRA742 with DDR@1333MHz - ACD: High performance(OPP_PLUS) package with new IPs Both the above packages uses the same IDCODE hence needs to differentiate using package information in DIE_ID_2. Add support for the same. Also update clock, ddr, emif information. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | cmd: ti: Generalize cmd_ddr3 commandLokesh Vutla2018-01-192-0/+3
| | | | | | | | | | | | | | | | | | Keystone and DRA7 based TI platforms uses same EMIF memory controller. cmd_ddr3 command is customized for keystone platforms, make it generic so that it can be re used for DRA7 platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: keystone: Move cmd_ddr3 to a common placeLokesh Vutla2018-01-193-250/+4
| | | | | | | | | | | | | | | | | | Move cmd_ddr3 to cmd/ti in order to make it build for non-keystone TI platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Rename to ddr3.c not cmd_ddr3.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: emif-common: Add suppport for enabling ECCLokesh Vutla2018-01-192-1/+119
| | | | | | | | | | | | | | | | | | For data integrity, the EMIF1 supports ECC on the data written or read from the SDRAM. Add support for enabling ECC support in EMIF1. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
* | arm: emif-common: Add ecc specific emif registersLokesh Vutla2018-01-192-4/+19
| | | | | | | | | | | | | | | | This is a slight difference in emif_ddr_phy_status register offsets for DRA7xx EMIF and older versions. And ecc registers are available only in DRA7xx EMIC. Add support for this difference and ecc registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | drivers: dma: ti-edma3: add support for memory fillTero Kristo2018-01-191-0/+2
| | | | | | | | | | | | | | Add support for simple memory fill operation. With large data sizes it is much faster to use EDMA for memory fill rather than CPU. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | arm: am33xx: Avoid writing into reserved DPLL dividerLokesh Vutla2018-01-191-6/+6
| | | | | | | | | | | | | | | | | | DPLL DRR doesn't have an M4 divider. But the clock driver is trying to configure M4 divider as 4(writing into a reserved register). Fixing it by making M4 divider as -1. Reported-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s supportRex Chang2018-01-192-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for K2G EVM with FlipChip SoC of which ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also backward compatible with old revision EVM and EVM with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s. The new SoC supports 2 different speeds at 1GHz and 600MHz. Modyfied the CPU Name to show which SoC is used in the EVM. Modified the DDR3 configuration to reflect New SoC supports 2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT. Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz, and set the u-boot env variable board_name accordingly. Modified findfdt script in u-boot environment variable to include new k2g board type. Signed-off-by: Rex Chang <rchang@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVMVignesh R2018-01-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance to use if any at all is done through CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is handled in U-boot. Handle this additional pinmuxing requirement in U-boot to ensure that MCAN is used by default via the DCAN1 pins. Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> [fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN] Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* | mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bitKishon Vijay Abraham I2018-01-191-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | omap_hsmmc driver uses "|" in a couple of places for disabling a bit. While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a _mask_ argument to take care of resetting a bit), it's incorrectly used for resetting flags in "omap_hsmmc_send_cmd". Fix it here by using "&= ~()" to reset a bit. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: omap_hsmmc: Add support for DMA (ADMA2)Kishon Vijay Abraham I2018-01-191-1/+11
| | | | | | | | | | | | | | | | | | | | | | The omap hsmmc host controller can have the ADMA2 feature. It brings better read and write throughput. On most SOC, the capability is read from the hl_hwinfo register. On OMAP3, DMA support is compiled out. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | omap: Update the base address of the MMC controllersJean-Jacques Hiblot2018-01-185-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | Align the base address defined in header files with the base address used in the DTS. This will facilitate the introduction of the DMA support. Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at the top. This region will be used to determine if the controller supports DMA transfers Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"Jean-Jacques Hiblot2018-01-181-0/+3
|/ | | | | | | | | This reverts commit 46831c1a4cda75d92f7ad18d4e2b1eb196c62b2f. This reserved area at the beginning of struct hsmm, will be used later to support ADMA Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-01-175-4/+61
|\
| * armv8/ls1088a: configure PMU's PCTBENR to enable WDTZhang Ying-224552018-01-151-2/+2
| | | | | | | | | | | | | | | | | | The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: ls1012a: LS1012A-2G5RDB board supportBhaskar Upadhaya2018-01-154-1/+57
| | | | | | | | | | | | | | | | LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/kconfig: Align boards of same family at one placeBhaskar Upadhaya2018-01-151-2/+3
| | | | | | | | | | | | | | Align boards belonging to LS1012A, LS2080A SoC at one place. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-i2cTom Rini2018-01-161-4/+4
|\ \
| * | imx: mx7ulp: modify lpi2c seq numberPeng Fan2018-01-161-4/+4
| | | | | | | | | | | | | | | | | | | | | Modify the lpi2c alias seq number to align with device. Then no need to add 4 to get the device index. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | | armv8: secure firmware: fix incorrect unit address in node nameAndre Przywara2018-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Remove the unit address from the config node name when U-Boot deals with secure firmware FIT images. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | doc: fix incorrect usage of DT node unit addressAndre Przywara2018-01-151-8/+8
|/ / | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in various documentation files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | Merge git://git.denx.de/u-boot-imxTom Rini2018-01-1515-211/+1139
|\ \
| * | arm: imx: hab: Add hab_failsafe console commandBryan O'Donoghue2018-01-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hab_failsafe when called puts the part into BootROM recovery mode. This will allow u-boot scripts to script the dropping down into recovery mode. => hab_failsafe Shows the i.MX7 appear as "hiddev0,hidraw5: USB HID v1.10 Device [Freescale SemiConductor Inc SP Blank ULT1] " in a Linux dmesg thus allowing download of a new image via the BootROM USB download protocol routine. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Implement hab_rvt_failsafeBryan O'Donoghue2018-01-141-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the basic callback hooks for hab_rvt_check_failsafe for BootROM code using the older BootROM address layout - in my test case the i.MX7. Code based on new BootROM callbacks will just do nothing and there's definitely a TODO to implement that extra functionality on the alternative BootROM API. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Define rvt_failsafe()Bryan O'Donoghue2018-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hab_rvt_failsafe() callback according to the HABv4 documentation: "This function provides a safe path when image authentication has failed and all possible boot paths have been exhausted. It is intended for use by post-ROM boot stage components, via the ROM Vector Table." Once invoked the part will drop down to its BootROM USB recovery mode. Should it be the case that the part is in secure boot mode - only an appropriately signed binary will be accepted by the ROM and subsequently executed. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Make imx_hab_is_enabled globalBryan O'Donoghue2018-01-142-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It will be helpful to boot commands to know if the HAB is enabled. Export imx_hab_is_enabled() now to facilitate further work with this data-point in a secure-boot context. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Make authenticate_image() return zero on open boardsBryan O'Donoghue2018-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BootROM will not successfully process a HAB image passed by u-boot unless the board has been set into locked mode. Some of the existing usages of authenticate_image() expect and rely on unlocked boards doing the following 1. Not calling into the BootROM authenticate_image() callback 2. Returning a pass status for authenticate_image() calls anyway A previous patch removed the necessity to call into imx_hab_is_enabled() twice. This patch ensures the reliance on authenticate_image() returning zero is maintained. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Suggested-by: Breno Matheus Lima <brenomatheus@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com>
| * | arm: imx: hab: Rename is_hab_enabled imx_hab_is_enabledBryan O'Donoghue2018-01-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Understanding if the HAB is enabled is something that we want to interrogate and report on outside of the HAB layer. First step to that is renaming the relevant function to match the previously introduced external naming convention imx_hab_function() The name imx_hab_is_hab_enabled() is a tautology. A more logical name is imx_hab_is_enabled(). Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Prefix authenticate_image with imx_habBryan O'Donoghue2018-01-143-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy up the HAB namespace a bit by prefixing external functions with imx_hab. All external facing functions past this point will be prefixed in the same way to make the fact we are doing IMX HAB activities clear from reading the code. authenticate_image() could mean anything imx_hab_authenticate_image() is on the other hand very explicit. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Make internal functions and data staticBryan O'Donoghue2018-01-141-75/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to export these functions and data structures externally. Make them all static now. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Print HAB event log only after calling ROMBryan O'Donoghue2018-01-141-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current flow of authenticate_image() will print the HAB event log even if we reject an element of the IVT header before ever calling into the ROM. This can be confusing. This patch changes the flow of the code so that the HAB event log is only printed out if we have called into the ROM and received some sort of status code. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Suggested-by: Cc: Breno Matheus Lima <brenomatheus@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Add a hab_rvt_check_target to image authBryan O'Donoghue2018-01-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a hab_rvt_check_target() step to authenticate_image() as a sanity check for the target memory region authenticate_image() will run over, prior to making the BootROM authentication callback itself. This check is recommended by the HAB documentation so it makes sense to adhere to the guidance and perform that check as directed. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Implement hab_rvt_check_targetBryan O'Donoghue2018-01-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the basic callback hooks for hab_rvt_check_target() for BootROM code using the older BootROM address layout - in my test case the i.MX7. Code based on new BootROM callbacks will just have HAB_SUCCESS as a result code. Adding support for the new BootROM callbacks is a TODO. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Define rvt_check_target()Bryan O'Donoghue2018-01-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hab_rvt_check_target() callback according to the HABv4 documentation: "This function reports whether or not a given target region is allowed for either peripheral configuration or image loading in memory. It is intended for use by post-ROM boot stage components, via the ROM Vector Table, in order to avoid configuring security-sensitive peripherals, or loading images over sensitive memory regions or outside recognized memory devices in the address map." It is a useful function to support as a precursor to calling into authenticate_image() to validate the target memory region is good. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx: hab: Print additional IVT elements during debugBryan O'Donoghue2018-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables printout of the IVT entry, dcd and csf data fields. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Breno Matheus Lima <brenomatheus@gmail.com> Tested-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
View Lorry Controller Status