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* Merge tag 'efi-next-20230325' of ↵Tom Rini2023-03-256-43/+104
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-efi into next Pull request for efi-next-20230325 Documenation: * add man-page for efi command UEFI: * Let EFI app call ExitBootServices() before legacy booting kernel * Support zboot and bootm in the EFI app * Let efi command show configuration tables * Support booting a 64-bit kernel from 64-bit EFI app * Allocate device-tree copy from high memory * simplify efi_str_to_u16()
| * x86: Exit EFI boot services before starting kernelSimon Glass2023-03-251-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running the EFI app, we need to exit boot services before jumping to Linux. At some point it may be possible to jump to Linux and pass on the system table, and: * install the device-tree as configuration table * use LoadImage() to load the kernel image (e.g. from memory) * start the image with StartImage() This should allow the Linux efistub to be used. For now, this is not implemented. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Support booting a 64-bit kernel from 64-bit U-BootSimon Glass2023-03-253-16/+36
| | | | | | | | | | | | | | | | | | | | Add the missing code to handle this. For a 64-bit kernel the entry address is 0x200 bytes after the normal entry. Rename the parameter to boot_linux_kernel() accordingly. Update the comments to indicate that these are addresses, not pointers. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Add return-value comment to cpu_jump_to_64bit()Simon Glass2023-03-251-0/+1
| | | | | | | | | | | | This does not mention what it returns. Add the missing documentation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Adjust bootparam.h to be more like linuxSimon Glass2023-03-252-25/+47
| | | | | | | | | | | | | | This likely came from Linux originally, so update it to match v6.2 more. This has no functional change. Signed-off-by: Simon Glass <sjg@chromium.org>
| * efi: Set RUN_64BIT correctly for the EFI appSimon Glass2023-03-251-2/+2
| | | | | | | | | | | | | | | | The U-Boot EFI app can run as a 64-bit program, so set the Kconfig correctly in that case. Make sure it doesn't build SPL, since there is no need to switch from 32 to 64 bit when running. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: kirkwood: Move internal registers in arch_very_early_init() functionPali Rohár2023-03-244-3/+15
| | | | | | | | | | | | | | | | | | Same change as was done for mvebu in commit 5bb2c550b11e ("arm: mvebu: Move internal registers in arch_very_early_init() function") but for kirkwood. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | arm: mvebu: Set common SPI flash default speed and modeTony Dinh2023-03-241-0/+10
|/ | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SF_DEFAULT_SPEED is used in SPL SPI to configure and probe the flash device during DM SPI uclass probing process, if the spi-max-frequency is not available in the DTB. Currently the max frequency is not available, because of the probing mechanism in SPI uclass has not been fully updated to DM. The CONFIG_SF_DEFAULT_SPEED is set to 1Mhz if a board defconfig does not specify it. This speed is too slow and result in a few seconds delay while the u-boot image is loaded from flash. Based on a survey of the device tree specifications for MVEBU boards, a sane default value should be 10Mhz. The default of 10Mhz enables an almost instantaneously loading of the u-boot image. Note that this patch depends on this patch series (has been merged to u-boot-marvell/next): https://lists.denx.de/pipermail/u-boot/2023-March/511038.html - RESEND: correct spelling of SF_DEFAULT_MODE Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* spl: Add function prototype for spl_mmc_get_uboot_raw_sectorTom Rini2023-03-221-0/+1
| | | | | | | | | | We did not add a prototype for spl_mmc_get_uboot_raw_sector to include/spl.h before, so add and document one now. Correct the incorrect prototype in board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c and ensure that we have spl.h where we define a non-weak spl_mmc_get_uboot_raw_sector as well. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Correct cpu_reset function prototype on some platformsTom Rini2023-03-223-3/+6
| | | | | | | Some platforms were not including <cpu_func.h> which sets the prototype for reset_cpu, and in turn had it set wrong. Correct these cases. Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: rmobile: Split R-Car Gen3 into separate Kconfig from common 64bit optionsMarek Vasut2023-03-182-201/+206
| | | | | | | | | There are multiple shared Kconfig options between R-Car Gen3 and Gen4. Keep the common options in Kconfig.64 and move the R-Car Gen3 specific options into separate Kconfig.rcar3 . The Kconfig.rcar3 contains SoC and board list, which is limited to R-Car Gen3. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* ARM: rmobile: Introduce CONFIG_RCAR_64 symbolMarek Vasut2023-03-181-12/+17
| | | | | | | | Introduce common Kconfig symbol for 64bit R-Car platforms and move common configuration options into it. This is preparatory patch to prevent duplication of Kconfig lists later on, when Gen4 is added. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* ARM: rmobile: Factor out SYS_SOC Kconfig optionMarek Vasut2023-03-184-9/+3
| | | | | | | | Pull the SYS_SOC Kconfig option to avoid duplication of this option in Kconfig.{32,64,rza1} . The default value is the same, so just set it in one location. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* ARM: rmobile: Sort R-Car Gen3 Kconfig listsMarek Vasut2023-03-182-16/+16
| | | | | | | Sort the 'imply' and 'select' lists in R-Car Gen3 Kconfig options. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* ARM: rmobile: Convert ifdef in rmobile_get_prr() to IS_ENABLED()Marek Vasut2023-03-181-4/+3
| | | | | | | | | Switch ifdef in rmobile_get_prr() to IS_ENABLED() macro. The CONFIG_RCAR_GEN3 will never have SPL counterpart, so the IS_ENABLED() macro is the right one here. No functional change, except for improved build test coverage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* ARM: renesas: Enable DTO support by default on R-Car Gen3Marek Vasut2023-03-181-0/+3
| | | | | | | | All R-Car Gen3 defconfigs present in U-Boot do enable DTO support, enable it for all of R-Car Gen3 by default in Kconfig instead, so that no new boards would miss this functionality. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* Merge tag 'xilinx-for-v2023.07-rc1' of ↵Tom Rini2023-03-1617-125/+106
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2023.07-rc1 cmd: - Print results in hex instead of dec in smc command firmware: - Cover missing ZYNQMP_FIRMWARE dependencies fpga: - fix loads for unencrypted use case relocation - Add support for BE systems spi: - Fix xilinx_spi init reset sequence arasan nand: - Remove hardcoded bbt option - Set ofnode value xilinx: - Enable SMC command - Fix some sparse issues zynqmp: - Remove cdns,zynq-gem compatible string - Add optee node - Some DT cleanups zynq: - Some DT cleanups microblaze - Remove MANUAL_RELOC option
| * microblaze: drop remnants of manual relocOvidiu Panait2023-03-133-34/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Runtime relocation has been made the default for microblaze, so do the following cleanups: - drop all manual reloc codepaths in start.S - drop all STATIC_RELA ifdefs, as it is now enabled unconditionally in Kconfig Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * microblaze: drop CONFIG_NEEDS_MANUAL_RELOCOvidiu Panait2023-03-131-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze and m68k are the only remaining architectures that still enable CONFIG_NEEDS_MANUAL_RELOC by default. Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for quite some time, since commit d58c007498 ("microblaze: Add support for run time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make runtime relocation the default, as the rest of the architectures do. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-4-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * xilinx: zynqmp: Add missing prototype for zynqmp_mmio_writeAlgapally Santosh Sagar2023-03-092-11/+2
| | | | | | | | | | | | | | | | | | | | Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by defaultAshok Reddy Soma2023-03-092-0/+4
| | | | | | | | | | | | | | | | | | By default enable nand-on-flash-bbt DT flag, so that driver always refers to the bad block table(bbt) present on the flash device. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: zynqmp: Fix nand dt nodeAshok Reddy Soma2023-03-091-47/+70
| | | | | | | | | | | | | | | | | | | | DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: zynqmp: Remove comment about gem spec in kv260Michal Simek2023-03-094-6/+6
| | | | | | | | | | | | | | | | | | | | | | The latest SOM specification doesn't enforce certain MIO lines allocated for ethernet or ethernet controller itself. That's why remove comment about it which is likely there from early version of specification. Also removed the same comment from pinctrl node. It is clear that it has to be defined for different carrier cards. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9406377bf2c391ac0200670511bd6b0edb097c96.1676880543.git.michal.simek@amd.com
| * arm64: zynqmp: Add an OP-TEE node to the device treeIlias Apalodimas2023-03-091-0/+5
| | | | | | | | | | | | | | | | | | | | Since the zynqmp boards can run upstream OP-TEE, and having the DT node present doesn't cause any side effects add it in case someone tries to load OP-TEE. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * ARM: zynq: Comment interrupt names IRQs for pl330Michal Simek2023-03-091-2/+4
| | | | | | | | | | | | | | | | pl330 DT yaml description doesn't define interrupt-names property that's why comment it but keep it as comment. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
| * ARM: dts: zynq-7000: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski2023-03-091-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
| * ARM: dts: xilinx: align gpio-key node names with dtschemaKrzysztof Kozlowski2023-03-092-3/+3
| | | | | | | | | | | | | | | | | | The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * ARM: zynq: Use recommended dma-controller name instead of dmacMichal Simek2023-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | Use standard name for dma controller. Issue is reported by dtbs_check as dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match '^dma-controller(@.*)?$' Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
| * arm64: zynqmp: Enable hs termination flag for USB dwc3 controllerMichael Grzeschik2023-03-091-0/+2
| | | | | | | | | | | | | | | | | | Since we need to support legacy phys with the dwc3 controller, we enable this quirk on the zynqmp platforms. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: xilinx: align LED node names with dtschemaKrzysztof Kozlowski2023-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | The node names should be generic and DT schema expects certain pattern: xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * xilinx: dts: Remove cdns,zynq-gemMichal Simek2023-03-092-6/+6
| | | | | | | | | | | | | | | | cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also U-Boot driver has been updated to support new compatible string that's why it is time to remove it and deprecate it. Signed-off-by: Michal Simek <michal.simek@amd.com>
* | Merge tag 'fsl-qoriq-next-2023-3-14' of ↵Tom Rini2023-03-162-15/+46
|\ \ | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next Enable DM_SERIAL for freescale ls2080a Drop non DM_ETH code for freescale: lx2160a/ls2080rdb/ls2080aqds/ls1088a
| * | arch: arm: dst: fsl-ls2080a.dts: tag serial nodes with bootph-allIoana Ciornei2023-03-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Tag the serial nodes with bootph-all in order to have these nodes and the drivers available before relocation. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with LinuxIoana Ciornei2023-03-141-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the serial nodes of the LS208XA RDB/QDS boards with their representation in Linux. We also imported the clockgen and sysclk nodes which are dependencies. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arch: arm: dst: fsl-ls2080a.dtsi: move the serial nodes under socIoana Ciornei2023-03-141-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the serial nodes under the soc node. No changes are made to the nodes, just their location is changed. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arch: arm: dst: fsl-ls2080a.dtsi: add an 'soc' nodeIoana Ciornei2023-03-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The u-boot dts for these boards do not have an soc node, unlike its Linux counterpart. This patch just adds the soc node as seen in Linux, the next patches will move some nodes under it. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: ls1088a-rdb: replace 'xgmii' with '10gbase-r'Ioana Ciornei2023-03-141-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | When the first device tree description was added for the ethernet nodes, the 2 10G ports on the LS1088ARDB were wrongly described as 'xgmii'. Fix this by replacing the two last occurrences of 'xgmii' in the device trees of the Layerscape DPAA2 devices. Fixes: 68c7c008e84a ("arm: dts: ls1088ardb: add DPMAC and PHY nodes") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge tag 'v2023.04-rc4' into nextTom Rini2023-03-1452-40/+9571
|\ \ | | | | | | | | | | | | | | | Prepare v2023.04-rc4 Signed-off-by: Tom Rini <trini@konsulko.com>
| * | ARM: dts: renesas: Enable sysinfo on R-Car D3 DraakTam Nguyen2023-03-101-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for sysinfo on R-Car D3 Draak board. The sysinfo is used e.g. to access and decode board-specific information and then in turn used by board-info to print those information. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Drop compatible from I2C node, this is in r8a77995.dtsi already. Drop status = "okay" from EEPROM node. Add dts: tag. Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
| * | ARM: dts: renesas: Enable sysinfo on R-Car V3H Condor/Condor-ITam Nguyen2023-03-101-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new sysinfo IDs for R-Car V3H Condor/Condor-I . Enable support for sysinfo on R-Car V3H Condor/Condor-I. The sysinfo is used e.g. to access and decode board-specific information and then in turn used by board-info to print those information. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Drop compatible from I2C node, this is in r8a77980.dtsi already. Drop status = "okay" from EEPROM node. Add dts: tag. Update the commit message, note the new sysinfo IDs. Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
| * | sandbox: Correctly define BITS_PER_LONGMichal Suchanek2023-03-011-5/+1
| | | | | | | | | | | | | | | | | | | | | SANDBOX_BITS_PER_LONG is the number of bits in long on the sandbox platform. Signed-off-by: Michal Suchanek <msuchanek@suse.de>
| * | Merge tag 'u-boot-at91-fixes-2023.04-a' of ↵Tom Rini2023-03-011-1/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 First set of u-boot-at91 fixes for the 2023.04 cycle: This fixes set include one clock index fix for sama7g5 and two board configuration alignments for pm9g45.
| | * | ARM: dts: at91: sama7g5: fix clock id for ebi nodeMihai Sain2023-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMC_MCK1 clock id for the ebi node is 23. Fixes: 746b738224ad ("ARM: dts: at91: sama7g5/sama7g5ek: align with Linux DT") Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
| * | | board: rockchip: add Radxa ROCK5B Rk3588 boardEugen Hristev2023-02-284-1/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm Kernel commits: a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board") 6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | rockchip: rk3588: Read cpuid from otpJonas Karlman2023-02-282-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Read cpuid from otp and set ethaddr for RK3588. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | rockchip: rk3568: Read cpuid from otpJonas Karlman2023-02-283-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs. Add and use a CFG_CPUID_OFFSET to define this offset. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | rockchip: misc: Set eth1addr mac addressJonas Karlman2023-02-281-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set eth1addr in addition to ethaddr. Also allow fdt fixup of ethernet mac addresses when CMD_NET is disabled. Set ethaddr and eth1addr based on HASH and SHA256 options. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | board: rockchip: Add Edgeble Neural Compute Module 6Jagan Teki2023-02-282-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module based on Rockchip RK3588 from Edgeble AI. General features: - Rockchip RK3588 - up to 32GB LPDDR4x - up to 128GB eMMC - 2x MIPI CSI2 FPC On module WiFi6/BT5 is available in the following Neu6 variants. Neural Compute Module 6(Neu6) IO board is an industrial form factor ready-to-use IO board from Edgeble AI. IO board offers plenty of peripherals and connectivity options and this patch enables basic eMMC and UART which is enough to successfully boot Linux. Neu6 needs to mount on top of this IO board in order to create a complete Edgeble Neural Compute Module 6(Neu6) IO platform. Boot log for the record, DDR Version V1.08 20220617 LPDDR4X, 2112MHz channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB Manufacturer ID:0x6 CH0 RX Vref:31.7%, TX Vref:21.8%,21.8% CH1 RX Vref:30.7%, TX Vref:22.8%,23.8% CH2 RX Vref:30.7%, TX Vref:22.8%,22.8% CH3 RX Vref:30.7%, TX Vref:21.8%,21.8% change to F1: 528MHz change to F2: 1068MHz change to F3: 1560MHz change to F0: 2112MHz out U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Trying to boot from MMC1 INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-391-g856309329:derrick.huang NOTICE: BL31: Built : 14:15:50, Jul 18 2022 INFO: ext 32k is not valid INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: system boots from cpu-hwid-0 INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001 INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz INFO: BL31: Initialising Exception Handling Framework INFO: BL31: Initializing runtime services WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9 U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Model: Edgeble Neu6A IO Board DRAM: 7.5 GiB (effective 3.7 GiB) Core: 71 devices, 15 uclasses, devicetree: separate MMC: mmc@fe2c0000: 0 Loading Environment from nowhere... OK In: serial@feb50000 Out: serial@feb50000 Err: serial@feb50000 Model: Edgeble Neu6A IO Board Net: No ethernet found. Hit any key to stop autoboot: 0 => Add support for Edgeble Neu6 Model A IO Board. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | | ARM: dts: rockchip: rk3588s-u-boot: Add sdmmc nodeJagan Teki2023-02-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting from SDMMC is one of the fast and easy booting methods for initial support of any SoC to upstream more features.  This patch is trying to add the sdmmc node for rk3588 and added as u-boot specific node in -u-boot.dtsi as upstream Linux is not supporting yet. As soon as Linux supports it, a sync of the Linux device tree would eventually drop this node.  Clock properties as added according to the rockchip mmc driver but the actual definition might add scmi clocks into 0 and 1 indexes. This is due to scmi clock are not supporting in upstream U-Boot. Properly addition of scmi clock would eventually follow sdmmc clock definition of Linux once they upstreamed. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
| * | | ARM: dts: rockchip: Add rk3588-u-boot.dtsiJagan Teki2023-02-282-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties for Rockchip RK3588 SoC to boot the SPL. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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