Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | board/freescale: Update ddr clk_adjust | Shengzhou Liu | 2016-06-03 | 1 | -16/+16 |
* | armv8/ls2080ardb: Update DDR timing to support more UDIMMs | Shengzhou Liu | 2016-05-17 | 1 | -3/+3 |
* | armv8: LS2080A: Rename LS2085A to reflect LS2080A | Prabhakar Kushwaha | 2015-11-30 | 1 | -0/+92 |