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* configs: at91sam9rlek: Update for DT and DM supportWenyou Yang2017-05-091-1/+1
| | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9260ek/9g20ek: Enable early debug UARTWenyou Yang2017-05-091-0/+13
| | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9260ek: Clean up codeWenyou Yang2017-05-091-74/+0
| | | | | | | | | Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* configs: at91sam9260ek/9g20ek: Update for DT and DMWenyou Yang2017-05-091-1/+1
| | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9m10g45ek: Enable early debug UARTWenyou Yang2017-05-091-0/+13
| | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9m10g45ek: Clean up codeWenyou Yang2017-05-091-102/+0
| | | | | | | | | Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* configs: at91sam9m10g45ek: Update to support DM/DTWenyou Yang2017-05-091-1/+1
| | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9n12ek: Enable early debug UARTWenyou Yang2017-05-091-0/+13
| | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9n12ek: Clean up codeWenyou Yang2017-05-091-53/+0
| | | | | | | | Since the introduction of the pinctrl and clk driver and the device tree files, remove unneeded related code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* configs: at91sam9n12ek: Update for DT and DM supportWenyou Yang2017-05-091-0/+2
| | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9x5ek: Enable early debug UARTWenyou Yang2017-05-091-1/+13
| | | | | | | | Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9x5ek: Clean up codeWenyou Yang2017-05-091-78/+0
| | | | | | | | | Since the introduction of the pinctrl and clock driver and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* configs: at91sam9x5ek: Update to support DM/DTWenyou Yang2017-05-091-0/+2
| | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: sama5d4ek: fix DD2 configurationWenyou Yang2017-05-091-1/+15
| | | | | | Fix the DDR2 configuration to make SPL work. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* board: sama5d2_xplained: remove unnecessary header filesWenyou Yang2017-05-091-2/+0
| | | | | | Remove the unnecessary header files. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* board: sama5d2_xplained: remove uart1 initWenyou Yang2017-05-091-3/+1
| | | | | | | | Due to the pin configuration and clock enabling is handling by the driver, remove the unneeded hardcode uart1 init during board_early_init_f stage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* board: sama5d2_xplained: clean up macb init codeWenyou Yang2017-05-091-43/+0
| | | | | | | | | | Because the MACB driver supports the driver model and device tree, the pins configuration and clock enabling are handled by the pinctrl driver and clock driver, remove this hardcoded init code. The USB Ether init code is removed as well. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* p1_p2_rdb: Fix unused variable warningTom Rini2017-05-091-5/+0
| | | | | | | | | With gcc-6 we see a warning that sysclk_tbl is defined but unused, so remove it. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-05-083-874/+107
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| * sunxi: add support for Banana Pi M2 Plus boardIcenowy Zheng2017-05-041-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has already mainline device tree file that have landed into U-Boot source tree. Add a defconfig file for it and add the MAINTAINERS items. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: sunxi: move board/sunxi/Kconfig to arch/arm/mach-sunxi/KconfigMasahiro Yamada2017-05-021-792/+0
| | | | | | | | | | | | | | For the consistent location of SoC-level Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: video: Add A64/H3/H5 HDMI driverJernej Skrabec2017-04-281-0/+10
| | | | | | | | | | | | | | | | | | This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Enable DM_I2C for A64/H3/H5Jernej Skrabec2017-04-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This commits enable DM I2C support for A64/H3/H5 SoCs. It is not enabled globaly for all sunxi SoCs, because some boards use PMICs which are connected through I2C. In order to keep same functionality, PMIC drivers needs to be ported to DM too. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: i2c: Add support for DM I2CJernej Skrabec2017-04-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Move function for later convenienceJernej Skrabec2017-04-281-94/+94
| | | | | | | | | | | | | | | | | | | | | | | | This commit only moves i2c_init_board() function almost to the top and doesn't have any functional changes. This is needed for a temporary workaround in next commit when support for DM I2C will be introduced. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: keystone2: Add support for getting external clock dynamicallyLokesh Vutla2017-05-084-22/+110
| | | | | | | | | | | | | | | | | | | | One some keystone2 platforms like K2G ICE, there is an option to switch between 24MHz or 25MHz as sysclk. But the existing driver assumes it is always 24MHz. Add support for getting all reference clocks dynamically by reading boot pins. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: k2g: Add support for dynamic programming of PLL based on SYSCLKLokesh Vutla2017-05-081-21/+95
| | | | | | | | | | | | | | | | | | | | K2G supports various sysclk frequencies which can be determined using sysboot pins. PLLs should be configured based on this sysclock frequency. Add PLL configurations for all supported sysclk frequencies. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: Define Kconfig symbol for common cmd optionsLokesh Vutla2017-05-081-0/+26
| | | | | | | | | | | | | | | | | | | | | | Instead of defining command options in every defconfig, define a common Kconfig symbol that consolidates all command options that are supported by any TI platform. Also use imply keyword so that that specific option can be disabled if not required. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | igep003x: Add support for IGEP SMARC AM335xPau Pajuelo2017-05-082-16/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IGEP SMARC AM335x is an industrial processor module with following highlights: o AM3352 TI processor (Up to AM3359) o Cortex-A8 ARM CPU o SMARC form factor module o Up to 512 MB DDR3 SDRAM / 512 MB FLASH o WiFi a/b/g/n and Bluetooth v4.0 on-board o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | igep003x: UBIizeLadislav Michl2017-05-081-0/+17
| | | | | | | | | | | | | | | | | | | | Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher<hs@denx.de> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | igep0033: Rename to igep003xLadislav Michl2017-05-086-6/+6
| | | | | | | | | | | | | | | | Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034) can use the same source files. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha2017-05-081-12/+30
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f746: to switch on user LED1 & read user buttonVikas Manocha2017-05-081-0/+37
| | | | | | | | | | | | | | | | All discovery boards have one user button & one user LED. Here we are just reading the button status & switching ON the user LED. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha2017-05-081-67/+3
| | | | | | | | | | | | | | | | | | | | | | | | With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | stm32f7: use clock driver to enable sdram controller clockVikas Manocha2017-05-081-2/+0
| | | | | | | | | | | | | | | | This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: use driver model for sdram initializationVikas Manocha2017-05-081-70/+19
| | | | | | | | | | | | | | | | As driver model takes care of pin control configuraion, this patch also removes the sdram/fmc pin configuration. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: sdram: move sdram driver code to ram drivers areaVikas Manocha2017-05-081-112/+1
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocksUri Mashiach2017-05-081-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Modifications: * Enable USB clocks in the OMAP version of the function board_usb_init. * Disable USB clocks in the OMAP version of the function board_usb_cleanup. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | usb: host: xhci-omap: fix double weak board_usb_init functionsUri Mashiach2017-05-084-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A weak version of the function board_usb_init is implemented in: common/usb.c drivers/usb/host/xhci-omap.c To fix the double implementations: * Convert the board_usb_init function in drivers/usb/host/xhci-omap.c normal (not weak). * The function board_usb_init in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_init. * Rename board version of the function board_usb_init to omap_xhci_board_usb_init. Done only for boards that defines CONFIG_USB_XHCI_OMAP. To achieve the same flexibility with the function board_usb_cleanup: * Add a normal (not weak) implementation of the function board_usb_cleanup in drivers/usb/host/xhci-omap.c * The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_cleanup. * Rename board version of the function board_usb_cleanup to omap_xhci_board_usb_cleanup. Done only for boards that defines CONFIG_USB_XHCI_OMAP. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@ti.com>
* | board/BuR/common: incorrect check of dtbxypron.glpk@gmx.de2017-05-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The logical expression to check the dtb is incorrect in load_devicetree. The problem was indicated by cppcheck. The inconsistent variable name dtppart is changed to dtbpart. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* | odroid-c2: README: MMC is supportedxypron.glpk@gmx.de2017-05-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Mention eMMC and microSD as supported devices. They have been enabled with patch d0c5c8d529f16fa88ab52a3b5dd2d4fc03664f19 odroid-c2: enable new Meson GX MMC driver in board defconfig which was accepted for u-boot-mmc.git. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | warp7: MAINTAINERS: Add warp7_secure_defconfig entryFabio Estevam2017-05-011-0/+1
| | | | | | | | | | | | | | | | Add warp7_secure_defconfig entry to avoid the following warning: WARNING: no maintainers for 'warp7_secure' Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | Convert CONFIG_CMD_BLOB to KconfigSimon Glass2017-04-301-0/+1
| | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_CMD_BLOB Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add imply CMD_BLOB under CHAIN_OF_TRUST] Signed-off-by: Tom Rini <trini@konsulko.com>
* | Convert CONFIG_CMD_BAT to KconfigSimon Glass2017-04-301-0/+3
| | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_CMD_BAT Signed-off-by: Simon Glass <sjg@chromium.org>
* | power: Drop CONFIG_I2C_PMICSimon Glass2017-04-301-3/+4
| | | | | | | | | | | | | | | | This is only used by one board and should not be a CONFIG option. Instead it should use the driver model pmic framework. For now, just move the setting into the only board that uses it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | board: dra71: Fix selection of OPPsLokesh Vutla2017-04-271-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3, DRA71 supports the following OPPs for various voltage domains: VDD_MPU: OPP_NOM VDD_CORE: OPP_NOM VDD_GPU: OPP_NOM VDD_DSPEVE: OPP_NOM, OPP_HIGH VDD_IVA: OPP_NOM, OPP_HIGH This patch add support for selection of the above OPPs instead of using OPP_NOM for all voltage domains. [1] http://www.ti.com/lit/ds/symlink/dra718.pdf Reported-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-04-253-18/+118
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| * sunxi: add support for Lichee Pi ZeroIcenowy Zheng2017-04-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: add basic V3s supportIcenowy Zheng2017-04-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Add clock support for DE2/HDMI/TCON on newer SoCsJernej Skrabec2017-04-201-0/+6
| | | | | | | | | | | | | | | | This is needed for HDMI, which will be added later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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