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path: root/drivers/clk/renesas
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* Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodian...Tom Rini2020-07-272-2/+2
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| * treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada2020-07-252-2/+2
* | clk: renesas: Add R8A774A1 clock tablesAdam Ford2020-07-254-0/+349
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* Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2020-07-242-2/+2
* treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada2020-07-202-2/+2
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-1814-0/+14
* common: Drop log.h from common headerSimon Glass2020-05-183-0/+3
* clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2Marek Vasut2020-03-301-1/+2
* clk: renesas: Add R8A77980 V3H clock tablesMarek Vasut2019-08-093-0/+262
* clk: renesas: Synchronize Gen3 tables with Linux 5.0Marek Vasut2019-04-098-130/+215
* clk: renesas: Synchronize Gen2 tables with Linux 5.0Marek Vasut2019-04-094-16/+14
* clk: renesas: Add R8A77965 clock tablesMarek Vasut2019-04-094-19/+346
* clk: renesas: Add support for setting MMCIF clock divider on Gen2Marek Vasut2019-03-251-0/+42
* clk: renesas: Fix swapped div and mul in debug output on Gen2Marek Vasut2019-03-251-1/+1
* clk: renesas: Fix SDH clock divider decoding on Gen2Marek Vasut2019-03-251-5/+9
* clk: rmobile: Drop def_bool per SoCMarek Vasut2019-02-251-10/+0
* clk: renesas: Allow reconfiguring SDHI clock on Gen3Marek Vasut2018-12-031-7/+3
* clk: rmobile: Add R8A77995 RPC clockMarek Vasut2018-06-141-0/+5
* clk: rmobile: Add R8A77990 RPC clockMarek Vasut2018-06-141-0/+5
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2018-06-025-32/+386
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| * clk: renesas: Add R8A77990 E3 clock tablesMarek Vasut2018-06-013-0/+311
| * clk: renesas: Add PE clock handlingMarek Vasut2018-06-012-6/+40
| * clk: renesas: Add PLL1 and PLL3 dividersMarek Vasut2018-06-011-4/+8
| * clk: renesas: Pass clock rate around as 64bit number internallyMarek Vasut2018-06-011-25/+31
| * clk: renesas: Fix swapped arguments in debug messageMarek Vasut2018-06-011-1/+1
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* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-079-18/+9
* clk: renesas: Drop USB extal from the R8A7792 clock driverMarek Vasut2018-05-021-2/+0
* clk: renesas: Minor clean up of the R8A7794 clock driverMarek Vasut2018-04-211-7/+3
* clk: renesas: Minor clean up of the R8A7792 clock driverMarek Vasut2018-04-211-7/+3
* clk: renesas: Minor clean up of the R8A7790 clock driverMarek Vasut2018-04-131-7/+3
* clk: renesas: Add R8A77965 M3N entriesMarek Vasut2018-03-051-0/+19
* clk: rmobile: Assure SD-IF clock are configured correctlyMarek Vasut2018-02-161-0/+2
* Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2018-01-2716-1104/+3094
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| * clk: renesas: Import R8A7794 E2 clock tablesMarek Vasut2018-01-243-0/+284
| * clk: renesas: Import R8A7792 V2H clock tablesMarek Vasut2018-01-243-0/+257
| * clk: renesas: Import R8A7791/R8A7793 M2 clock tablesMarek Vasut2018-01-243-0/+308
| * clk: renesas: Import R8A7790 H2 clock tablesMarek Vasut2018-01-243-0/+303
| * clk: renesas: Add Gen2 clock coreMarek Vasut2018-01-245-0/+339
| * clk: renesas: Add DIV6P1 clock typeMarek Vasut2018-01-241-0/+6
| * clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut2018-01-244-167/+203
| * clk: renesas: Make clock tables Kconfig configurableMarek Vasut2018-01-242-5/+33
| * clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-246-30/+57
| * clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-246-41/+64
| * clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-246-51/+178
| * clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-246-40/+143
| * clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-247-903/+1052
* | wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas2018-01-241-2/+2
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* clk: rmobile: Add R8A77995 D3 clock tablesMarek Vasut2017-12-091-3/+164
* clk: rmobile: Add R8A77970 V3M clock tablesMarek Vasut2017-12-092-4/+121
* clk: rmobile: Fix typo in R8A7796 RPC clock table entryMarek Vasut2017-12-091-1/+1
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