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path: root/drivers/clk
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* dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-133-59/+59
* dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-1318-44/+44
* dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-139-33/+33
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-1310-19/+19
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1378-121/+121
* dm: Remove uses of device_bind_offset()Simon Glass2020-12-132-13/+9
* dm: core: Rename device_bind() to device_bind_offset()Simon Glass2020-12-131-1/+1
* clk: sunxi: add compatible string for V3Icenowy Zheng2020-11-171-0/+2
* rockchip: rk3399: Init clocks in U-Boot proper if SPL was not runAlper Nebi Yasak2020-11-131-6/+16
* Merge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodi...WIP/30Oct2020Tom Rini2020-10-301-0/+20
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| * clk: rockchip: rk3399: implement getting wdt/alive clocksJack Mitchell2020-10-301-0/+20
* | dm: Use driver_info index instead of pointerSimon Glass2020-10-291-2/+1
* | dm: test: Add a test for of-platdata phandlesSimon Glass2020-10-292-4/+4
* | clk: kendryte: no need to check argument of free()Heinrich Schuchardt2020-10-261-2/+1
* | clk: ccf: replace the get_rate helperDario Binacchi2020-10-221-25/+1
* | clk: renesas: Import R8A774C0 clock tables from Linux 5.9Lad Prabhakar2020-10-203-0/+315
* | clk: renesas: Add R8A774E1 clock tablesBiju Das2020-10-203-0/+365
* | clk: renesas: Add R8A774B1 clock tablesBiju Das2020-10-203-0/+343
* | clk: renesas: r8a774a1-cpg-mssr: Add R8A774A1 RPC clockBiju Das2020-10-201-0/+4
* | clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristicsEugen Hristev2020-10-191-2/+2
* | clk: at91: clk-master: add 5th divisor for mck masterEugen Hristev2020-10-192-2/+2
* | clk: at91: sam9x60: add support compatible with CCFClaudiu Beznea2020-10-192-0/+650
* | clk: at91: Include device_compat.h in compat.cTom Rini2020-10-161-0/+1
* | clk: sifive: Include device_compat.hSean Anderson2020-10-151-7/+7
* | treewide: Fix wrong CONFIG_IS_ENABLED() handlingAlper Nebi Yasak2020-10-141-1/+1
* | clk: agilex: Additional membus writes for HPS PLLChee Hong Ang2020-10-091-16/+78
* | clk: agilex: Handle clock configuration differently in SPL and U-Boot properChee Hong Ang2020-10-091-0/+10
* | clk: agilex: Add clock enable supportLey Foon Tan2020-10-091-0/+6
* | clk: agilex: Add NAND clock supportLey Foon Tan2020-10-091-0/+3
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* dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay2020-10-061-2/+2
* Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodian...WIP/05Oct2020-nextTom Rini2020-10-0523-925/+4890
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| * clk: at91: sama7g5: add clock supportClaudiu Beznea2020-09-222-0/+1402
| * clk: at91: pmc: add generic clock opsClaudiu Beznea2020-09-222-0/+73
| * clk: at91: clk-generic: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+209
| * clk: at91: clk-peripheral: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+272
| * clk: at91: clk-system: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+116
| * clk: at91: clk-programmable: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+226
| * clk: at91: clk-utmi: add support for sama7g5Claudiu Beznea2020-09-222-1/+73
| * clk: at91: clk-utmi: add driver compatible with ccfClaudiu Beznea2020-09-223-0/+169
| * clk: at91: clk-master: add support for sama7g5Claudiu Beznea2020-09-222-1/+182
| * clk: at91: clk-master: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+178
| * clk: at91: sam9x60-pll: add driver compatible with ccfClaudiu Beznea2020-09-224-0/+486
| * clk: at91: clk-main: add driver compatible with ccfClaudiu Beznea2020-09-223-1/+398
| * clk: at91: sckc: add driver compatible with ccfClaudiu Beznea2020-09-222-1/+173
| * clk: at91: move clock code to compat.cClaudiu Beznea2020-09-2216-1163/+1030
| * clk: at91: pmc: add helpers for clock driversClaudiu Beznea2020-09-222-0/+104
| * clk: get clock pointer before proceedingClaudiu Beznea2020-09-221-4/+33
| * clk: do not disable clock if it is criticalClaudiu Beznea2020-09-221-0/+3
| * clk: bind clk to new parent deviceClaudiu Beznea2020-09-221-1/+10
| * clk: check hw and hw->dev before dereference itClaudiu Beznea2020-09-221-0/+3