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* board: stm32: switch to DM STM32 timerPatrice Chotard2018-03-131-15/+0
* clk: clk_stm32h7: Fix prescaler for Domain 3Patrice Chotard2018-03-131-3/+4
* clk: clk_stm32h7: Fix stm32_clk_get_rate() for timerPatrice Chotard2018-03-131-12/+90
* clk: clk_stm32f: Fix stm32_clk_get_rate() for timerPatrice Chotard2018-03-131-17/+99
* rockchip: clk: rk1108: convert to use live dtKever Yang2018-03-131-1/+1
* rockchip: clk: rk3328: convert to use live dtKever Yang2018-03-131-1/+1
* rockchip: clk: rk3288: convert to use live dtKever Yang2018-03-131-1/+1
* rockchip: clk: rk322x: convert to use live dtKever Yang2018-03-131-1/+1
* rockchip: clk: rk3188: convert to use live dtKever Yang2018-03-131-1/+1
* rockchip: clk: rk3036: convert to use live dtKever Yang2018-03-131-1/+1
* clk: renesas: Add R8A77965 M3N entriesMarek Vasut2018-03-051-0/+19
* rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLLPhilipp Tomsich2018-02-241-0/+9
* rockchip: clk: rk3368: handle clk_enable requests for GMACPhilipp Tomsich2018-02-241-0/+19
* rockchip: clk: rk3399: handle clk_enable requests for GMACPhilipp Tomsich2018-02-241-0/+10
* clk: rmobile: Assure SD-IF clock are configured correctlyMarek Vasut2018-02-161-0/+2
* clk: clk_stm32: Add .set_rate callbackPatrice Chotard2018-01-291-0/+6
* Merge git://git.denx.de/u-boot-rockchipTom Rini2018-01-286-19/+701
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| * rockchip: clk: guard set_parent implementations against OF_PLATDATAPhilipp Tomsich2018-01-283-6/+12
| * clk: rockchip: clk_rk3368: Implement "assign-clock-parent"David Wu2018-01-281-7/+84
| * clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-...David Wu2018-01-281-8/+98
| * clk: rockchip: Add rk322x gamc clock supportDavid Wu2018-01-281-0/+107
| * clk: rockchip: Add rk3328 gamc clock supportDavid Wu2018-01-281-0/+178
| * rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-nodePhilipp Tomsich2018-01-281-0/+18
| * clk: implement clk_set_defaults()Philipp Tomsich2018-01-281-0/+118
| * rockchip: clk: rk3399: implement set_parent() operationPhilipp Tomsich2018-01-281-2/+72
| * clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()Philipp Tomsich2018-01-281-2/+8
| * clk: add clk_set_parent()Philipp Tomsich2018-01-281-0/+12
* | clk: clk_stm32f: Fix PLLSAICFGR_PLLSAIP_4 divider valuePatrice Chotard2018-01-281-1/+1
* | clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()Patrice Chotard2018-01-281-6/+6
* | clk: clk_stm32f: Remove STMMAC clock setupPatrice Chotard2018-01-281-6/+0
* | clk: stm32: retrieve external oscillator frequency from DTPatrice Chotard2018-01-281-21/+57
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* Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2018-01-2716-1104/+3094
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| * clk: renesas: Import R8A7794 E2 clock tablesMarek Vasut2018-01-243-0/+284
| * clk: renesas: Import R8A7792 V2H clock tablesMarek Vasut2018-01-243-0/+257
| * clk: renesas: Import R8A7791/R8A7793 M2 clock tablesMarek Vasut2018-01-243-0/+308
| * clk: renesas: Import R8A7790 H2 clock tablesMarek Vasut2018-01-243-0/+303
| * clk: renesas: Add Gen2 clock coreMarek Vasut2018-01-245-0/+339
| * clk: renesas: Add DIV6P1 clock typeMarek Vasut2018-01-241-0/+6
| * clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut2018-01-244-167/+203
| * clk: renesas: Make clock tables Kconfig configurableMarek Vasut2018-01-242-5/+33
| * clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-246-30/+57
| * clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut2018-01-246-41/+64
| * clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-246-51/+178
| * clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-246-40/+143
| * clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-247-903/+1052
* | Merge git://git.denx.de/u-boot-spiTom Rini2018-01-262-8/+8
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| * wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas2018-01-242-8/+8
* | clk: Makefile: Sort entries alphabeticallyMario Six2018-01-211-10/+10
* | clk: Remove superfluous gd declarationsMario Six2018-01-212-4/+0
* | clk: clk_fixed_rate: Fix style violationMario Six2018-01-211-2/+2
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