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* clk: sunxi: Implement SPI clocks, resetsJagan Teki2019-03-0411-0/+97
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-02-281-10/+0
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| * clk: rmobile: Drop def_bool per SoCMarek Vasut2019-02-251-10/+0
* | clk: Add fixed-factor clock driverAnup Patel2019-02-272-1/+77
* | clk: Add SiFive FU540 PRCI clock driverAnup Patel2019-02-277-0/+1121
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* clk: stm32mp1: correctly handle Clock Spreading GeneratorPatrick Delaunay2019-02-091-1/+7
* clk: stm32mp1: add debug informationPatrick Delaunay2019-02-091-4/+79
* clk: stm32mp1: recalculate counter when switching freqPatrick Delaunay2019-02-091-2/+7
* clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRRPatrick Delaunay2019-02-091-8/+5
* clk: stm32mp1: add IPCC clockPatrick Delaunay2019-02-091-0/+1
* clk: stm32mp1: no more get ck_usbo_48m in device treePatrick Delaunay2019-02-091-3/+3
* rockchip: clk: Add mention of four new clocksSimon Glass2019-02-011-0/+12
* clk: Improve debug message in clk_set_default_rates()Simon Glass2019-02-011-2/+2
* rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass2019-02-011-0/+48
* sunxi: clk: enable clk and reset for CCU devicesAndre Przywara2019-01-301-0/+12
* sunxi: clk: A80: add MMC clock supportAndre Przywara2019-01-291-1/+27
* sunxi: clk: add MMC gates/resetsAndre Przywara2019-01-2911-0/+63
* clk: sunxi: Add Allwinner A80 CLK driverJagan Teki2019-01-183-0/+65
* clk: sunxi: Add Allwinner H6 CLK driverJagan Teki2019-01-183-0/+61
* clk: sunxi: Implement UART resetsJagan Teki2019-01-187-0/+43
* clk: sunxi: Implement UART clocksJagan Teki2019-01-189-0/+57
* clk: sunxi: Add Allwinner V3S CLK driverJagan Teki2019-01-183-0/+59
* clk: sunxi: Add Allwinner R40 CLK driverJagan Teki2019-01-183-0/+78
* clk: sunxi: Add Allwinner A83T CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A31 CLK driverJagan Teki2019-01-183-0/+76
* clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki2019-01-183-0/+64
* clk: sunxi: Add Allwinner A10/A20 CLK driverJagan Teki2019-01-183-0/+67
* clk: sunxi: Add Allwinner H3/H5 CLK driverJagan Teki2019-01-183-0/+87
* reset: Add Allwinner RESET driverJagan Teki2019-01-182-0/+21
* clk: Add Allwinner A64 CLK driverJagan Teki2019-01-186-0/+149
* clk: MediaTek: bind ethsys reset controllerWeijie Gao2019-01-143-0/+32
* clk: imx8: fix build warningPeng Fan2019-01-091-0/+2
* clk: uniphier: add NAND 200MHz clockMasahiro Yamada2018-12-291-3/+5
* clk: stm32: add hardware spinlock clockBenjamin Gaignard2018-12-061-0/+3
* clk: Allow clock defaults to be set during re-reloc state for SPL onlyPhilipp Tomsich2018-12-061-0/+4
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2018-12-031-7/+3
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| * clk: renesas: Allow reconfiguring SDHI clock on Gen3Marek Vasut2018-12-031-7/+3
* | ARM: meson: Add regmap support for clock driverLoic Devulder2018-12-031-29/+30
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* rockchip: rk3399: Initialize CPU B clock.Christoph Muellner2018-11-301-9/+70
* ARM: rockchip: rv1108: Sync clock with vendor treeOtavio Salvador2018-11-301-6/+469
* Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogicTom Rini2018-11-293-4/+320
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| * clk: Add clock driver for AXGNeil Armstrong2018-11-262-1/+317
| * ARM: meson: rework soc arch file to prepare for new SoCJerome Brunet2018-11-261-1/+1
| * clk: meson: silence debug printJerome Brunet2018-11-261-1/+1
| * clk: meson: add static to meson_gates tableNeil Armstrong2018-11-261-1/+1
* | clk: MediaTek: add clock driver for MT7623 SoC.Ryder Lee2018-11-282-0/+871
* | clk: MediaTek: add clock driver for MT7629 SoC.Ryder Lee2018-11-285-0/+1403
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* misc: Update read() and write() methods to return bytes xferedSimon Glass2018-11-201-2/+2
* clk: meson: fix clk81 divider calculationJerome Brunet2018-11-201-1/+2
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