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* Merge tag 'u-boot-imx-20210717' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini2021-07-171-1/+22
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| * clk: imx8mm: Add SPI clocksFrieder Schrempf2021-07-101-1/+22
* | Merge branch '2021-07-15-assorted-fixes'Tom Rini2021-07-161-1/+5
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| * | clk: Detect failure to set defaultsSimon Glass2021-07-151-1/+5
* | | clk: stm32mp1: add support of SYSCFG clockPatrick Delaunay2021-07-161-0/+1
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* | clk: uniphier: Add PCIe clock entryKunihiko Hayashi2021-07-141-0/+3
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* clk: armada-37xx: Set DM_FLAG_PRE_RELOCMarek BehĂșn2021-07-082-0/+2
* Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini2021-07-071-0/+2
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| * dm: define LOG_CATEGORY for all uclassPatrick Delaunay2021-07-061-0/+2
* | drivers: clk: sifive: fu740-prci: replace 'pciaux' with 'pcieaux'Green Wan2021-07-061-3/+3
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* Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u...Tom Rini2021-07-013-0/+198
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| * clk: zynq: Add clock wizard driverZhengxun2021-06-233-0/+198
* | Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh int...Tom Rini2021-06-287-0/+371
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| * | clk: renesas: Add R8A779A0 clock tablesHai Pham2021-06-247-0/+338
| * | clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock codeMarek Vasut2021-06-242-0/+33
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* | Merge tag 'v2021.07-rc5' into nextTom Rini2021-06-281-2/+6
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| * clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3Giulio Benetti2021-06-091-0/+2
| * clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APBGiulio Benetti2021-06-091-2/+4
* | Merge tag 'u-boot-rockchip-20210618' of https://source.denx.de/u-boot/custodi...Tom Rini2021-06-192-0/+2960
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| * | rockchip: rk3568: add clock driverElaine Zhang2021-06-182-0/+2960
* | | clk: cosmetic change in uclassPatrick Delaunay2021-06-181-1/+1
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* | clk: k210: Move k210 clock out of its own subdirectorySean Anderson2021-06-175-15/+14
* | clk: k210: Remove bypass driverSean Anderson2021-06-172-274/+1
* | clk: k210: Don't set PLL rates if we are already at the correct rateSean Anderson2021-06-171-7/+8
* | clk: k210: Re-add support for setting rateSean Anderson2021-06-171-5/+84
* | clk: k210: Implement soc_clk_dumpSean Anderson2021-06-171-2/+66
* | clk: k210: Move pll into the rest of the driverSean Anderson2021-06-173-594/+601
* | clk: k210: Rewrite to remove CCFSean Anderson2021-06-173-523/+439
* | clk: Allow force setting clock defaults before relocationSean Anderson2021-06-172-11/+18
* | clk: add support for TI K3 SoC clocksTero Kristo2021-06-113-0/+387
* | clk: add support for TI K3 SoC PLLTero Kristo2021-06-113-0/+296
* | clk: fix set_rate to clean up cached rates for the hierarchyTero Kristo2021-06-111-0/+19
* | clk: fix assigned-clocks to pass with deferring providerTero Kristo2021-06-111-0/+18
* | clk: sci-clk: fix return value of set_rateTero Kristo2021-06-111-2/+4
* | clk: do not attempt to fetch clock pointer with null deviceTero Kristo2021-06-111-0/+2
* | clk: fixed_rate: add API for directly registering fixed rate clocksTero Kristo2021-06-111-0/+45
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* drivers: clk: add fu740 supportGreen Wan2021-05-318-753/+1286
* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek BehĂșn2021-05-241-2/+2
* clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut2021-05-211-43/+43
* clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham2021-05-213-45/+65
* clk: renesas: Introduce enum clk_reg_layoutHai Pham2021-05-211-0/+6
* clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham2021-05-214-6/+8
* clk: renesas: Make reset controller modemr register offset configurableMarek Vasut2021-05-2120-5/+21
* clk: renesas: Add support for RPCD2 clockHai Pham2021-05-212-5/+17
* clk: renesas: Fix Realtime Module Stop Control Register offsetsHai Pham2021-05-211-1/+1
* clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham2021-05-211-1/+1
* clk: renesas: Reinstate RPC clock on R-Car D3/E3Marek Vasut2021-05-212-0/+18
* clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut2021-05-217-163/+212
* clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12Marek Vasut2021-05-215-9/+6
* clk: renesas: Synchronize RZ/G2 tables with Linux 5.12Marek Vasut2021-05-213-5/+26