| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | driver/ddr/fsl: Fix timing_cfg_2 | York Sun | 2016-08-02 | 1 | -1/+1 |
| * | Various, unrelated tree-wide typo fixes. | Robert P. J. Day | 2016-07-16 | 1 | -1/+1 |
| * | driver/ddr/fsl: Check condition for erratum A-009803 | Shengzhou Liu | 2016-06-03 | 1 | -19/+23 |
| * | drivers/ddr/fsl: Disabling data init if ECC is not enabled | York Sun | 2016-06-03 | 1 | -1/+2 |
| * | drivers/ddr/fsl: Fix timing_cfg_2 register | York Sun | 2016-06-03 | 1 | -1/+1 |
| * | drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl | Shengzhou Liu | 2016-06-03 | 1 | -2/+9 |
| * | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq | Tom Rini | 2016-05-24 | 1 | -4/+23 |
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| | * | driver/ddr/fsl: Add workaround for erratum A-010165 | Shengzhou Liu | 2016-05-18 | 1 | -1/+9 |
| | * | driver/ddr/fsl: Add workaround for erratum A-009801 | Shengzhou Liu | 2016-05-17 | 1 | -0/+7 |
| | * | drivers/ddr/fsl: update workaround for erratum A-008511 | Shengzhou Liu | 2016-05-17 | 1 | -3/+7 |
| * | | arm: mvebu: a38x: Weed out floating point use | Marek Vasut | 2016-05-20 | 1 | -19/+10 |
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| * | Fix spelling of "occurred". | Vagrant Cascadian | 2016-05-02 | 2 | -2/+2 |
| * | ddr: altera: Repair DQ window centering code | Marek Vasut | 2016-04-20 | 1 | -8/+7 |
| * | ddr: altera: Staticize global variables | Marek Vasut | 2016-04-20 | 1 | -4/+4 |
| * | ddr: altera: Make DLEVEL behavior inclusive | Marek Vasut | 2016-04-20 | 1 | -66/+66 |
| * | ddr: altera: Zero DM IN delay in scc_mgr_zero_group() | Marek Vasut | 2016-04-20 | 1 | -3/+13 |
| * | ddr: altera: Remove unnecessary ODT mode config | Marek Vasut | 2016-04-20 | 1 | -1/+0 |
| * | ddr: altera: Remove unnecessary update of the SCC | Marek Vasut | 2016-04-20 | 1 | -1/+0 |
| * | ddr: altera: Fix DRAM end value in protection rule | Marek Vasut | 2016-04-20 | 1 | -1/+1 |
| * | ddr: altera: Fix scc_mgr_set() argument order | Marek Vasut | 2016-04-20 | 1 | -1/+1 |
| * | ddr: altera: Tweak DQS tracking enable handling | Marek Vasut | 2016-04-20 | 1 | -2/+5 |
| * | ddr: altera: Replace ad-hoc constant with macro | Marek Vasut | 2016-04-20 | 1 | -2/+2 |
| * | Fix typo choosen in comments and printf logs | Alexander Merkle | 2016-03-27 | 1 | -2/+2 |
| * | arm: mvebu: Fix ddr3_init() cpu config | Dirk Eibach | 2016-03-24 | 1 | -2/+0 |
| * | driver/ddr/fsl: Add workaround for erratum A-009803 | Shengzhou Liu | 2016-03-21 | 1 | -5/+39 |
| * | driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete | Shengzhou Liu | 2016-03-21 | 2 | -7/+63 |
| * | Use correct spelling of "U-Boot" | Bin Meng | 2016-02-06 | 1 | -1/+1 |
| * | drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. | Purna Chandra Mandal | 2016-02-01 | 4 | -0/+497 |
| * | drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers | Ed Swarthout | 2016-01-25 | 1 | -0/+1 |
| * | driver/ddr/fsl: Add workaround for A009663 | Shengzhou Liu | 2016-01-25 | 1 | -0/+10 |
| * | fsl/ddr: Add workaround for ERRATUM_A009942 | Shengzhou Liu | 2016-01-25 | 1 | -0/+18 |
| * | Add more SPDX-License-Identifier tags | Tom Rini | 2016-01-19 | 10 | -30/+10 |
| * | ddr: altera: Init the rule ID in debug code | Marek Vasut | 2016-01-16 | 1 | -0/+1 |
| * | mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT | Phil Sutter | 2016-01-14 | 2 | -11/+11 |
| * | axp: Fix debugging support in DDR3 write leveling | Phil Sutter | 2016-01-14 | 1 | -2/+2 |
| * | arm: mvebu: Make ECC support configurable on Armada XP | Stefan Roese | 2016-01-14 | 2 | -0/+8 |
| * | arm: mvebu: ddr: Fix compilation warning | Stefan Roese | 2016-01-14 | 2 | -17/+0 |
| * | move erratum a008336 and a008514 to soc specific file | Yao Yuan | 2015-12-15 | 1 | -34/+0 |
| * | fsl/ddr: updated ddr errata-A008378 for arm and power SoCs | Shengzhou Liu | 2015-12-13 | 1 | -3/+6 |
| * | driver/ddr/fsl: Update timing config for heavy load | York Sun | 2015-12-13 | 1 | -2/+24 |
| * | driver/ddr/fsl: Update workaround for A008511 for vref range | York Sun | 2015-12-13 | 1 | -7/+15 |
| * | driver/ddr/fsl: Update MR5 RTT park | York Sun | 2015-12-13 | 1 | -4/+15 |
| * | driver/ddr/fsl: Update DDR4 MR6 for Vref range | York Sun | 2015-12-13 | 1 | -0/+3 |
| * | driver/ddr/fsl: Update DDR4 RTT values | York Sun | 2015-12-13 | 1 | -2/+235 |
| * | drivers/ddr/fsl: Fix typo in BIST test for DDR4 | York Sun | 2015-11-30 | 1 | -12/+12 |
| * | drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 | York Sun | 2015-11-30 | 2 | -0/+41 |
| * | armv8: ls2085a: Add support of LS2085A SoC | Prabhakar Kushwaha | 2015-11-30 | 1 | -2/+2 |
| * | armv8: LS2080A: Rename LS2085A to reflect LS2080A | Prabhakar Kushwaha | 2015-11-30 | 1 | -2/+2 |
| * | arm: mvebu: Fix SAR1_CPU_CORE_MASK | Dirk Eibach | 2015-11-17 | 1 | -5/+2 |
| * | arm: mvebu: a38x: Remove unsupported topologies | Kevin Smith | 2015-11-17 | 2 | -77/+0 |
