| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | fpga: zynqmp: Modify PL bitstream loading sequence | Siva Durga Prasad Paladugu | 2018-09-26 | 1 | -10/+25 |
| * | fpga: Kconfig: Replace spaces with tabs | Michal Simek | 2018-09-11 | 1 | -8/+8 |
| * | drivers: fpga: zynqpl: fix compilation with SPL | Luis Araneda | 2018-07-19 | 1 | -2/+2 |
| * | xilinx: zynq: Add support to secure images | Siva Durga Prasad Paladugu | 2018-07-19 | 1 | -0/+45 |
| * | fpga: zynqmp: Add secure bitstream loading for ZynqMP | Siva Durga Prasad Paladugu | 2018-06-01 | 2 | -0/+66 |
| * | cmd: fpga: Add support to load secure bitstreams | Siva Durga Prasad Paladugu | 2018-06-01 | 1 | -0/+29 |
| * | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini | 2018-05-07 | 18 | -36/+18 |
| * | Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR | Tom Rini | 2018-04-27 | 3 | -6/+0 |
| * | arm: socfpga: Fix with the correct polling on bit is set | Tien Fong Chee | 2018-04-27 | 1 | -5/+5 |
| * | fpga: zynq: Add delay after PCFG_PROG_B change | Siva Durga Prasad Paladugu | 2018-04-09 | 1 | -0/+16 |
| * | fpga: zynqmp: Fix the nonsecure bitstream loading issue | Siva Durga Prasad Paladugu | 2018-04-09 | 1 | -2/+6 |
| * | fpga: zynqmp: Update zynqmp_load() as per latest xilfpga | Siva Durga Prasad Paladugu | 2018-04-09 | 1 | -5/+1 |
| * | fpga: zynqmp: Add support to get the PCAP status for fpga info command | Nitin Jain | 2018-04-09 | 1 | -0/+14 |
| * | fpga: Simplify error path in fpga_add | Michal Simek | 2018-03-23 | 1 | -10/+11 |
| * | arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL | Vipul Kumar | 2018-02-28 | 1 | -0/+7 |
| * | fpga: Added Kconfig support for FPGA_SPARTAN3 | Vipul Kumar | 2018-02-28 | 1 | -0/+5 |
| * | wait_bit: use wait_for_bit_le32 and remove wait_for_bit | Álvaro Fernández Rojas | 2018-01-24 | 1 | -10/+7 |
| * | fpga: allow programming fpga from FIT image for all FPGA drivers | Goldschmidt Simon | 2017-12-14 | 2 | -0/+22 |
| * | arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes | Tien Fong Chee | 2017-11-26 | 1 | -6/+8 |
| * | fpga: xilinx: Avoid using local intermediate buffer | Siva Durga Prasad Paladugu | 2017-08-02 | 1 | -16/+10 |
| * | arm: socfpga: Add FPGA driver support for Arria 10 | Tien Fong Chee | 2017-07-26 | 2 | -0/+480 |
| * | kconfig: Convert FPGA_SOCFPGA configuration to Kconfig | Tien Fong Chee | 2017-07-26 | 1 | -0/+8 |
| * | arm: socfpga: Restructure FPGA driver in the preparation to support A10 | Tien Fong Chee | 2017-07-26 | 3 | -233/+255 |
| * | fpga: zynqmppl: Reuse invoke_smc routine | Siva Durga Prasad Paladugu | 2017-06-20 | 1 | -17/+8 |
| * | FPGA: drivers/fpga/ivm_core.c: incorrect printf | xypron.glpk@gmx.de | 2017-04-18 | 1 | -1/+1 |
| * | fpga: zynqmp: Remove empty functions | Michal Simek | 2017-01-10 | 1 | -12/+0 |
| * | arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC | Patrick Bruenn | 2016-12-16 | 1 | -0/+20 |
| * | treewide: replace #include <asm/errno.h> with <linux/errno.h> | Masahiro Yamada | 2016-09-23 | 2 | -2/+2 |
| * | fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP | Siva Durga Prasad Paladugu | 2016-09-22 | 4 | -0/+262 |
| * | fpga: Add Kconfig to fpga subsystem | Michal Simek | 2016-09-22 | 1 | -0/+3 |
| * | Various, unrelated tree-wide typo fixes. | Robert P. J. Day | 2016-07-16 | 1 | -1/+1 |
| * | fpga: Fix typo in function comment | Michal Simek | 2016-05-24 | 1 | -1/+1 |
| * | fpga: altera: Add StratixV support | Stefan Roese | 2016-03-24 | 3 | -0/+107 |
| * | Fix spelling of "transferred". | Vagrant Cascadian | 2016-03-22 | 1 | -1/+1 |
| * | Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals" | Dinh Nguyen | 2016-02-04 | 1 | -1/+1 |
| * | fpga: xilinx: Check for substring in device ID validation | Siva Durga Prasad Paladugu | 2016-01-27 | 1 | -2/+2 |
| * | arm: socfpga: set the fpga global bit to disable HPS to FPGA signals | Dinh Nguyen | 2016-01-16 | 1 | -1/+1 |
| * | Move console definitions into a new console.h file | Simon Glass | 2015-11-19 | 3 | -0/+3 |
| * | arm: socfpga: Fix FPGA bitstream programming routine | Marek Vasut | 2015-08-08 | 1 | -0/+3 |
| * | fpga: xilinx: Show fpga info if defined | Michal Simek | 2015-01-21 | 1 | -4/+5 |
| * | fpga: xilinx: Check if fpga operations are defined | Michal Simek | 2015-01-21 | 1 | -2/+15 |
| * | fpga: Export fpga_get_desc for SPL | Michal Simek | 2015-01-21 | 1 | -1/+1 |
| * | fs: API changes enabling extra parameter to return size of type loff_t | Suriyan Ramasami | 2014-11-23 | 1 | -5/+5 |
| * | arm: socfpga: fpga: Add SoCFPGA FPGA programming interface | Pavel Machek | 2014-10-06 | 3 | -0/+305 |
| * | fpga: altera: Turn the switches into table lookup | Marek Vasut | 2014-10-06 | 1 | -111/+60 |
| * | fpga: altera: Make altera_validate return normal values | Marek Vasut | 2014-10-06 | 1 | -9/+9 |
| * | fpga: altera: Move altera_validate to the top | Marek Vasut | 2014-10-06 | 1 | -32/+26 |
| * | fpga: altera: More indentation trimdown | Marek Vasut | 2014-10-06 | 1 | -118/+120 |
| * | fpga: altera: Clean up altera_validate function | Marek Vasut | 2014-10-06 | 1 | -22/+21 |
| * | fpga: altera: Clean up the printing and debug | Marek Vasut | 2014-10-06 | 1 | -59/+58 |
