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* common: Drop part.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop flash.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | | | Move this uncommon header out of the common header. Fix up some style problems in flash.h while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32Trevor Woerner2020-05-151-1/+1
| | | | | | Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
* misc: scu: Increase the timeout for MU communicationYe Li2020-05-101-1/+1
| | | | | | | | | When power on some sources in Video system, current timeout 10ms is too short and returns before SCU response. So increase the timeout to 1s. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* misc: fuse: Update imx8 fuse driver for 8QMYe Li2020-05-101-0/+5
| | | | | | | Add the second ECC fuse area for 8QM which is different with 8QXP Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8: Configure SNVSFranck LENORMAND2020-05-011-4/+68
| | | | | | | | | | | | | | | | | Add a module to configure the tamper and secure violation of the SNVS using the SCU API. The module also adds some commands: - snvs_cfg: Configure the SNVS HP and LP registers - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP) - tamper_pin_cfg: Change the configuration of the tamper pins - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear status bits Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8: Update SCFW API to version 1.5Ye Li2020-05-011-0/+50
| | | | | | | | | | | Sync the latest SCFW API with below commit 6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add interfaces for PM resource reset and read/write SNVS security violation and tamper DGO registers. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8: scu api: Add support for SECO manufacturing protection APIsBreno Lima2020-05-011-0/+80
| | | | | | | | | | | | | | SECO provides APIs to support CAAM manufacturing protection: - sc_seco_get_mp_key() - sc_seco_get_mp_sign() - sc_seco_update_mpmr() Add SCFW APIs support. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* sandbox: p2sb: Silence compiler warningSimon Glass2020-04-161-1/+1
| | | | | | | | Some compilers produce a warning about 'child' being used before init. Silence this by setting to NULL at the start. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge tag 'ti-v2020.07-next' of ↵WIP/17Mar2020Tom Rini2020-03-175-6/+176
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next K3 J721E: * OSPI boot support * Support for loading remote cores in R5 SPL * PMIC ESM Support * Minor fixes for R5F and C7x remoteproc drivers K3 AM654: * Update AVS class 0 voltages. * Add I2C nodes DRA7xx/AM57xx: * Fixed Android boot on AM57xx AM33/AM43/Davinci: * switch to driver model for the net and mdio driver for baltos * Add DM/DTS support for omap video driver * Enable fastboot on am335x-evm
| * power: mfd: k3_avs: update am65xx MPU_VDD voltage valuesTero Kristo2020-03-031-6/+6
| | | | | | | | | | | | | | | | | | | | | | The latest data manual SPRSP08I –NOVEMBER 2017–REVISED DECEMBER 2019[1] for am65xx SoC states the new MPU nominal voltages to be 1.1V (OPP_NOM), 1.2V (OPP_OD) and 1.24V (OPP_TURBO). Update the nominal voltages in the K3 AVS driver to reflect this. [1] http://www.ti.com/lit/gpn/am6528 Signed-off-by: Tero Kristo <t-kristo@ti.com>
| * misc: pmic_esm: Add support for PMIC ESM driverTero Kristo2020-03-033-0/+77
| | | | | | | | | | | | | | | | | | | | | | The ESM (Error Signal Monitor) is used on certain PMIC versions to handle error signals propagating from rest of the system. If these reach the PMIC, it is typically a last resort fatal error which requires a system reset. The ESM driver does the proper configuration for the ESM module to reach this end goal. Initially, only TPS65941 PMIC is supported for this. Signed-off-by: Tero Kristo <t-kristo@ti.com>
| * misc: k3_esm: Add support for Texas Instruments K3 ESM driverTero Kristo2020-03-033-0/+93
| | | | | | | | | | | | | | | | | | | | | | The ESM (Error Signaling Module) is used to route error signals within the K3 SoCs somewhat similar to interrupts. The handling for these is different though, and can be routed for hardware error handling, to be handled by safety processor or just as error interrupts handled by the main processor. The u-boot level ESM driver is just used to configure the ESM signals so that they get routed to proper destination. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | misc: i2c_eeprom: store pagesize instead of pagewidth in i2c_eeprom_drv_dataMasahiro Yamada2020-03-161-16/+16
| | | | | | | | | | | | | | Associate the pagesize with compatible strings, and copy it to priv->pagesize. This is more straight-forward. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | misc: i2c_eeprom: remove pagewidth field from i2c_eepromMasahiro Yamada2020-03-161-5/+3
| | | | | | | | | | | | This struct member is not used in any effective way. Remove it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | misc: k3_avs: Fix possible NULL pointer deferenceVignesh Raghavendra2020-02-261-0/+4
|/ | | | | | | | Its possible that k3_avs_priv is NULL because the driver may not have been probed yet. Therefore check if pointer is valid before dereferencing it. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini2020-02-1110-10/+20
|\ | | | | | | | | | | | | sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
| * sandbox: Complete migration away from os_malloc()Simon Glass2020-02-051-4/+4
| | | | | | | | | | | | | | | | | | | | Now that we can use direct access to the system malloc() in sandbox, drop the remaining uses of os_malloc(). The only one remaining now is for the RAM buffer, which we do want to be at a known address, so this is intended. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-056-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Require users of devres to include the headerSimon Glass2020-02-052-0/+2
| | | | | | | | | | | | | | | | | | | | At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * dm: pci: Update the PCI read_config() method to const dev *Simon Glass2020-02-052-6/+8
| | | | | | | | | | | | | | At present this method uses a non-const udevice pointer, but the call should not modify the device. Use a const pointer. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini2020-02-102-2/+172
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move P2SB from Apollo Lake to a more generic location - Add a function to find a device by drvdata in DM core - Enhancement of DM IRQ uclass driver - Add a clock driver for Intel devices - Add support for ACPI general-purpose events - Add a TPM driver for H1/Cr50 - Enable TPM on Google Chromebook Coral
| * | dm: irq: Add support for requesting interruptsSimon Glass2020-02-072-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present driver model supports the IRQ uclass but there is no way to request a particular interrupt for a driver. Add a mechanism, similar to clock and reset, to read the interrupts required by a device from the device tree and to request those interrupts. U-Boot itself does not have interrupt-driven handlers, so just provide a means to read and clear an interrupt. This can be useful to handle peripherals which must use an interrupt to determine when data is available, for example. Bring over the basic binding file as well, from Linux v5.4. Note that the older binding is not supported in U-Boot; the newer 'special form' must be used. Add a simple test of the new functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | dm: irq: Add support for interrupt controller typesSimon Glass2020-02-072-2/+15
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There can be different types of interrupt controllers in a system and some drivers may need to distinguish between these. In general this can be handled using the device tree by adding the interrupt information to device nodes. However on x86 devices we have interrupt controllers which are not tied to any particular device and not really used in U-Boot. These still need to be inited, so a convenient method is to give each controller a type and allow a particular controller type to be probed. Add support for this in sandbox along with a test. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove the new bland line at EOF of test/dm/irq.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | misc: i2c_eeprom: set offset len and chip addr offset maskRobert Beckett2020-02-091-0/+35
|/ | | | | | | Set the correct offset length and chip address offset mask for each device to allow correct access to total capacity of the devices. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
* common: Move hang() to the same header as panic()Simon Glass2020-01-171-0/+1
| | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Drop floppy disk supportSimon Glass2020-01-172-101/+0
| | | | | | | | | This seems pretty old now. It has not been converted to driver model and is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'u-boot-imx-20200108' of ↵Tom Rini2020-01-081-0/+13
|\ | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx --------------------------------------------------------------------- Add i.MX8MP SoC and EVK board Update README for i.MX8MN EVK and fix mmc env Add pca9450 driver -------------------------------------------------------------------- Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
| * mxc_ocotp: support i.MX8MPPeng Fan2020-01-081-0/+13
| | | | | | | | | | | | | | | | i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 ↵Tom Rini2019-12-188-0/+742
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral
| * | sandbox: Add a test for IRQSimon Glass2019-12-152-0/+56
| | | | | | | | | | | | | | | | | | | | | Add a simple sandbox test for this uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Move UCLASS_IRQ into a separate fileSimon Glass2019-12-153-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this uclass to support the needs of the Apollo Lake ITSS. It supports four operations. Move the uclass into a separate directory so that sandbox can use it too. Add a new Kconfig to control it and enable this on x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | sandbox: Add PCI driver and test for p2sbSimon Glass2019-12-154-0/+373
| | | | | | | | | | | | | | | | | | | | | | | | Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | pci: Add support for p2sb uclassSimon Glass2019-12-153-0/+250
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Primary-to-Sideband bus (P2SB) is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added in the device tree as subnodes of the p2sb. This adds a uclass and enables it for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | misc: i2c_eeprom: add size queryRobert Beckett2019-12-171-19/+126
| | | | | | | | | | | | | | | | | | | | | Add ability to query size of eeprom device and partitions Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | misc: i2c_eeprom: add fixed partitions supportRobert Beckett2019-12-171-0/+98
| | | | | | | | | | | | | | | | | | | | | Add ability to partition eeprom via devicetree bindings Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | dm: i2c: EEPROM simulator add tests for addr offset maskRobert Beckett2019-12-171-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | Add support for setting the chip address offset mask to EEPROM sumulator and add tests to test it. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | dm: i2c: EEPROM simulator allow tests visibility of addr and offsetRobert Beckett2019-12-171-14/+47
|/ / | | | | | | | | | | | | | | | | | | | | Improve i2c EEPROM simulator testing by providing access functions to check the previous chip addr and offset. Given that we can now directly test the offsets, also simplified the offset mapping and allow for wrapping acceses. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | cros_ec: use uint instead of uint8_t for cmd paramMichael Auchter2019-12-101-1/+1
|/ | | | | | | | | | | | | Chromium EC commands can be up to 16-bits, so using a uint8_t here can cause truncation. Update to use a uint instead. It looks like this should likely have been done as a part of 9fea76f5d30264dc08ac591a7a89427b8441555b, but this function was skipped for some reason. Signed-off-by: Michael Auchter <michael.auchter@ni.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* common: Move old EEPROM functions into a new headerWIP/2019-12-02-master-importsSimon Glass2019-12-021-0/+1
| | | | | | | | These functions do not use driver model but are still used. Move them to a new eeprom.h header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move get_ticks() function out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* crc32: Use the crc.h header for crc functionsSimon Glass2019-12-021-0/+1
| | | | | | | | | | | Drop inclusion of crc.h in common.h and use the correct header directly instead. With this we can drop the conflicting definition in fw_env.h and rely on the crc.h header, which is already included. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* status_led: Tidy up the code styleSimon Glass2019-12-021-4/+4
| | | | | | | There are a few whitespace problems with this code. Tidy them up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Drop global inclusion of status_led.hSimon Glass2019-12-021-0/+1
| | | | | | | | This is only used by a few files so it should not be in the common header. Move it out. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* misc: add driver for the Rockchip otp controllerFinley Xiao2019-11-173-0/+186
| | | | | | | | | Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* Merge tag 'u-boot-imx-20191105' of ↵Tom Rini2019-11-121-39/+7
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191105 ------------------- i.MX8MN SoC support ROM API image download support i.MX8MM enet enabling
| * misc: imx8: scu: simplify code to make it extendablePeng Fan2019-11-051-39/+7
| | | | | | | | | | | | | | | | | | | | | | clk and pinctrl will be get(probed) during each device probe, we don't need to probe them in scu driver. Only need to bind the sub-nodes (clk and iomuxc) of MU node with their drivers. So drop the code to probe the clk/pinctrl, and this patch will make it easy to add more subnodes. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | misc: k3_avs: Add j721e supportKeerthy2019-11-071-0/+22
| | | | | | | | | | | | | | | | | | j721e SoCs have different OPP tables. Add support for the same. Note: DM Still has lot of voltages TBD hence the correct values need to be programmed once they are published. Signed-off-by: Keerthy <j-keerthy@ti.com>
* | misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0Tero Kristo2019-11-073-0/+376
|/ | | | | | | | | | Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add a driver to support this feature for K3 line of SoCs, initially for AM65x. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
* mach-imx: Adding new argument for SIP call interfaceYe Li2019-11-031-1/+1
| | | | | | | | | | | Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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