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* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-05-302-5/+12
|\ | | | | | | | | | | | | - Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv tree fixing a warning. Signed-off-by: Tom Rini <trini@konsulko.com>
| * sf: Add Macronix MX25U25635F IDMarek Vasut2018-05-291-0/+1
| | | | | | | | | | | | | | Add ID for the Macronix MX25U25635F flash. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Add Winbond W25Q256 IDMarek Vasut2018-05-291-0/+2
| | | | | | | | | | | | | | Add ID for the Winbond W25Q256 flash. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Default page size Spansion flash "S25FS512S" is 256bAshish Kumar2018-05-161-5/+6
| | | | | | | | | | | | | | | | | | | | page size for JEDEC EXT starting 0x4d00 is 512b, except JEDEC ID 0x215, 0x216 and 0x220 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [jagan: added proper commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Add support for ISSI is25wpKimmo Rautkoski2018-05-161-0/+3
| | | | | | | | | | | | | | Added support for is25wp032, is25wp064 and is25wp128. Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | Merge git://git.denx.de/u-boot-riscvTom Rini2018-05-302-38/+0
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| * | mtd: ftsmc020: Drop unsed codeRick Chen2018-05-292-38/+0
| |/ | | | | | | | | | | | | | | | | ftsmc020_init is not used anymore. So it can be removed. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
* | ubi: fastmap: Implement produce_free_peb()Patrice Chotard2018-05-221-0/+29
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 'commit f82290afc847 ("mtd: ubi: Fix worker handling")', when booting from NAND, on a fresh NAND just after being flashed (and only in this case), we got the following log: ubi0: default fastmap pool size: 200 ubi0: default fastmap WL pool size: 100 ubi0: attaching mtd2 ubi0: scanning is finished ubi0 error: ubi_update_fastmap: could not find any anchor PEB ubi0 error: ubi_update_fastmap: could not find any anchor PEB ubi0 error: ubi_wl_get_peb: Unable to get a free PEB from user WL pool ubi0 error: autoresize: cannot auto-resize volume 1 UBI error: cannot attach mtd2UBI error: cannot initialize UBI, error -28UBI init error 28 After analysis, in ubi_wl_init(), when performing schedule_erase(), thread_enabled flag is not yet set to 1, which forbids ubi_do_worker() to execute pending works. This has to effect to not populate ubi->free with free physical eraseblocks. Following Richard Weinberger's advice, this patch has been backported from kernel tree : 'commit 1cb8f9776c7d ("ubi: fastmap: Implement produce_free_peb()")' Tested-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Schocher <hs@denx.de>
* Merge git://git.denx.de/u-boot-tegraTom Rini2018-05-111-43/+55
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| * mtd: nand: tegra: convert to driver model and live treeMarcel Ziswiler2018-05-101-43/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra NAND driver recently got broken by ongoing driver model resp. live tree migration work: NAND: Could not decode nand-flash in device tree Tegra NAND init failed 0 MiB A patch for NAND uclass support was proposed about a year ago: https://patchwork.ozlabs.org/patch/722282/ It was not merged and I do not see on-going work for this. This commit just provides a driver model probe hook to retrieve further configuration from the live device tree. As there is no NAND ulass as of yet (ab)using UCLASS_MTD. Once UCLASS_NAND is supported, it would be possible to migrate to it. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblazeTom Rini2018-05-111-1/+53
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup
| * | nand: zynq: Send address cycles as per onfi parameter pageSiva Durga Prasad Paladugu2018-05-111-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Send address cycles as per value read from onfi parameter page for Read and write commands instead of using a hard coded value. This may vary for different parts and hence use it from onfi parameter page value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | nand: zynq: Add support for 16-bit buswidthSiva Durga Prasad Paladugu2018-05-111-0/+38
| |/ | | | | | | | | | | | | | | This patch adds support for 16-bit buswidth by determining the bus width based on mio configuration. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | mtd: nand: fsl_ifc: Fix nand waitfunc return valueJagdish Gediya2018-05-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | As per the IFC hardware manual, Most significant byte in nand_fsr register is the outcome of NAND READ STATUS command. So status value need to be shifted as per the nand framework requirement. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0Jagdish Gediya2018-05-091-20/+12
|/ | | | | | | | | | | | | Number of ECC status registers i.e. (ECCSTATx) has been increased in IFC version 2.0.0 due to increase in SRAM size. This is causing eccstat array to over flow. So, replace eccstat array with u32 variable to make it fail-safe and independent of number of ECC status registers or SRAM size. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* SPDX: Convert all of our multiple license tags to Linux Kernel styleTom Rini2018-05-073-6/+3
| | | | | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have multiple licenses (in these cases, dual license) declared in the SPDX-License-Identifier tag. In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B" as per the Linux Kernel style document. Note that parenthesis are allowed so when they were used before we continue to use them. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0786-175/+86
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-273-6/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-spiTom Rini2018-04-253-0/+185
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| * sf: Add Spansion s25fl208k entrySean Nyekjaer2018-04-191-0/+1
| | | | | | | | | | | | | | Add entry for Spansion s25fl208k part. Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: sf: add support for sst26wf016, sst26wf032, sst26wf064Eugeniy Paltsev2018-04-191-0/+3
| | | | | | | | | | | | | | | | This commit adds support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * mtd: sf: Add support of sst26wf* flash ICs protection opsEugeniy Paltsev2018-04-192-0/+181
| | | | | | | | | | | | | | | | | | | | sst26wf flash series block protection implementation differs from other SST series, so add specific implementation flash_lock/flash_unlock/flash_is_locked functions for sst26wf flash ICs. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | nand: zynq: Cleanup initializationEzequiel Garcia2018-04-231-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the driver doesn't have to play any ifdef game. Also, we can mark zynq_nand_init() as static and get rid of the mach-specific nand.h header. This is really a revert of: "mtd: zynq: nand: Move board_nand_init() function to board.c" (sha1: 310995d9f91ae56082b49be06fe8c3d01424f8f6) Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | nand: zynq: Fix driver initializationEzequiel Garcia2018-04-231-1/+1
|/ | | | | | | | | | | | | | | | | This driver is currently broken, refusing to initialize properly. The reason is that get_nand_dev_by_index() was being called before nand_register(), thus returning a pointer into uninitialized memory. In other words, the struct mtd_info used by the driver is total junk. Fix it by getting the correct struct mtd_info, via nand_to_mtd() on the driver's struct nand_chip. Tested on a custom board, where the CPU is halted without this patch. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: cfi_flash: Make live-tree compatibleMario Six2018-04-161-10/+11
| | | | | | | Make the cfi_flash driver compatible with a live device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd: rpc: Add Renesas RPC Hyperflash driverMarek Vasut2018-04-113-0/+406
| | | | | | | | | Add driver for the RPC block in Hyperflash mode. This driver allows access to a CFI Hyperflash attached to the RPC block and does not support RPC in SPI mode. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* nand: arasan_nfc: Fixed NAND write issueVipul Kumar2018-04-091-2/+2
| | | | | | | | | | | | | In commit 2453c695185f ("arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed to 0xFFFF and the same macro is used in nand write and so that getting nand write error. This patch reverted this macro to the 0xFFFF0000 and used ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function which is equal to 0xFFFF. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge git://git.denx.de/u-boot-sunxiTom Rini2018-04-043-120/+150
|\ | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
| * sunxi: move the NAND parameters to KconfigMiquel Raynal2018-04-031-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the NAND parameters from defconfig files to Kconfig for SUNXI architecture only. Fort now only the CHIP pro is migrated. It would have been better to convert this defconfig entry to Kconfig for all supported machines/architectures but it has been abandoned due to a fairly high amount of errors reported by the moveconfig.py tool. This is due to defines quite often being multiplications of values/other defines not correctly handled. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * sunxi: make NAND_SUNXI use ARCH_SUNXI as default in KconfigMiquel Raynal2018-04-031-0/+1
| | | | | | | | | | | | | | | | | | Remove NAND_SUNXI from the CHIP pro defconfig to be automatically selected depending on the state of ARCH_SUNXI. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * sunxi: automatically select SPL_NAND_SUPPORT in KconfigMiquel Raynal2018-04-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the number of entries to add in defconfig files when adding NAND support. For now, the only board using it is the CHIP pro. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * sunxi: allow NAND support to be compiled for sun8i platformsMiquel Raynal2018-04-031-1/+1
| | | | | | | | | | | | | | | | Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I in Kconfig. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: use PIO instead of DMAMiquel Raynal2018-04-031-80/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL support was first written to support only the earlier generations of Allwinner SoCs, and was only really enabled on the A13 / GR8. However, those old SoCs had a DMA engine that has been replaced since the A31 by another DMA controller that is no longer compatible. Since the code directly uses that DMA controller, it cannot operate properly on the later SoCs, while the NAND controller has not changed. There's two paths forward, the first one would have been to add support for that DMA controller too, the second to just remove the DMA usage entirely and rely on PIO. The later has been chosen because CPU overload at this stage is not an issue and it makes the driver more generic, and easier to understand. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: declare the ecc_bytes array globallyMiquel Raynal2018-04-031-1/+2
| | | | | | | | | | | | | | | | | | Move the ecc_bytes array out of nand_max_ecc_strength() for future use by nand_read_page(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: make the reset column helper more genericMiquel Raynal2018-04-031-5/+5
| | | | | | | | | | | | | | | | | | | | | | Prepare the future use of an helper to move the data pointer (the column) of the NAND chip by renaming nand_reset_column() to nand_change_column(). Resetting the column is just a matter of giving 0 as argument. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: ensure enough time has passed after changing the columnMiquel Raynal2018-04-031-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | When changing the column, the ONFI specification states that a minimum time of tCCS (Change Column Setup time) must elapse between the last address cycle is asserted on the bus and the first data cycle is clocked. An usual value for average NANDs is 500 nanoseconds. Round it up to 1 microsecond to be safe. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: create an helper to handle command executionMiquel Raynal2018-04-031-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Executing a command is matter of always doing the following sequence: * Waiting for the FIFO to be empty so we can fill it with the new command. * Clearing the status register. * Writing the command in the FIFO. * Waiting for the command to finish. Add a nand_exec_cmd() helper to handle this instead of repeating the logic through the various functions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: add missing status clearMiquel Raynal2018-04-031-0/+1
| | | | | | | | | | | | | | | | | | It is best practice to always clear the status register before executing a command to be sure that the status read afterwards is relevant. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helperMiquel Raynal2018-04-031-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | One bit in the control registers indicates if the NAND controller is ready to receive a new command. Otherwise, the command FIFO is full and we should wait for this bit to flip. It then states that the last command has been processed and the FIFO is now free to welcome another command. Add this sanity check before starting any new command. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: introduce the nand_wait_int() helperMiquel Raynal2018-04-031-20/+14
| | | | | | | | | | | | | | | | | | | | | | The pattern of polling on a status register until a bit is set or a timeout occurs is repeated multiple times in the driver. Mutualize the code by introducing the nand_wait_int() helper that does wait for the bit to flip or returns an error in case of timeout. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: fix typo on register nameMiquel Raynal2018-04-031-3/+3
| | | | | | | | | | | | | | | | Change NFC_SEND_ADR to NFC_SEND_ADDR. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * spl: nand: sunxi: fix second case of modulo by zero errorMiquel Raynal2018-04-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the nand_read_buffer() step, the seed is calculated by doing a modulo by conf->nseeds which is always zero when not using the randomizer (most of SLC NANDs). This situation turns out to lead to a run time freeze with certain toolchains. Derive this seed only when the randomizer is enabled (and conf->nseeds logically not zero), exactly like what has been done before with an identical situation, see commit ea3f750c73e3 ("nand: sunxi: Fix modulo by zero error"). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * mtd: nand: sunxi: fix ECC strength choiceMiquel Raynal2018-04-031-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the requested ECC strength does not exactly match the strengths supported by the ECC engine, the driver is selecting the closest strength meeting the 'selected_strength > requested_strength' constraint. Fix the fact that, in this particular case, ecc->strength value was not updated to match the 'selected_strength'. For instance, one can encounter this issue when no ECC requirement is filled in the device tree while the NAND chip minimum requirement is not a strength/step_size combo natively supported by the ECC engine. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* | Merge git://git.denx.de/u-boot-ubiTom Rini2018-03-251-0/+7
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| * | Convert CONFIG_UBI_SILENCE_MSG to KconfigPetr Vorel2018-03-241-0/+7
| | | | | | | | | | | | Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
* | | arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or moreVipul Kumar2018-03-231-3/+4
|/ / | | | | | | | | | | | | | | | | | | NAND erase was not happening for size 1GiB or more. Erase command was executing successfully but in actual, it was not erasing. This patch fixed erase issue for 1 GiB or more size nand. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | spi: spi_flash: do not fail silently on bad user inputLiam Beguin2018-03-221-1/+1
| | | | | | | | | | | | | | Make sure the user is notified instead of silently returning an error. Signed-off-by: Liam Beguin <liambeguin@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | nand: Remove unused ppc4xx NAND driver and referencesStefan Roese2018-03-193-217/+0
|/ | | | | | | | | ppc4xx support was removed some time ago. Lets remove the now unused NAND driver and all its references for this platform as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Scott Wood <oss@buserror.net>
* Merge git://git.denx.de/u-boot-spiTom Rini2018-03-153-326/+0
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| * arm: sunxi: Move spl spi sunxi code to mach-sunxiJagan Teki2018-03-133-326/+0
| | | | | | | | | | | | | | | | | | | | | | | | This SUNXI variant SPL SPI code doesn't use either SPI or SPL_FLASG subsystems due to size constraints and also placing this code in drivers/mtd/spi will unnecessary build SPI_FLASH code(if defined) which never required, hence moved to arch area. And also renamed the file according to kconfig which resembles proper name. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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