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* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellWIP/29Oct2020Tom Rini2020-10-292-82/+101
|\ | | | | | | | | | | | | - Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch) - Armada 8k: Use ATF serdes init instead of the "old" U-Boot version (Baruch) - Minor update to Octeon TX/TX2 defconfig (Stefan)
| * mtd: nand: pxa3xx: enable NAND controller if the SoC needs itShmuel Hazan2020-10-292-10/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable NAND controller if the SoC needs it"). This commit adds support for the Armada 8040 nand controller. The kernel commit says this: Marvell recent SoCs like A7k/A8k do not boot with NAND flash controller activated by default. Enabling the controller is a matter of writing in a system controller register that may also be used for other NAND related choices. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
| * mtd: pxa3xx_nand: remove dead codeBaruch Siach2020-10-291-9/+3
| | | | | | | | | | | | | | | | The kfree() call is unreachable, and is not needed. Remove this call and the fail_disable_clk label. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
| * mtd: pxa3xx_nand: port to use driver modelShmuel Hazan2020-10-292-63/+54
| | | | | | | | | | | | | | | | | | | | Use the generic DT code to find the device compatible property for us. This makes the driver look more like other current drivers. It also make it easier to add support for other variants like Armada 8K in a future commit. Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* | mtd: spi: Fix incorrect indentationMichal Simek2020-10-271-1/+1
|/ | | | | | | Use tabs to be aligned with the rest of the code. Fixes: 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: mxs_nand: Fix not calling dev_xxx with a deviceSean Anderson2020-10-151-13/+15
| | | | | | This includes device_compat.h, and fixes several calls to dev_xxx. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* mtd: nand: Add NAND controller driver for OcteonTXSuneel Garapati2020-10-146-0/+2998
| | | | | | | | | | Adds support for NAND controllers found on OcteonTX or OcteonTX2 SoC platforms. Also includes driver to support Hardware ECC using BCH HW engine found on these platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Fix devicetree address determinationAndre Przywara2020-10-081-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cfi-flash driver uses an open-coded version of the generic algorithm to decode and translate multiple frames of a "reg" property. This starts off the wrong foot by using the address-cells and size-cells properties of *this* very node, and not of the parent. This somewhat happened to work back when we were using a wrong default size of 2, but broke about a year ago with commit 0ba41ce1b781 ("libfdt: return correct value if #size-cells property is not present"). Instead of fixing the reinvented wheel, just use the generic function that does all of this properly. This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding a wrong flash base address: DRAM: 1 GiB Flash: "Synchronous Abort" handler, esr 0x96000044 elr: 00000000000211dc lr : 00000000000211b0 (reloc) elr: 000000007ff5e1dc lr : 000000007ff5e1b0 x0 : 00000000000000f0 x1 : 000000007ff5e1d8 x2 : 000000007edfbc48 x3 : 0000000000000000 x4 : 0000000000000000 x5 : 00000000000000f0 x6 : 000000007edfbc2c x7 : 0000000000000000 x8 : 000000007ffd8d70 x9 : 000000000000000c x10: 0400000000000003 x11: 0000000000000055 ^^^^^^^^^^^^^^^^ Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de>
* mtd: cfi_mtd: Use DMA for readsVignesh Raghavendra2020-10-081-1/+3
| | | | | | | | | | | When possible use DMA for reading from CFI flash, this provides upto 5x improvement in read performance with high speed CFI compliant flashes like HyperFlash. Code will gracefully fallback to CPU copy when DMA is unavailable. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
* Merge branch 'next'Tom Rini2020-10-0511-110/+128
|\ | | | | | | | | | | | | Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
| * nand: vybrid: Re-introduce vf610_nfc.devSean Anderson2020-09-301-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | This member was presumably dropped when this driver was converted from Linux. However, it is still used in log statements during initialization. This patch adds the member back. In addition, allocation of struct vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows it to be allocated by DM (if it is being used) and for dev to be initialized. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * nand: brcmnand: Fix not calling dev_err() with a deviceSean Anderson2020-09-301-14/+6
| | | | | | | | | | | | | | | | | | | | There are too many levels of indirection when calling dev_err. This is an artifact of the conversion of brcmnand_host.pdev from a struct platform_device (which has a member `dev` pointing to a struct device) to struct udevice. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * nand: atmel: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-30/+39
| | | | | | | | | | | | | | | | Use mtd_info to get a device to log with. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mtd: spi-nand: Fix not calling dev_err with a deviceSean Anderson2020-09-301-4/+4
| | | | | | | | | | | | | | | | | | Get it from spinand->slave->dev. Another option would be to use spinand_to_mtd(spinand)->dev, but this is what the existing code uses. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mtd: spi: Fix logging in spi-nor-tinySean Anderson2020-09-301-5/+16
| | | | | | | | | | | | | | | | | | This fixes dev_xxx() not always being called with a device. In spi_nor_reg_read, a the slave device may not always be available, so we use bus and cs instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mtd: spi: Include dm.h in spi-nor-core.cSean Anderson2020-09-301-0/+1
| | | | | | | | | | | | | | This header is needed so struct udevice can be used in dev_xxx(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mtd: nand: sunxi: Fix not calling dev_err with a deviceSean Anderson2020-09-301-22/+23
| | | | | | | | | | | | | | | | | | | | | | | | Usually the device is gotten from sunxi_nfc. This is a struct device and not a struct udevice, but the whole driver seems to be written wihout DM anyway... In a few instances, this patch modifies functions to take an nfc to log with. In once instance we use mtd_info's device since there is no nfc. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * mtd: nand: pxa3xx: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-15/+15
| | | | | | | | | | | | | | | | Use the device from any mtd already available, or from the active mtd via pxa3xx_nand_info if one is not. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * nand: Kconfig: Change dependency for NAND_ARASANMichal Simek2020-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with !DM that's why Kconfig it showing it as error: WARNING: unmet direct dependencies detected for DM_MTD Depends on [n]: DM [=n] Selected by [y]: - NAND_ARASAN [=y] && MTD_RAW_NAND [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * xilinx: drivers: Use '_' instead of '-' in driver nameMichal Simek2020-09-232-2/+2
| | | | | | | | | | | | | | | | | | The most of drivers are using '_' instead of '-' in driver name. That's why sync up these names to be aligned. It looks quite bad to see both in use. It is visible via dm tree command. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | mtd: fix typos in drivers/mtd/Kconfig, drivers/mtd/renesas_rpc_hf.cHeinrich Schuchardt2020-09-292-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a typo %s/interract/interact/ Use Samsung's capitalization of their trademarks %s/onenand/OneNAND/ %s/Hyperflash/HyperFlash/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de> [trini: Add other Hyperflash cases as noted by Stefan] Signed-off-by: Tom Rini <trini@konsulko.com>
* | mtd: spi-nor-ids: add support for Macronix mx25u12835f flashVladimir Vid2020-09-241-0/+1
|/ | | | | | | | | Some of Marvell A3700 boards use mx25u12835f, specifically uDPU and ESPRESSObin v7. Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> [a.heider: adapt commit message to mainline] Signed-off-by: Andre Heider <a.heider@gmail.com>
* mtd: nand: Fix nand write error with bad block addresses above 32-bitT Karthik Reddy2020-09-111-3/+3
| | | | | | | | | | | | | | | | Nand writes should skip the bad blocks with "nand write" command. In case of bad blocks with above 32-bit address, nand_block_isbad() returns false due to truncated bad block address. In below code segment, if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is happening. Cast 'mtd->erasesize' with loff_t to fix this issue. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: rawnand: stm32_fmc2: get resources from parent nodeChristophe Kerello2020-08-131-28/+59
| | | | | | | | | | | FMC2 EBI support has been added. Common resources (registers base address and clock) can now be shared between the 2 drivers using "st,stm32mp1-fmc2-nfc" compatible string. It means that the common resources should now be found in the parent device when EBI node is available. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: use clrsetbits_le32Christophe Kerello2020-08-131-35/+21
| | | | | | | This patch uses clrsetbits_le32 function instead of multiple instructions. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: use FIELD_PREP/FIELD_GET macrosChristophe Kerello2020-08-131-64/+56
| | | | | | | This patch removes custom macros and uses FIELD_PREP and FIELD_GET macros. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: cosmetic change to use nfc instead of fmc2 where ↵Christophe Kerello2020-08-131-132/+131
| | | | | | | | | | | | relevant This patch renames functions and local variables. This cleanup is done to get all functions starting by stm32_fmc2_nfc in the FMC2 raw NAND driver when all functions will start by stm32_fmc2_ebi in the FMC2 EBI driver. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_5S for timeoutsChristophe Kerello2020-08-131-3/+5
| | | | | | | | | | FMC2_TIMEOUT_5S will be used each time that we need to wait. It was seen, during stress tests in an overloaded system, that we could be close to 1 second, even if we never met this value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: remove useless inline commentsChristophe Kerello2020-08-131-25/+0
| | | | | | | | Remove inline comments that are useless since function label are self explanatory. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* mtd: rawnand: stm32_fmc2: fix a buffer overflowChristophe Kerello2020-08-131-1/+1
| | | | | | | The chip select defined in the device tree could only be 0 or 1. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* Fix corner case in bad block table handling.Doyle, Patrick2020-08-041-1/+1
| | | | | | | | | In the unlikely event that both blocks 10 and 11 are marked as bad (on a 32 bit machine), then the process of marking block 10 as bad stomps on cached entry for block 11. There are (of course) other examples. Signed-off-by: Patrick Doyle <pdoyle@irobot.com> Reviewed-by: Richard Weinberger <richard@nod.at>
* nand: Drop dm.h header fileSimon Glass2020-08-032-2/+3
| | | | | | | This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: spi-nor: Tidy up error handling / debug codeSimon Glass2020-08-033-4/+4
| | | | | | | | | | | | | The -ENODEV error value in spi_nor_read_id() is incorrect since there clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead which has the virtue of being less common. Fix the return value in spi_nor_scan(). Also there are a few printf() statements which should be debug() since they bloat the code with unused strings at present. Fix those while here. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: Allow separate control of SPI_FLASH_TINY for SPL/TPLSimon Glass2020-08-031-1/+1
| | | | | | | In some cases SPL needs to be able to erase but TPL just needs to read. Allow these to have separate settings for SPI_FLASH_TINY. Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: spinand: micron: Add new Micron SPI NAND devices with multiple diesShivamurthy Shastri2020-07-201-0/+55
| | | | | | | | | | Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spinand: micron: Add M70A series Micron SPI NAND devicesShivamurthy Shastri2020-07-201-0/+20
| | | | | | | Add device table for M70A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spinand: micron: identify SPI NAND device with Continuous Read modeShivamurthy Shastri2020-07-201-0/+16
| | | | | | | | | | | | | | | | | | | | | | Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spinand: micron: Add new Micron SPI NAND devicesShivamurthy Shastri2020-07-201-0/+30
| | | | | | | Add device table for M79A and M78A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGDShivamurthy Shastri2020-07-201-0/+1
| | | | | | | | Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage details as a comment. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spinand: micron: Generalize the OOB layout structure and function namesShivamurthy Shastri2020-07-201-14/+14
| | | | | | | | In order to add new Micron SPI NAND devices, we generalized the OOB layout structure and function names. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: mtdpart: use uint64_t instead of int for cur_offMartin Kaistra2020-07-171-1/+1
| | | | | | | | | | | | | | | | | The types of "offset" and "size" of "struct mtd_partition" are uint64_t, while mtd_parse_partitions() uses int to work with these values. When the offset reaches 2GB, it is interpreted as a negative value, which leads to error messages like mtd: partition "<partition name>" is out of reach -- disabled eg. when using the "ubi part" command. Fix this by using uint64_t for cur_off and cur_sz. Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de> Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiWIP/11Jul2020Tom Rini2020-07-111-3/+4
|\ | | | | | | | | | | | | - Enable DM_SPI on siemens omap boards (Jagan) - Dropped some non-dm supported omap3 boards (Jagan) - Dropped non-dm code in omap3 spi driver (Jagan) - Dropped non-dm code in kirkwood spi driver (Bhargav)
| * mtd: spi-nor: Enable QE bit for ISSI flash in case of SFDPPragnesh Patel2020-07-091-3/+4
| | | | | | | | | | | | | | | | | | | | Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge tag 'uniphier-v2020.10' of ↵Tom Rini2020-07-113-1/+19
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2020.10 - remove workaround for Cortex-A72 - increase U-Boot proper size to 2MB - sync DT with Linux - add system bus controller driver - improve serial driver - add reset assertion to Denali NAND driver
| * | mtd: nand: raw: denali: Wait for reset completion statusLey Foon Tan2020-07-113-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed delay 200us is not working in certain platforms. Change to poll for reset completion status to have more reliable reset process. Controller will set the rst_comp bit in intr_status register after controller has completed its reset and initialization process. Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Radu Bacrau <radu.bacrau@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | mtd: nand: raw: denali: Assert reset before deassertLey Foon Tan2020-07-111-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Always put the controller in reset, then take it out of reset. This is to make sure controller always in reset state in both SPL and proper Uboot. This is preparation for the next patch to poll for reset completion (rst_comp) bit after reset. Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Radu Bacrau <radu.bacrau@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | core: add support for U_BOOT_DRIVER_ALIASWalter Lozano2020-07-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when using OF_PLATDATA the binding between devices and drivers is done trying to match the compatible string in the node with a driver name. However, usually a single driver supports multiple compatible strings which causes that only devices which its compatible string matches a driver name get bound. To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro, which generates no code at all, but allows an easy way to declare driver name aliases. Thanks to this, dtoc could be improve to look for the driver name based on its alias when it populates the U_BOOT_DEVICE entry. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | drivers: rename drivers to match compatible stringWalter Lozano2020-07-092-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: spi: sandbox_sf_state_name() is requiredHeinrich Schuchardt2020-07-091-2/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compiling drivers/mtd/spi/sandbox.c fails when compiled with CONFIG_LOG=n: In file included from include/common.h:20, from drivers/mtd/spi/sandbox.c:13: drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=] 295 | log_content(" cmd: transition to %s state\n", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’ 37 | #define pr_fmt(fmt) fmt | ^~~ include/log.h:128:30: note: in expansion of macro ‘log_nop’ 128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \ | ^~~~~~~ drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro ‘log_content’ 295 | log_content(" cmd: transition to %s state\n", | ^~~~~~~~~~~ drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here 295 | log_content(" cmd: transition to %s state\n", | ~^ | | | char * | %d Supply function sandbox_sf_state_name() independent of CONFIG_LOG. Fixes: c3aed5db591e ("sandbox: spi: Add more logging") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: fit: nand: fix fit loading in case of bad blocksDario Binacchi2020-07-081-0/+28
| | | | | | | | | | | | The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
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