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path: root/drivers/net/designware.c
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* net: Drop DM_PCI check from designware driverSimon Glass2021-09-131-12/+10
| | | | | | | | | We don't need this check anymore since when PCI is enabled, driver model is always used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: designware: fix PHY reset with DM_MDIONeil Armstrong2021-04-281-4/+11
| | | | | | | | | | | | | The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat leading to random sleeps (-10174464 on Odroid-HC4). This moves the dw_mdio_reset function to a common one taking the ethernet device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions. Fixes: 5160b4567c ("net: designware: add DM_MDIO support") Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* net: designware: remove amlogic compatiblesNeil Armstrong2021-04-061-3/+0
| | | | | | These compatibles are now handled by the dwmac_meson8b glue driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* net: designware: add DM_MDIO supportNeil Armstrong2021-04-061-1/+92
| | | | | | | | | Add support for DM_MDIO to connect to PHY and expose a MDIO device for the internal MDIO bus in order to dynamically connect to MDIO PHYs with DT with eventual MDIO muxes in between. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-131-2/+2
| | | | | | | This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-5/+5
| | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-2/+2
| | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-2/+2
| | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay2020-10-061-1/+2
| | | | | | | | | | | | | | | | | | | The cell_count argument is required when cells_name is NULL. This patch adds this parameter in live tree API - of_count_phandle_with_args - ofnode_count_phandle_with_args - dev_count_phandle_with_args This parameter solves issue when these API is used to count the number of element of a cell without cell name. This parameter allow to force the size cell. For example: count = dev_count_phandle_with_args(dev, "array", NULL, 3); Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-181-0/+2
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Require users of devres to include the headerSimon Glass2020-02-051-0/+1
| | | | | | | | | | At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* dm: gpio: Allow control of GPIO uclass in SPLSimon Glass2019-12-151-5/+5
| | | | | | | | | | | | | | | | | | | | At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* common: Move ARM cache operations out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* NET: DW: fix regression for ARC boardsEugeniy Paltsev2019-10-071-0/+1
| | | | | | | | | | | | | The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac") breaks designware ethernet for all ARC boards. It removes "altr, socfpga-stmmac" compatible from "drivers/net/designware.c" without changing compatible in the boards which use it. Fix that by adding "snps,arc-dwmac-3.70a" compatible string to "drivers/net/designware.c" and using it in ARC boards device tree. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
* net: designware: drop compatible altr, socfpga-stmmacRalph Siemsen2019-09-041-1/+0
| | | | | | | | | | | | | The same compatible = "altr,socfpga-stmmac" appears in both drivers/net/designware.c and drivers/net/dwmac_socfgpa.c, creating ambiguity in which driver will be bound. For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver. So drop the compatible string from designware.c. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: use 'phy_connect' instead of open codedSimon Goldschmidt2019-07-251-5/+3
| | | | | | | | Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev' both deduplicates code and adds support for 'fixed-link'. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: remove mdio bus on probe failureSimon Goldschmidt2019-07-181-5/+15
| | | | | | | | | | | | | | | | The designware eth driver registers an mdio bus during probe, but if no PHY is found, this bus is never removed although probe failes and the driver is shown as not probed in the dm tree. This later leads to errors when e.g. the mii or mdio commands try to use available mdio buses because the mdio bus is still registered but all corresponding data structures are invalid because probe failed. Fix this by unregistering the mdio bus on probe failure (just as it is unregistered in the .remove callback, too). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: clear padding bytesSimon Goldschmidt2019-01-241-2/+4
| | | | | | | | | | | | | | Short frames are padded to the minimum allowed size of 60 bytes. However, the designware driver sends old data in these padding bytes. It is common practice to zero out these padding bytes ro prevent leaking memory contents to other hosts. Fix the padding code to zero out the padded bytes at the end. Tested on socfpga gen5. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: fix tx packet lengthSimon Goldschmidt2019-01-241-5/+7
| | | | | | | | | | | | | | | | | | | | The designware driver has a bug in setting the tx length into the dma descriptor: it always or's the length into the descriptor without zeroing out the length mask before. This results in occasional packets being transmitted with a length greater than they should be (trailer). Due to the nature of Ethernet allowing such a trailer, most packets seem to be parsed fine by remote hosts, which is probably why this hasn't been noticed. Fix this by correctly clearing the size mask before setting the new length. Tested on socfpga gen5. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* net: designware: add meson meson axg compatibleNeil Armstrong2018-11-261-0/+1
| | | | | | Add the compatible string for the upcoming Amlogic AXG SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* net: designware: add meson meson gxbb compatibleNeil Armstrong2018-11-261-0/+1
| | | | | | Add the compatible string for the Amlogic GXBB SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* net: designware: Add reset ctrl to driverLey Foon Tan2018-07-091-0/+8
| | | | | | | | | | | | | Add code to reset all reset signals as in Ethernet DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: set the PS bit when resetting DMA bus in MII configurationQuentin Schulz2018-06-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block, the DMA reset never succeeds when a MII PHY is used (no problem with a GMII PHY). The designware_eth_init() function sets the DMAMAC_SRST bit in the DMA_BUS_MODE register, and then polls until this bit clears. When a MII PHY is used, with the current driver, this bit never clears and the driver therefore doesn't work. The reason is that the PS bit of the GMAC_CONTROL register should be correctly configured for the DMA reset to work. When the PS bit is 0, it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells the MAC we have a MII PHY. Doing a DMA reset clears all registers, so the PS bit is cleared as well. This makes the DMA reset work fine with a GMII PHY. However, with MII PHY, the PS bit should be set. We have identified this issue thanks to two SPEAr600 platform: - One equipped with a GMII PHY, with which the existing driver was working fine. - One equipped with a MII PHY, where the current driver fails because the DMA reset times out. Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-271-2/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* NET: designware: fix clock enableEugeniy Paltsev2018-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | After commit ba1f966725223 ("net: designware: add clock support") we got NET broken on axs101 and axs103 platforms. Some clock don't support gating so their clock drivers don't implement .enable/.disable callbacks. In such case clk_enable returns -ENOSYS. Also some clock drivers implement .enable/.disable callbacks not for all clock IDs and return -ENOSYS (or -ENOTSUPP) for others. If we have such clock in 'clocks' list of designware ethernet controller node we fail to probe designware ethernet. Fix it. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* net: designware: Pad small packetsFlorian Fainelli2018-01-151-0/+5
| | | | | | | | Make sure that we pad small packets to a minimum length of 60 bytes (without FCS). This is necessary to interface with Ethernet switches that will reject RUNT frames unless padded correctly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* net: designware: add clock supportPatrice Chotard2018-01-151-0/+43
| | | | | | | | | | This implementation manages several clocks, disable and free all of them in case of error during probe and in remove callback. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Convert to livetreePhilipp Tomsich2017-09-181-8/+3
| | | | | | | | | Update the Designware Ethernet MAC driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* rockchip: net: dm: convert fdt_get to dev_readPhilipp Tomsich2017-07-111-4/+3
| | | | | | | | | | | | With the new dev_read functions available, we can convert the rockchip architecture-specific drivers and common drivers used by these devices over to the dev_read family of calls. This covers the Gigabit Ethernet MAC (i.e. common designware driver and rockchip-specific wrapper). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: designware: Add phy supply supportJacob Chen2017-06-021-0/+17
| | | | | | Some board need a regulator for gmac phy, so add this code to handle it. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* dm: Rename dev_addr..() functionsSimon Glass2017-06-011-1/+1
| | | | | | | | | | | | | | | | | | | These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2017-02-091-0/+1
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| * net: designware: Fix for use with current Linux device tree for Meson GXHeiner Kallweit2017-02-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Uboot for Meson GX the compatible string in meson-gxbb.dtsi so far is: compatible = "amlogic,meson6-dwmac", "snps,dwmac"; On Linux in the same dt file it's compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; To avoid breaking ethernet with the next DT synch from Linux to U-Boot (planned as prerequisite for adding Meson GX MMC driver to U-Boot) add "amlogic,meson-gx-dwmac" to the compatibility list in the designware driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: core: Replace of_offset with accessorSimon Glass2017-02-081-4/+5
|/ | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: stm32: add designware mac glue code for stm32Michael Kurz2017-01-281-0/+1
| | | | | | | | This patch adds glue code required for enabling the designware mac on stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Export the operation functionsSimon Glass2017-01-111-10/+9
| | | | | | | | | Export all functions so that drivers can use them, or not, as the need arises. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Split the link init into a separate functionSimon Glass2017-01-111-2/+24
| | | | | | | | | | With rockchip we need to make adjustments after the link speed is set but before enabling received/transmit. In preparation for this, split these two pieces into separate functions. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Adjust dw_adjust_link() to return an errorSimon Glass2017-01-111-4/+8
| | | | | | | | This function can fail, so return the error if there is one. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: designware: Export various functions/struct to allow subclassingSjoerd Simons2017-01-111-3/+3
| | | | | | | | | | | To allow other DM drivers to subclass the designware driver various functions and structures need to be exported. Export these. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Romain Perier <romain.perier@collabora.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* meson: odroid-c2: enable Ethernet support through the device treeBeniamino Galvani2016-09-061-0/+1
| | | | | | | | Remove the device definition from board file, update the driver with the new compatible property and update config with necessary options. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: designware: Make driver independent from DM_GPIO againAlexey Brodkin2016-07-061-2/+8
| | | | | | | | | | | | | | | | | | | | | | | Commit 90b7fc924adf "net: designware: support phy reset device-tree bindings" made DW GMAC driver dependent on DM_GPIO by unconditional usage of purely DM_GPIO stuff like: * dm_gpio_XXX() * gpio_request_by_name() But since that driver as of today might be easily used without DM_GPIO (that's the case for Synopsys AXS10x boards) we're shielding all DM_GPIO things by ifdefs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-05-271-6/+70
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| * net: designware: support phy reset device-tree bindingsSjoerd Simons2016-05-271-6/+70
| | | | | | | | | | | | | | | | | | Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: designware: fix descriptor layout and warnings on 64-bit archsBeniamino Galvani2016-05-271-27/+32
|/ | | | | | | | | | | | | All members of the DMA descriptor must be 32-bit, even on 64-bit architectures: change the type to u32 to ensure this. Also, fix other warnings. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Use phys_addr_t not unsigned long long to test that we're within DMA'able memory] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: designware: Use dm_pci_mem_to_phys() in the probe routineBin Meng2016-02-051-3/+1
| | | | | | | Convert to use native DM PCI API dm_pci_mem_to_phys(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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