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* net: ldpaa_eth: Include device_compat.hSean Anderson2020-10-151-7/+7
| | | | | | Necessary for dev_xxx. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellWIP/14Oct2020Tom Rini2020-10-1428-0/+11149
|\ | | | | | | | | | | | | | | | | | | | | - Octeon TX: Add NAND driver (Suneel) - Octeon TX: Add NIC driver driver (Suneel) - Octeon TX2: Add NIC driver driver (Suneel) - Armada 8040: Add iEi Puzzle-M80 board support (Luka) - Armada A37xx SPI: Add support for CS-GPIO (George) - Espressobin: Use Linux model/compatible strings (Andre) - Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre) - Armada A37xx: Small cleanup of config header (Pali)
| * net: Add NIC controller driver for OcteonTX2Suneel Garapati2020-10-1416-0/+4493
| | | | | | | | | | | | | | | | | | Adds support for Network Interface controllers found on OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: Add NIC controller driver for OcteonTXSuneel Garapati2020-10-1414-0/+6656
| | | | | | | | | | | | | | | | | | Adds support for Network Interface controllers found on OcteonTX SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
* | net: e1000: add defaults for i210 TX/RX PBSIZEChristian Gmeiner2020-10-142-0/+11
|/ | | | | | | | | | | | | | | | | Set the defaults on probe for the packet buffer size registers for the i210. The TX/RX PBSIZE register of the i210 resets to its default value only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5 chapter 8.3 'Internal Packet Buffer Size Registers'. If something (another driver, another OS, etc.) modifies this register from its default value, the e1000 driver doesn't function correctly. It detects a hang of the transmitter and continuously resets the adapter. Here we set this value to its default when resetting the i210 to resolve this issue. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay2020-10-061-1/+2
| | | | | | | | | | | | | | | | | | | The cell_count argument is required when cells_name is NULL. This patch adds this parameter in live tree API - of_count_phandle_with_args - ofnode_count_phandle_with_args - dev_count_phandle_with_args This parameter solves issue when these API is used to count the number of element of a cell without cell name. This parameter allow to force the size cell. For example: count = dev_count_phandle_with_args(dev, "array", NULL, 3); Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'next'Tom Rini2020-10-0525-167/+2976
|\ | | | | | | | | | | | | Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
| * Revert "net: smc911x: Automatically Update ethaddr with MAC"Tom Rini2020-10-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | Upon further discussion on the mailing list, we should not get in the situation where the generic code path to set ethaddr/etc correctly does not work. Revert this until someone can further debug the smc911x driver regarding this issue. This reverts commit 387cbf096e443705fa66776027273ed257ec6ca3. Signed-off-by: Tom Rini <trini@konsulko.com>
| * Merge branch 'next' of git://git.denx.de/u-boot-sh into nextTom Rini2020-10-011-2/+0
| |\
| | * net: ravb: Remove writeext function callBiju Das2020-09-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The micrel phy driver is already configuring this values from device tree. So remove the redundant phy configuration call from this driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * | net: dwc_eth_qos: Convert to use APIs which support live DTPatrick Delaunay2020-09-301-4/+3
| | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: smc911x: Automatically Update ethaddr with MACAdam Ford2020-09-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethernet controller can read the MAC from EEPROM and display it, but if ethaddr is not set, the ethernet is still unavailable. This patch checks will automatically set the MAC address if it has not already been set. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: ftgmac100: Add support for board specific PHY interface addressThirupathaiah Annapureddy2020-09-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ftgmac100 driver is using hard-coded PHY interface address of zero. Each board can have different PHY interface address (phy_addr). This commit modifies the driver to make use of board specific address by leveraging CONFIG_PHY_ADDR. Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
| * | net: phy: mscc: sync rx/tx delay settings with Linux on vsc85xxHeiko Stuebner2020-09-301-24/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux kernel does set the clock delays to - 0.2 ns (their default, and lowest, hardware value) if delays should not be enabled - 2.0 ns (which causes the data to be sampled at exactly half way between clock transitions at 1000 Mbps) if delays should be enabled depending on the interface mode See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/mscc/mscc_main.c#n523 So instead of using arbitrary delay values like now, mimic this behaviour. The behaviour is the same for all of vsc8530/8531/8540/8541 so move that to a shared function while at it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | net: phy: mscc: make clock-output configurable on vsc85xxHeiko Stuebner2020-09-301-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vsc8530/8531/8540/8541 phys have a configurable clock output that can emit 25, 50 and 125 MHz rates, which in turn may be needed for stable network connections. This follows a similar change introduced into the Linux kernel at https://lore.kernel.org/netdev/20200609133140.1421109-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | net: ti: cpsw: Fix not calling dev_dbg with a deviceSean Anderson2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | Without DM_ETH, cpsw_priv.dev is an eth_device. Just use its name instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: sun8i_emac: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | Pass a udevice into a few functions so `dev` is defined. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: sunxi: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | There's no dev to log with, so pass the device along with the priv data. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: mvpp2: Convert netdev_xxx to dev_xxxSean Anderson2020-09-301-31/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | netdev_xxx evaluates to printf in U-Boot, so there is no extra info printed. mvpp2 one of only two drivers which use these functions in U-Boot. Convert these functions to dev_xxx where possible (and to log_xxx where not). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: mvpp2: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | Remove some prefixes, or get the device from the phy. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: mvneta: Convert netdev_xxx to dev_xxxSean Anderson2020-09-301-24/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | netdev_xxx evaluates to printf in U-Boot, so there is no extra info printed. mvneta is one of two drivers which use these functions in U-Boot. Convert these functions to dev_xxx where possible (and to log_xxx where not). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: mvneta: Fix not always calling dev_err with a deviceSean Anderson2020-09-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | No need for indirection here. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | net: bcm6368: Fix not calling dev_info with a deviceSean Anderson2020-09-301-2/+1
| |/ | | | | | | | | | | | | Remove the pdev indirection. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * Merge tag 'xilinx-for-v2021.01' of ↵WIP/24Sep2020-nextTom Rini2020-09-242-18/+40
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
| | * net: xilinx: axi_emac: Typecast flush_cache argumentsAshok Reddy Soma2020-09-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_cache() arguments are not type casted to take care of 64 bit systems. Use phys_addr_t to type cast for it to work properly for 32 bit and 64 bit systems. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
| | * net: xilinx: axi_emac: Fix dma descriptors for 64bit and compilation warningsAshok Reddy Soma2020-09-231-12/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are compilation warnings showing up when we compile AXI ethernet driver for 64bit architectures. Fix them, so that it works on both 32 and 64 bit architectures. DMA descriptors are not taking care of 64bit addresses. To fix it, change axidma_bd members as below: next ==> next_desc reserverd1 ==> next_desc_msb phys ==> buf_addr reserverd2 ==> buf_addr_msb and update next_desc and buf_addr with lower 32 bits of the addresses, update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit addresses. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
| | * net: gem: Add support for more PHYs on MDIO busMichal Simek2020-09-231-0/+10
| | | | | | | | | | | | | | | | | | | | | Find out MDIO bus and enable MDIO access to it if this is done via different GEM controller. Only works across GEM instances. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | net: tsec: Add the compatible string "gianfar" supportHou Zhiqiang2020-09-241-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatible string "gianfar" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: tsec: Add fixed-link PHY supportHou Zhiqiang2020-09-241-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The info of fixed-link PHY is described in DT node instead of getting from MII, so detect the fixed-link PHY DT node first, if it doesn't exist then probe the MII. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: tsec: convert to use DM_MDIO when DM_ETH enabledHou Zhiqiang2020-09-241-33/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the platforms on which the eTSEC driver uses DM_ETH, convert its MDIO controller code to also use DM_MDIO. Note that for handling the TBI PHY (the MAC PCS for SGMII), we still don't register a udevice for it, since we can drive it locally and there is no point in doing otherwise. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Reworked to fix gazerbeam config] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: fsl_mdio: Correct the MII management register block addressHou Zhiqiang2020-09-241-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MII management register block offset is different between gianfar and etsec2 compatible devices, this patch is to fix this issue by adding driver data for different compatible string. Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: fsl_mdio: Change to use virtual addressHou Zhiqiang2020-09-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use virtual address to access the MII block registers instead of physical address. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | phy: make phy_connect_fixed work with a null mdio busVladimir Oltean2020-09-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is utterly pointless to require an MDIO bus pointer for a fixed PHY device. The fixed.c implementation does not require it, only phy_device_create. Fix that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | Merge branch 'master' into nextTom Rini2020-09-211-9/+11
| |\ \ | | |/ | | | | | | Merge in v2020.10-rc5
| * | net, qe: add DM support for QE UEC ethernetHeiko Schocher2020-09-1710-0/+2688
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add DM/DTS support for the UEC ethernet on QUICC Engine Block. Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com> Series-changes: 3 - revert: commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled") as now qe works with DM and DM_ETH support. - fix mailaddress from Holger Series-changes: 2 - add comments from Qiang Zhao: - add device node documentation - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c because using drivers/net/fsl_mdio.c leads in none existent udevice mdio@3320 instead boards with DM ETH support should use now this driver. - remove RFC tag Commit-notes: - I let the old none DM based implementation in code so boards should work with old implementation. This Code should be removed if all boards are converted to DM/DTS. - add the DM based qe uec driver under drivers/net/qe - Therefore copied the files uccf.c uccf.h uec.h from drivers/qe. So there are a lot of Codingstyle problems currently. I fix them in next version if this RFC patch is OK or it needs some changes. - The dm based driver code is now under drivers/net/qe/dm_qe_uec.c Used a lot of functions from drivers/qe/uec.c - seperated the PHY specific code into seperate file drivers/net/qe/dm_qe_uec_phy.c END
* | | net: pfe_eth: Remove non-DM code check from pfe_spi_flash_initKuldeep Singh2020-09-241-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DM_SPI_FLASH is only supported now with passing of driver conversion deadline from non-DM to DM model. Hence, it's safe to remove non-DM code check from pfe_spi_flash_init. Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of reading reading values from DT. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | net: pfe_eth: Fix resoure leak in pfe_spi_flash_initKuldeep Singh2020-09-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix Coverity issue: RESOURCE_LEAK. leaked_storage: Variable addr going out of scope leaks the storage it points to. Fixes: e0152dbed683 ("net: pfe_eth: Use spi_flash_read API to access flash memory") Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | driver: net: fm: add support for XFIMadalin Bucur2020-09-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | All the 10G ports that were working in XFI mode were described as using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time). Add the minimal changes required for the FMan code to support XFI. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ls1012a, pfe_eth: Update probe to avoid resource leakChaitanya Sakinam2020-09-241-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | PFE DDR addresses are now stored on to a stack varaiable rather dynamic allocation. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ls1012a, pfe_eth: correction in delay implementationChaitanya Sakinam2020-09-241-2/+3
| | | | | | | | | | | | | | | | | | | | | correction in delay implementation before we exit out of tx timeout. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | drivers: net: phy: Use Aquantia driver for AQR113CMadalin Bucur2020-09-241-0/+15
| | | | | | | | | | | | | | | | | | | | | Add support for AQR113C PHY Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabledGrigore Popescu2020-09-241-2/+2
| |/ |/| | | | | | | | | | | | | | | | | The next DPMAC was always verified if it is enabled. In case of DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will be considered disabled and not detected by uboot. Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | bcmgenet: Add support for rgmii-rxidJason Wessel2020-09-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII") needed to be extended for the case of using the rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the 5.4 now specify the rgmii-rxid. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* | bcmgenet: fix DMA buffer managementJason Wessel2020-09-081-8/+9
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fixes a serious issue occurring when several network commands are run on a raspberry pi 4 board: for instance a "dhcp" command and then one or several "tftp" commands. In this case, packet recv callbacks were called several times on the same packets, and send function was failing most of the time. note: if the boot procedure is made of a single network command, the issue is not visible. The issue is related to management of the packet ring buffers (producer / consumer) and DMA. Each time a packet is received, the ethernet device stores it in the buffer and increments an index called RDMA_PROD_INDEX. Each time the driver outputs a received packet, it increments another index called RDMA_CONS_INDEX. Between each pair of network commands, as part of the driver 'start' function, previous code tried to reset both RDMA_CONS_INDEX and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from driver side, thus its value was actually not updated, and only RDMA_CONS_INDEX was reset to 0. This was resulting in a major synchronization issue between the driver and the device. Most visible behavior was that the driver seemed to receive again the packets from the previous commands (e.g. DHCP response packets "received" again when performing the first TFTP command). This fix consists in setting RDMA_CONS_INDEX to the same value as RDMA_PROD_INDEX, when resetting the driver. The same kind of fix was needed on the TX side, and a few variables had to be reset accordingly (c_index, tx_index, rx_index). The rx_index and tx_index have only 256 entries so the bottom 8 bits must be masked off. Originated-by: Etienne Dublé <etienne.duble@imag.fr> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
* xilinx: kconfig: Change Kconfig dependencies for Xilinx driversMichal Simek2020-08-201-3/+3
| | | | | | | | | Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* net: dwc_eth_qos: add Kconfig option to select supported configurationPatrick Delaunay2020-08-042-6/+33
| | | | | | | | | | | | | | | Add configuration flag to select the supported dwc driver configuration: - CONFIG_DWC_ETH_QOS_TEGRA186 - CONFIG_DWC_ETH_QOS_IMX - CONFIG_DWC_ETH_QOS_STM32 See Linux driver ethernet/stmicro/stmmac and associated glue layers for other configuration examples. This patch removes the not-selected compatibles and lets the linker remove the unused functions to reduce the size of the driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* net: Drop duplicate include of dm.h in pcnet.cSimon Glass2020-08-031-1/+0
| | | | | | This file includes the header twice. Drop the second one. Signed-off-by: Simon Glass <sjg@chromium.org>
* eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driverMarkLee2020-07-282-1/+3
| | | | | | | | | The sgmii mode init flow is almost the same for all mediatek SoC, the only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028 in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629 and the following chips). Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
* Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to KconfigAdam Ford2020-07-281-0/+6
| | | | | | | This converts the following to Kconfig: CONFIG_DRIVER_TI_EMAC_USE_RMII Signed-off-by: Adam Ford <aford173@gmail.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqWIP/27Jul2020Tom Rini2020-07-272-2/+45
|\ | | | | | | | | | | | | | | - Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
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