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* Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-nextTom Rini2021-01-051-1/+1
|\ | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| * dm: core: Access device ofnode through functionsSimon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-051-1/+1
|\ \ | |/ |/| | | | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * treewide: Update email address Patrick Delaunay and Patrice ChotardPatrice Chotard2020-12-091-1/+1
| | | | | | | | | | | | | | | | Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-1/+1
| | | | | | | | | | | | Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-132-2/+2
| | | | | | | | | | | | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1328-32/+32
|/ | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* phy: stm32: usbphyc: manage optional vbus regulator on phy_power_on/offPatrick Delaunay2020-11-251-10/+23
| | | | | | | | This patch adds support for optional vbus regulator. It is managed on phy_power_on/off calls and may be needed for host mode. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* phy: meson-g12a-usb2: fix the potential build warningJaehoon Chung2020-11-121-2/+2
| | | | | | | Fix the potential build warning. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: marvell: cp110: update mode parameter for pcie power on callsIgal Liberman2020-10-291-2/+5
| | | | | | | | | | | | | It helps ATF to determine who called power on function (U-boot/Linux). The corresponding ATF code was added in this commit: mvebu: cp110: avoid pcie power on/off sequence when called from Linux https://github.com/ARM-software/arm-trusted-firmware/commit/55df84f974ea37abbb4f93f000f101f70cda5303 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* phy: marvell: cp110: let the firmware configure comphy for PCIeGrzegorz Jaszczyk2020-10-291-439/+12
| | | | | | | | | | Replace the comphy initialization for PCIe with appropriate SMC call, so the firmware will perform appropriate comphy initialization. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* phy: marvell: cp110: let the firmware configure the comphyGrzegorz Jaszczyk2020-10-291-727/+89
| | | | | | | | | | | | | | | Replace all comphy initialization with appropriate smc calls. It will result with triggering synchronous exception that is handled by Secure Monitor code in EL3. Then the Secure Monitor code will dispatch each smc call (by parsing the smc function identifier) and triggers appropriate comphy initialization. This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI interfaces. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Igal Liberman <igall@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* phy: nop-phy: add clk bulkPeng Fan2020-10-231-0/+35
| | | | | | Add clk bulk for nop-phy driver. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* phy: Include device_compat.hSean Anderson2020-10-151-1/+1
| | | | | | Necessary for dev_xxx. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* Merge tag 'ti-v2021.01-rc1' of ↵Tom Rini2020-10-121-3/+8
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Minor cleanup on K3 env variables - Fix OSPI compatible for J721e - Drop unused property in omap-usb2-phy - Update Maintainer for am335x-guardian board.
| * phy: omap-usb2-phy: Drop usage of "ti, dis-chg-det-quirk" DT propertyVignesh Raghavendra2020-10-121-3/+8
| | | | | | | | | | | | | | | | | | "ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding documentation. Therefore drop this and instead use soc_device_match() to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel driver. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* | Merge tag 'dm-pull-6oct20' of git://git.denx.de/u-boot-dmWIP/06Oct2020Tom Rini2020-10-061-1/+1
|\ \ | | | | | | | | | | | | | | | bloblist enhancement for alignment Update ofnode/dev_read phandle function sandbox keyboard enhancements and fixes
| * | dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay2020-10-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cell_count argument is required when cells_name is NULL. This patch adds this parameter in live tree API - of_count_phandle_with_args - ofnode_count_phandle_with_args - dev_count_phandle_with_args This parameter solves issue when these API is used to count the number of element of a cell without cell name. This parameter allow to force the size cell. For example: count = dev_count_phandle_with_args(dev, "array", NULL, 3); Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini2020-10-063-221/+2
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
| * | phy: meson-gxl-usb: depend on Meson AXG aswellNeil Armstrong2020-10-051-1/+1
| | | | | | | | | | | | | | | | | | Enable build of meson-gxl-usb PHY for the AXG architecture aswell. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | phy: meson-gxl: remove invalid USB3 PHY driverNeil Armstrong2020-10-052-220/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The registers which are managed by the meson-gxl-usb3 PHY driver are actually "USB control" registers (which are "glue" registers which manage OTG detection and routing of the OTG capable port between the DWC2 peripheral-only controller and the DWC3 host-only controller). Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb driver supports the USB control registers on GXL and GXM SoCs (these were previously managed by the meson-gxl-usb3 PHY driver). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | phy: add support for stingray PAXB PHY controllerSrinath Mannam2020-09-303-0/+185
| | | | | | | | | | | | | | | | | | Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: usbphyc: Fix not calling dev_err with a deviceSean Anderson2020-09-301-1/+1
| | | | | | | | | | | | | | | | | | Use the phy's device. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
* | phy: ti: Fix not calling dev_err with a deviceSean Anderson2020-09-301-2/+2
| | | | | | | | | | | | | | `phy` doesn't exist; we need to use `x` instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
* | phy: sun4i-usb: Fix not calling dev_err with a deviceSean Anderson2020-09-301-4/+8
| | | | | | | | | | | | | | This uses phy's device Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
* | phy: rockchip: Fix not calling dev_err with a deviceSean Anderson2020-09-302-10/+10
| | | | | | | | | | | | | | | | Get the device from phy, or pass the phy in. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
* | phy: marvell: Fix not calling dev_err with a deviceSean Anderson2020-09-301-3/+3
| | | | | | | | | | | | | | No need for indirection here. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge branch '2020-09-14-generic-phy-error-trace' into nextWIP/21Sep2020-nextTom Rini2020-09-211-5/+40
|\ \ | | | | | | | | | - Add error tracing messages to the generic PHY infrastructure
| * | phy: generic: add error trace to detect PHY issue in uclassPatrick Delaunay2020-09-081-5/+40
| |/ | | | | | | | | | | | | Add an error trace for PHY errors directly in generic phy functions provided by PHY uclass. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | phy: add driver for Qualcomm IPQ40xx USB PHYRobert Marko2020-09-183-0/+152
|/ | | | | | | | Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
* phy: marvell: a3700: add sata comphy on lane 2 with invert optionzachary2020-09-041-19/+14
| | | | | | | | | | | | | | | | - This patch moves sata phy powerup from dedicate phy to compphy and adds invert option for sata powerup routine. Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90 Signed-off-by: zachary <zhangzg@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/53601 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: Igal Liberman <igall@marvell.com> [a.heider: adapt to mainline] Signed-off-by: Andre Heider <a.heider@gmail.com> Tested-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
* phy: mtk-tphy: make shared reg optional for v1Frank Wunderlich2020-08-241-3/+2
| | | | | | | | make the shared reg optional when version is v1 for sata Suggested-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
* sandbox: phy: add driver_data for bind test cmdPatrice Chotard2020-08-221-1/+17
| | | | | | | | | | | | | | Add driver data to existing compatible string "sandbox,phy". Add an additional compatible string without driver_data This will verify that bind command parses, finds and passes the correct driver data to device_bind_with_driver_data() by using driver_data in the second sandbox_phy_ids table entry. In sandbox_phy_bind() a check is added to validate driver_data content. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* phy: mtk-tphy: add PHY_TYPE_SATAFrank Wunderlich2020-08-191-0/+105
| | | | | | | add support for PHY_TYPE_SATA to Mediateks TPHY driver Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
* phy: usbphyc: use regulator_set_enable_if_allowed for disabling vdd supplyPatrick Delaunay2020-07-281-1/+1
| | | | | | | | | | | | | | Use regulator_set_enable_if_allowed() api instead of regulator_set_enable() while disabling vdd supply. This way the driver doesn't see an error when disabling an always-on regulator. This patch is needed since the commit f93fab312615 ("Revert 'power: regulator: Return success on attempt to disable an always-on regulator'") and use the API introduced by commit cc4a224af226 ("power: regulator: Introduce regulator_set_enable_if_allowed api"). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* phy: Add Rockchip PCIe PHY driverJagan Teki2020-07-223-0/+279
| | | | | | | | Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* phy: omap-usb2-phy: disable phy charger detectBin Liu2020-06-161-5/+28
| | | | | | | | | | | | | AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node to enable this workaround for AM654x PG1.0. Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2020-06-031-2/+4
|\ | | | | | | | | - H6 emac support - USB PHY H6 logic alignment
| * phy: sun4i-usb: Align H6 initialization logic with the kernelRoman Stratiienko2020-06-011-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | H6 SOC needs additional initialization of PHY registers. Corresponding changes can be found in the kernel patch [1]. Without this changes there is no enumeration of 'musb' gadget. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79 Fixes: 35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6") Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | phy: rockchip: Add Rockchip USB TypeC PHY driverJagan Teki2020-05-293-0/+804
| | | | | | | | | | | | | | | | | | | | | | | | Add USB TYPEC PHY driver for rockchip platform. Referenced from Linux TypeC PHY driver, currently supporting usb3-port and dp-port need to add it in the future. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | phy: rockchip: Add Rockchip USB2PHY driverJagan Teki2020-05-294-0/+333
|/ | | | | | | | | | | | | | Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* phy: Fix possible NULL pointer deferenceVignesh Raghavendra2020-05-251-5/+5
| | | | | | | | | | | It is possible that users of generic_phy_*() APIs may pass a valid struct phy pointer but phy->dev can be NULL, leading to NULL pointer deference in phy_dev_ops(). So call generic_phy_valid() to verify that phy and phy->dev are both valid. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.hSimon Glass2020-05-1812-0/+12
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-1815-0/+15
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-1816-0/+16
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop image.h from common headerSimon Glass2020-05-181-1/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* phy: Use _nodev naming convention if non-device clientsJagan Teki2020-05-111-2/+2
| | | | | | | | | | | | | | | | | | | Clients that are requesting some of uclass API's without a device (with ofnode) usually have _nodev naming convention. - clk_get_by_index_nodev - clk_get_by_name_nodev - reset_get_by_index_nodev - gpio_request_by_name_nodev So, update the same naming convention PHY framework. This doesn't change the existing functionality. Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* phy: phy-mtk-tphy: add a new reference clockChunfeng Yun2020-05-021-3/+18
| | | | | | | | | | | | Usually the digital and analog phys use the same reference clock, but some platforms have two separate reference clocks for each of them, so add another optional clock to support them. In order to keep the clock names consistent with PHY IP's, change the da_ref for analog phy and ref clock for digital phy. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
* phy: phy-mtk-tphy: add support new versionChunfeng Yun2020-05-021-5/+63
| | | | | | | | The new version removes all shared banks between multi-phys Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
* phy: phy-mtk-tphy: add support USB physChunfeng Yun2020-05-021-9/+218
| | | | | | | | Support USB2 and USB3 PHY with shared banks when support multi-phys Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
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