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* Merge tag 'ti-v2021.07-rc1' of ↵Tom Rini2021-04-181-60/+414
|\ | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-ti - Support for pinmux status command on beaglebone - Updates for MMC speed modes for J721e-evm - Fix MMC booting on omap35_logic_somlv board
| * test: pinmux: add test for 'pinctrl-single' driverDario Binacchi2021-04-121-0/+31
| | | | | | | | | | | | | | | | | | | | | | The test adds two pinmux nodes to the device tree, one to test when a register changes only one pin's mux (pinctrl-single,pins), and the other to test when more than one pin's mux is changed (pinctrl-single,bits). This required replacing the controller's register access functions when the driver is used on sandbox. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: add get_pin_muxing operationDario Binacchi2021-04-121-9/+213
| | | | | | | | | | | | | | | | | | | | | | | | It allows to display the muxing of a given pin. Inspired by more recent versions of the Linux driver, in addition to the address and the value of the configuration register I added the pin function retrieved from the DT. In doing so, the information displayed does not depend on the platform, being a generic type driver, and it can be useful for debug purposes. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: add get_pin_name operationDario Binacchi2021-04-121-0/+16
| | | | | | | | | | | | | | It returns the name of the requested pin. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: add get_pins_count operationDario Binacchi2021-04-121-0/+37
| | | | | | | | | | | | | | It returns the number of selectable pins. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: add register access functionsDario Binacchi2021-04-121-25/+46
| | | | | | | | | | | | | | | | | | The configuration of pinmux registers was implemented with duplicate code which can be removed by adding two functions for read/write access. Access to 8-bit registers has also been added. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: change function mask default valueDario Binacchi2021-04-121-2/+10
| | | | | | | | | | | | | | | | | | | | The patch is inspired by more recent versions of the Linux driver. Replacing the default value 0xffffffff of the function mask with 0 is certainly more conservative in case the "pinctrl-single,function-mask" DT property is missing. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: check "register-width" DT propertyDario Binacchi2021-04-121-3/+7
| | | | | | | | | | | | | | | | | | | | In more recent versions of the Linux kernel the driver's probe function returns an error if the "pinctrl-single,register-width" DT property is missing. The lack of this information, in fact, does not allow to know whether to access the registers of the controller at 8, 16, ... bits. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * pinctrl: single: get register area size by device APIDario Binacchi2021-04-121-6/+8
| | | | | | | | | | | | | | Use dev_read_addr_size to get size of the controller's register area. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * pinctrl: single: fix debug messages formattingDario Binacchi2021-04-121-2/+2
| | | | | | | | | | | | | | | | | | | | The dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); prints the 'reg' address preceded by the prefix 0x0x instead of 0x. This because the printf '%pa' format specifier already prepends the prefix '0x' to the address displayed. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * pinctrl: single: fix offset managementDario Binacchi2021-04-121-10/+14
| | | | | | | | | | | | | | | | | | | | | | The pinmux configuration DT node of a peripheral does not define a physical address but an offset. Only by adding it to the base address of the controller it is possible to calculate the physical address of the register to be configured. Printing an offset also requires a different formatting option than a physical address. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * pinctrl: single: fix the loop counter variable typeDario Binacchi2021-04-121-4/+4
| | | | | | | | | | | | | | | | | | | | The 'n' variable is used as a loop counter, not as a physical address, and is used in a comparison with an int. So it makes sense to change its type from phys_addr_t to int. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * pinctrl: single: fix format of structure documentationDario Binacchi2021-04-121-9/+36
| | | | | | | | | | | | | | U-Boot adopted the kernel-doc annotation style. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
* | pinctrl: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-4/+6
| | | | | | | | | | | | | | | | | | | | Update the code to use -ENOSYS, which is the correct error code for an unimplemented system call in U-Boot. Also we should not check for a missing operations array as this is not permitted. For now this can be covered by an assert(). Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'u-boot-atmel-2021.07-a' of ↵WIP/30Mar2021-nextTom Rini2021-03-301-3/+23
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.07 cycle: This small feature set includes the implementation of the slew rate for the PIO4 pin controller device, and a fix for arm926ejs-based microprocessors that avoids a crash.
| * | pinctrl: at91-pio4: add support for slew-rateClaudiu Beznea2021-03-021-3/+23
| |/ | | | | | | | | | | | | | | | | SAMA7G5 supports slew rate configuration. Adapt the driver for this. For switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
* | pinctrl: mt7629: add jtag function and pin groupWeijie Gao2021-03-201-0/+7
| | | | | | | | | | | | | | The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin group to the pinctrl driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | pinctrl: mediatek: do not probe gpio driver if not enabledWeijie Gao2021-03-201-4/+8
| | | | | | | | | | | | | | | | | | | | | | The mtk pinctrl driver is a combination driver with support for both pinctrl and gpio. When this driver is used in SPL, gpio support may not be enabled, and this will result in a compilation error. To fix this, macros are added to make sure gpio related code will only be compiled when gpio support is enabled. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrlSam Shih2021-03-201-0/+14
| | | | | | | | | | | | This patch add get_pin_muxing support for mediatek pinctrl drivers Signed-off-by: Sam Shih <sam.shih@mediatek.com>
* | pinctrl: mediatek: fix wrong assignment in mtk_get_pin_nameSam Shih2021-03-201-1/+1
| | | | | | | | | | | | | | This is a bug fix for mtk pinctrl common part. Appearently pins should be used instead of grps in mtk_get_pin_name(). Signed-off-by: Sam Shih <sam.shih@mediatek.com>
* | pinctrl: renesas: Add support for R8A774C0Lad Prabhakar2021-03-164-0/+23
| | | | | | | | | | | | | | | | | | | | | | Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* | pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.11Lad Prabhakar2021-03-161-2/+85
| | | | | | | | | | | | | | Sync the R8A77990 SoC PFC tables with Linux 5.11 , commit f40ddce88593. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* | dm: gpio: Add a way to update flagsSimon Glass2021-03-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is convenient to be able to adjust some of the flags for a GPIO while leaving others alone. Add a function for this. Update dm_gpio_set_dir_flags() to make use of this. Also update dm_gpio_set_value() to use this also, since this allows the open-drain / open-source features to be implemented directly in the driver, rather than using the uclass workaround. Update the sandbox tests accordingly. This involves a lot of changes to dm_test_gpio_opendrain_opensource() since we no-longer have the direciion being reported differently depending on the open drain/open source flags. Also update the STM32 drivers to let the uclass handle the active low/high logic. Drop the GPIOD_FLAGS_OUTPUT() macro which is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | dm: gpio: Rename get_dir_flags() method to get_flags()Simon Glass2021-03-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more useful to be able to read all the flags, not just the direction ones. In fact this is what the STM32 driver does. Update the method name to reflect this. Tweak the docs a little and use 'flagsp' as the return argument, as is common in driver model, to indicate it returns a value. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
* | dm: gpio: Rename set_dir_flags() method to update_flags()Simon Glass2021-03-031-3/+3
|/ | | | | | | | | | | | The current method is a misnomer since it is also used (e.g. by stm32) to update pull settings and open source/open drain. Rename it and expand the documentation to cover a few more details. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-1519-0/+19
|\ | | | | | | - Merge the patch to take <asm/global_data.h> out of <common.h>
| * common: Drop asm/global_data.h from common headerWIP/2021-02-02-drop-asm_global_data-when-unusedSimon Glass2021-02-0219-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | pinctrl: stm32: bind only the enabled GPIO subnodePatrick Delaunay2021-02-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bind only the enabled GPIO subnode, to avoid to probe the node "gpio-controller" present in SOC dtsi (disabled by default) but not enabled in the included pincontrol dtsi file. For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent: gpioj: gpio@5000b000 gpiok: gpio@5000c000 Then these GPIO are absent in output of command "dm tree" and "gpio status -a" Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | pinctrl: stm32: correct management pin display of OTYPEPatrick Delaunay2021-02-091-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OTYPE can be used for output or for alternate function to select PP = push-pull or OP = open-drain mode, according reference manual (Table 81. Port bit configuration table). This patch removes this indication for input pins and adds it for AF and output pins for pinmux command output. Fixes: b305dbc08b08 ("pinctrl: stm32: display bias information for all pins") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | pinctrl: stmfx: Use PINNAME_SIZE for pin's name sizePatrice Chotard2021-02-091-4/+3
| | | | | | | | | | | | | | | | Instead of redefining a pin's name size, use PINNAME_SIZE defined in include/dm/pinctrl.h Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | pinctrl: stmfx: Fix pin configuration issuePatrice Chotard2021-02-091-4/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | pin-controller pin's name must be equal to pin's name used in device tree with "pins" DT property. Issue detected on stm32mp157c-ev1 board with goodix touchscreen. In DT, the goodix's pin is declared in DT with the node: goodix_pins: goodix { pins = "gpio14"; bias-pull-down; }; Whereas in stmfx pin-controller driver, pin's name are equal to "stmfx_gpioxx" where xx is the pin number. This lead to not configure stmfx's pins at probe because pins is identified by its name (see pinctrl_pin_name_to_selector() in pinctrl-generic.c) and stmfx pin "gpio14" can't be found. To fix this issue, come back to the original stmfx pin's name. Revert "pinctrl: stmfx: update pin name" This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini2021-01-253-0/+210
|\ | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
| * pinctrl: mtmips: add support for MediaTek MT7620 SoCWeijie Gao2021-01-243-0/+210
| | | | | | | | | | | | | | | | This patch adds pinctrl support for MediaTek MT7620 SoC. The MT7620 SoC supports only pinmux. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | Merge tag 'u-boot-atmel-2021.04-b' of ↵Tom Rini2021-01-251-3/+11
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features for 2021.04 cycle This feature set includes macb updates for all interfaces and new sama7g5 variant support; micrel ksz9031 DLL support; a new board from Giant based on Adafruit feather form factor which contains a SAMA5D27 SoC; several fixes regarding the NAND flash PMECC block; and pincontrol drive strength support for pio4 controller.
| * pinctrl: at91-pio4: implement drive strength supportEugen Hristev2021-01-221-0/+8
| | | | | | | | | | | | | | Implement drive strength support, by preserving the same bindings as in Linux. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * pinctrl: at91-pio4: convert to dev_read_propEugen Hristev2021-01-221-3/+3
| | | | | | | | | | | | | | | | | | Use dev_read_prop instead of using the fdt_read_property which reads from the GD struct's fdt. This way the node is accessed via the device config instead of the global struct, which makes code more portable and GD independent. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* | pinctrl: mediatek: correct error handlingHeinrich Schuchardt2021-01-181-0/+1
|/ | | | | | | | | | If no GPIO controller is found, the return value should not depend on a random value on the stack. Initialize variable ret. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
* pinctrl: renesas: Implement get_pin_muxing() callbackLad Prabhakar2021-01-181-0/+25
| | | | | | | | Implement get_pin_muxing() callback so that pinmux status command can be used on Renesas platforms. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: renesas: Make sure the pin type is updated after setting the MUXLad Prabhakar2021-01-181-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | By default on startup all the pin types are configured to PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated when the pin is set as a function in sh_pfc_pinctrl_pin_set() or sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if the pin type is PINMUX_TYPE_NONE ie unused). So with the current implementation pin functionality could be overwritten silently, for example if the same pin is added for SPI and serial. This patch makes sure of updating pin type after every successful call to sh_pfc_config_mux() and thus fixing from pin functionality to be overwritten. Also a warning message is printed if the current pin is being overwritten before abort. This also avoids pin re-muxing to same type that is for example from command line device is asked to re-probe/select (mmc dev x) we return early with success in this case as the pin is already muxed. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: stm32: migrate trace to log macroPatrick Delaunay2021-01-131-14/+16
| | | | | | | | | | Change debug to log macro and define LOG_CATEGORY. Remove "%s:" with __func__ as it is managed by log macro (CONFIG_LOGF_FUNC) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-nextTom Rini2021-01-058-28/+23
|\ | | | | | | | | | | | | | | | | Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
| * dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIASSimon Glass2021-01-053-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but in every other case we just use DM_. Update the alias macros to use the DM_ prefix. We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro is widely used and there is at least some benefit to indicating it us a U-Boot driver, particularly for code ported from Linux. So for now, let's keep that name. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Use dev_has_ofnode() instead of dev_of_valid()Simon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | We have two functions which do the same thing. Standardise on dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in normal operation: it is either null or missing. Also move the functions into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * dm: core: Rename dev_has_of_node() to dev_has_ofnode()Simon Glass2021-01-051-1/+1
| | | | | | | | | | | | | | We use 'ofnode' rather than 'of_node' in U-Boot. Rename this function to fit. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Move priv/plat structs to headersSimon Glass2021-01-051-12/+0
| | | | | | | | | | | | | | With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: pinctrl: Drop unlikely error messages from TPLSimon Glass2021-01-051-3/+8
| | | | | | | | | | | | | | | | | | These errors are only really for development purposes. Drop them to reduce the size of TPL. The error numbers are still reported. This reduces the TPL binary size on coral by about 160 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: apl: Reduce size for TPLSimon Glass2021-01-051-1/+3
| | | | | | | | | | | | | | | | | | | | Update various drivers to use of_match_ptr() and to avoid including debug strings in TPL. Omit the WiFi driver entirely, since it is not used in TPL. This reduces the TPL binary size by about 608 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * pinctrl: Drop post_bind() method when not neededSimon Glass2021-01-051-1/+3
| | | | | | | | | | | | This is not used with of-platdata, so remove it in that case. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Use access methods for dev/uclass private dataSimon Glass2021-01-052-5/+5
| | | | | | | | | | | | | | | | | | | | | | Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
| * x86: apl: Drop support for !OF_PLATDATA_PARENTSimon Glass2021-01-051-2/+0
| | | | | | | | | | | | | | This code was kept around after of-platdata started supporting parent devices. That feature seems stable now, so let's drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
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