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* Merge tag 'dm-pull-9jul19-take2' of ↵Tom Rini2019-07-112-5/+12
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm - Sandbox improvements including .dts refactor - Minor tracing and PCI improvements - Various other minor fixes - Conversion of patman, dtoc and binman to support Python 3
| * spi: Avoid using malloc() in a critical functionSimon Glass2019-07-101-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | In general we should avoid calling malloc() and free() repeatedly in U-Boot lest we turn it into tianocore. In SPL this can make SPI flash unusable since free() is often a nop and allocation space is limited. In any case, these seems no need for malloc() since the number of bytes is very small, perhaps less than 8. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI memory controllers)
| * sandbox: Correct spi flash operationSimon Glass2019-07-101-1/+1
| | | | | | | | | | | | | | | | Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix this by using the expected compatible string in the flash node. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2019-07-111-36/+16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - SPL SATA enhancements to allow booting from RAW SATA device needed for Clearfog (Baruch) - Enable SATA booting on Clearfog (Baruch) - Misc changes to Turris Omnia (Marek) - Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s (Luka) - Enable FIT support for db-xc3-24g4xg (Chris) - Enable DM_SPI on Keymile Kirkwood board with necessary changes for this (Pascal) - Set 38x and 39x AVS on lower frequency (Baruch)
| * | km/spi: remove deprecated SPI flash driver code for KM Kirkwood boardsPascal Linder2019-07-111-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | KM Kirkwood boards now implement the driver model for its SPI flash interface. Therefore, the old board specific claim and release functions can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet unused as well. All its appearances and dependencies are removed in the kirkwood_spi driver, header files and finally the configuration whitelist. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | km/spi: add weak functions to kirkwood_spi driver (DM part)Pascal Linder2019-07-111-0/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | The weak functions, known from the legacy code, are added to the DM part as well. For this purpose, the release operation first needs to be implemented. KM Kirkwood boards will overwrite those weak functions to change the MPP configuration when claiming/releasing the bus, because the hardware pins are shared between the SPI NOR and NAND devices. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | spi: Add SPI controller driver for UniPhier SoCsKunihiko Hayashi2019-07-103-0/+422
|/ | | | | | | Add SPI controller driver implemented in Socionext UniPhier SoCs. This controller has the SPI master mode only. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
* spi: Add Atmel QuadSPI driverTudor Ambarus2019-07-093-0/+545
| | | | | | | | Backport the driver from linux v5.1-rc5 and adapt it for u-boot. Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-06-171-0/+4
|\ | | | | | | | | | | - Drop zipitz2 board (Tom) - Add DEPRECATED option (Tom) - Mark legacy or non-dm drivers as DEPRECATED (Jagan)
| * spi: Kconfig: Mark LPC32XX_SSP as DEPRECATEDJagan Teki2019-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Mark LPC32XX_SSP as DEPRECATED, this so the resulting build shows warning for deprecated configuration enabled and associated code will remove in v2019.07 release. Cc: Albert ARIBAUD <albert.aribaud@3adev.fr> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Sylvain Lemieux <slemieux@tycoint.com> [trini: Switch to DEPRECATED] Signed-off-by: Tom Rini <trini@konsulko.com>
| * spi: Kconfig: Mark SOFT_SPI as DEPRECATEDJagan Teki2019-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | Mark SOFT_SPI as DEPRECATED, this so the resulting build shows warning for deprecated configuration enabled and associated code will remove in v2019.07 release. Cc: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [trini: Switch to DEPRECATED] Signed-off-by: Tom Rini <trini@konsulko.com>
| * spi: Kconfig: Mark SH_SPI as DEPRECATEDJagan Teki2019-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | Mark SH_SPI as DEPRECATED, this so the resulting build shows warning for a deprecated configuration enabled and associated code will remove in v2019.07 release. Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [trini: Switch to DEPRECATED] Signed-off-by: Tom Rini <trini@konsulko.com>
| * spi: Kconfig: Mark MXS_SPI has DEPRECATEDJagan Teki2019-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Mark MXS_SPI as DEPRECATED, this so the resulting build shows warning for broken configuration enabled and associated code will remove in v2019.07 release. Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [trini: Switch to DEPRECATED] Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-bootTom Rini2019-06-113-0/+624
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | - Add Ethernet support for STM32MP1 - Add saveenv support for STM32MP1 - Add STM32MP1 Avenger96 board support - Add SPI driver suport for STM32MP1 - Add watchdog support for STM32MP1 - Update power supply check via USB TYPE-C for STM32MP1 discovery board
| * | spi: stm32: Add Serial Peripheral Interface driver for STM32MPPatrice Chotard2019-06-063-0/+624
| | | | | | | | | | | | | | | | | | Add SPI driver support for STM32MP SoCs family. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | | Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imxTom Rini2019-06-111-24/+53
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot-imx-20190612 -------------------- - Board fixes: - imx6logic - wandboard - mx6sabre boots again - imx8qm_mek - pico-* boards - Toradex apalis / colibri - engicam imx6 (environment) - KP MX53 - opos6ul - Switch to DM: - vining2000 - dh MX6 - Toradex colibri i.MX7 - Novena - Security : fix CSF size for HAB - Other: - imx: fix building for i.mx8 without spl - pcie and switch to DM mx6sabreauto: Enable SPL SDP support
| * | spi: imx: work with cs greater 0Heiko Schocher2019-06-111-22/+52
| | | | | | | | | | | | | | | | | | | | | currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | spi: imx: remove doubled pointer from mxc_spi_probeHeiko Schocher2019-06-111-4/+3
| |/ | | | | | | | | | | | | | | | | | | | | in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2019-06-102-96/+193
|\ \ | |/ |/| | | | | | | - mpc8xxx spi driver fixes (Mario) - mpc8xxx spi dm conversion (Mario, Jagan) - SPI DM Migration update (Jagan)
| * spi: mpc8xxx: Convert to DMJagan Teki2019-06-102-42/+112
| | | | | | | | | | | | | | | | Support DM in the MPC8xxx SPI driver, and remove the legacy SPI interface. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Use get_timerMario Six2019-06-101-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment before the transmission loop in conjunction with the definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to have a timeout value of 1000 ms. But since there is no mdelay(1) or similar in the loop body, the loop just runs 1000 times, without regard for the time elapsed. To correct this, use the standard get_timer functionality to properly time out the loop after 1000 ms. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Fix if checkMario Six2019-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Decreasing the bit length and increasing the write data pointer should be done when there are more than 32 bit of data, not 16 bit. This did not produce incorrect behavior, because the only time where the two checks produce different outcomes is the case of 16 < bitlen < 32, and in this case the subsequent transmission is the last one regardless, hence the additional bit length decrease and write data pointer increase has no effect anyway. Still, the correct check is the check for "bitlen > 32", so correct this behavior. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Re-order transfer setupMario Six2019-06-101-5/+5
| | | | | | | | | | | | | | | | | | | | | | Minize the time the adapter is disabled (via SPI_MODE_EN clearing/setting) to just the character length setting, and only set up the temporary data writing variable right before we need it, so there is a more clear distinction between setting up the SPI adapter, and setting up the data to be written. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Document LEN setting betterMario Six2019-06-101-11/+5
| | | | | | | | | | | | | | | | | | | | Instead of having a table right before the code implementing the length setting for documentation, have inline comments for the if branches actually implementing the length setting described table's entries (which is readable thanks to the set_char_len function). Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Rename variableMario Six2019-06-101-4/+4
| | | | | | | | | | | | | | | | | | The variable "char_size" holds the number of bits to be transferred in the current loop iteration. A better name would be "xfer_bitlen", which we rename this variable to. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Make code more readableMario Six2019-06-101-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | Introduce the to_prescale_mod and set_char_len inline functions to make the code more readable. Note that the added "if (bitlen > 16)" check does not change the semantics of the current code, and hence only preserves the current error (this will be fixed in a later patch in the series). Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Reduce scope of loop variablesMario Six2019-06-101-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The transmission loop starts with setting some variables, which are only used inside the loop. Reduce the scope to the loop to make the declaration and initialization of these variables coincide. In the case of char_size this also always initializes the variable immediately with the final value actually used in the loop (instead of the placeholder value 32). Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Simplify logic a bitMario Six2019-06-101-10/+13
| | | | | | | | | | | | | | | | | | We do nothing in the loop if the "not empty" event was not detected. To simplify the logic, check if this is the case, and skip the execution of the loop early to reduce the nesting level and flag checking. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Get rid of is_readMario Six2019-06-101-5/+7
| | | | | | | | | | | | | | | | | | Get rid of the is_read variable, and just keep the state of the "not empty" and "not full" events in two boolean variables within the loop body. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Simplify ifMario Six2019-06-101-7/+5
| | | | | | | | | | | | | | | | Instead of having a nested if block, just have two branches within the overarching if block to eliminate one nesting level. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Use IO accessorsMario Six2019-06-101-19/+19
| | | | | | | | | | | | | | | | | | | | Accesses to the register map are currently done by directly reading and writing the structure. Switch to the appropriate IO accessors instead. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Replace defines with enumsMario Six2019-06-101-7/+19
| | | | | | | | | | | | | | | | Replace pre-processor defines with proper enums, and use the BIT macro where applicable. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Fix function names in stringsMario Six2019-06-101-4/+5
| | | | | | | | | | | | | | | | Replace the function name with a "%s" format string and the __func__ variable in debug statements (as proposed by checkpatch). Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Fix space after castMario Six2019-06-101-3/+3
| | | | | | | | | | | | | | Fix all "superfluous space after case" style errors. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Rename camel-case variablesMario Six2019-06-101-11/+11
| | | | | | | | | | | | | | | | | | | | There are three variables that have camel-case names, which is not the preferred naming style. Give those variables more compliant names instead. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Fix commentsMario Six2019-06-101-8/+14
| | | | | | | | | | | | | | | | | | There are some comments on the same line as the code they document. Put comments above the code lines they document, so the line length is not unnecessarily increased. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
| * spi: mpc8xxx: Use short type namesMario Six2019-06-101-7/+5
| | | | | | | | | | | | | | | | The function signatures in the driver are quite long as is. Use short type names (uint etc.) to make them more readable. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | drivers: spi: cf_spi: convert to driver modelAngelo Dureghello2019-05-241-177/+305
| | | | | | | | | | | | | | Converting to driver model and removes non-dm code. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Angelo Dureghello <angelo@sysam.it>
* | drivers: spi: cf_spi: add Kconfig optionAngelo Dureghello2019-05-241-0/+6
|/ | | | | | | This patch adds cf_spi DM Kconfig option. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Angelo Dureghello <angelo@sysam.it>
* Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-bootTom Rini2019-05-151-1/+1
|\ | | | | | | | | | | | | | | STM32 MCUs update: _ Add MPU region for SPI NOR memory mapped region _ Add missing QSPI flash compatible for STM32 F7 boards _ Update spi-tx-bus-width and spi-rx-bus-width properties _ Add QSPI support for STM32F469 Discovery board
| * spi: Kconfig: Add STM32F4 support for STM32_QSPI driverPatrice Chotard2019-05-061-1/+1
| | | | | | | | | | | | Allow to select STM32_QSPI driver on STM32F4 SoCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | spi: designware: convert to livetreeSimon Goldschmidt2019-05-101-6/+2
| | | | | | | | | | | | | | Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* | spi: cadence_qspi: convert to livetreeSimon Goldschmidt2019-05-101-20/+19
| | | | | | | | | | | | | | | | | | | | Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to read flash (child node) parameters. Tested on socfpga_socrates (socfpga gen5). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2019-05-081-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | - H6 Beelink GS1 board (Clément) - Olimex A64-Teres-I board (Jonas) - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej) - Change include order (Jagan) - EPHY clock changes (Jagan) - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
| * | spi: atcspi200: Change include orderJagan Teki2019-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like clk_get_by_index, there is requirement for clk_get_by_index_nodev. In this case to make common code functionalities for dev and nodev, clk_get_by_index is trying to get the index of clock by passing ofnode instead of actual dev like current gpio uclass does. In these scenarios with current order of include files the atcspi200_spi driver is unable to find CONFIG_ENV_SIZE. In file included from arch/nds32/include/asm/u-boot.h:24, from include/dm/of.h:10, from include/dm/ofnode.h:12, from include/clk.h:11, from drivers/spi/atcspi200_spi.c:9: include/environment.h:145:19: error: 'CONFIG_ENV_SIZE' undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'? #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) So, fix consists of changing the order of include files in atcspi200_spi.c to include first common.h file. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | spi: rpc: Add support for operation without clock frameworkMarek Vasut2019-05-072-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ifdeffery to allow operation without the clock framework enabled. This is required on RZ/A1, as it does not have clock driver yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mipsTom Rini2019-05-041-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | - mscc: small fixes, enhance network support for Serval, Luton and Ocelot - mt7620: rename arch to more generic name mtmips - mips: pass initrd addresses via DT as physical addresses
| * | | mips: rename mach-mt7620 to mach-mtmipsWeijie Gao2019-05-031-1/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently mach-mt7620 contains only support for mt7628. To avoid confusion, rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms. MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628 because they do not share the same lowlevel codes. Dependencies of four drivers are changed to SOC_MT7628 as these drivers are only used by MT7628. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | | rockchip: use 'arch-rockchip' as header file pathKever Yang2019-05-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | | rockchip: spi: make optimised receive-handler unaligned-safePhilipp Tomsich2019-05-011-13/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support unaligned output buffers (i.e. 'in' in the terminology of the SPI framework), this change splits each 16bit FIFO element after reading and writes them to memory in two 8bit transactions. With this change, we can now always use the optimised mode for receive-only transcations independent on the alignment of the target buffer. Given that we'll run with caches on, the impact should be negligible: as expected, this has no adverse impact on throughput if running with a 960MHz LPLL configuration. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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