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* Merge git://git.denx.de/u-boot-videoTom Rini2017-10-2916-187/+983
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| * exynos: video: fix typo in DisplayPort driverDongjin Kim2017-10-291-1/+1
| | | | | | | | | | | | Signed-off-by: Dongjin Kim <tobetter@gmail.com> CC: Simon Glass <sjg@chromium.org> CC: Minkyu Kang <mk7.kang@samsung.com>
| * video/da8xx-fb: Cache-align memory allocationsNiko Mauno2017-10-291-4/+4
| | | | | | | | | | | | | | Resort to malloc_cache_aligned() rather than malloc() which also removes 'CACHE: Misaligned operation at range' warnings. Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
| * sunxi: video: add LCD support to DE2 driverVasily Khoruzhick2017-10-273-1/+170
| | | | | | | | | | | | | | | | | | Extend DE2 driver with LCD support. Tested on Pinebook which is based on A64 and has ANX6345 eDP bridge with eDP panel connected to it. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> [agust: rebased v5 on u-boot-video/master] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * sunxi: video: split out PLL configuration codeVasily Khoruzhick2017-10-272-116/+129
| | | | | | | | | | | | It will be reused in new DM LCD driver. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
| * video: add anx6345 DM driverVasily Khoruzhick2017-10-263-0/+435
| | | | | | | | | | | | | | | | | | This is a eDP bridge similar to ANX9804, it allows to connect eDP panels to the chips that can output only parallel signal Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> [agust: fixed most checkpatch errors/warnings] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * video: anx9804: split out registers definitions into a separate headerVasily Khoruzhick2017-10-262-53/+99
| | | | | | | | | | | | | | | | This header will be used in anx6345 driver Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> [agust: moved header to drivers/video] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: bridge: add operation to read EDIDVasily Khoruzhick2017-10-261-0/+10
| | | | | | | | | | | | | | Add an operation to read EDID, since bridge may have ability to read EDID from the panel that is connected to it, for example LCD<->eDP bridge. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
| * sunxi: setup simplefb for Allwinner DE2Icenowy Zheng2017-10-262-1/+73
| | | | | | | | | | | | | | | | | | | | As the support of EFI boot on Allwinner H3 is broken, we still need to use simplefb to pass the framebuffer to Linux. Add code to setup simplefb for Allwinner DE2 driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * video: add an option for video simplefb via DTIcenowy Zheng2017-10-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Add an option to indicate that the video driver should setup a SimpleFB node that passes the video framebuffer initialized by U-Boot to the operating system kernel. Currently only the Allwinner DE driver uses this option, and the definition of this option in the sunxi-common.h config header is converted to an imply of this option from CONFIG_VIDEO_SUNXI. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * video: sunxi: extract simplefb match code to a new fileIcenowy Zheng2017-10-264-12/+55
| | | | | | | | | | | | | | | | | | As the DE2 simplefb setup code can also benefit from the simplefb match code, extract it to a new source file. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-10-273-20/+29
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| * | usb: host: Move CONFIG_XHCI_FSL to KconfigRan Wang2017-10-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | use Kconfig to select xhci accordingly. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_IDAshish Kumar2017-10-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII_TXID. These change where introduced in phy driver in commit 05b29aa0cb68 ("net: phy: realtek: fix enabling of the TX-delay for RTL8211F"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: fsl-mc: use calloc instead mallocPrabhakar Kushwaha2017-10-271-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | Memory allocated via malloc is not guaranteed to be zeroized. So explicitly use calloc instead of malloc. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | i2c: fti2c010: remove unused/unmaintained driverMasahiro Yamada2017-10-273-421/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_I2C_FTI2C010 is not enabled by anyone. Commit 2852709676c8 ("dm: i2c: Add a note to I2C drivers which need conversion") prompted to convert this driver to DM before June 2017, but not converted yet. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | i2c: adi_i2c: remove left-over Blackfin I2C driverMasahiro Yamada2017-10-272-310/+0
| | | | | | | | | | | | | | | | | | | | | | | | This driver was used by Blackfin boards, but Blackfin support is gone. There is no user of this driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | Merge git://git.denx.de/u-boot-x86Tom Rini2017-10-272-0/+23
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| * | | spi: ich: Lock down controller settings if requiredBin Meng2017-10-272-0/+23
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the SPI flash device. Rather than passively doing the opcode configuration, let's add a simple DTS property "intel,spi-lock-down" and let the driver call the opcode configuration function if required by such FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXIAndre Przywara2017-10-251-0/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI symbol. But despite its generic name, the actual only use case for this is to provide SPI flash support to the SPL, which requires CONFIG_SPL_SPI_FLASH_SUPPORT to be defined. Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This avoids doing this explicitly in the defconfig, and fixes SPI booting on the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with SPI flash). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | rtc: mc146818: Correct alarm message for day alarmBin Meng2017-10-231-1/+1
| | | | | | | | | | | | | | RTC_CONFIG_D register contains the day within the month to generate an alarm, not the month. This corrects the printf to indicate it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | simple-bus: remove DECLARE_GLOBAL_DATA_PTRMasahiro Yamada2017-10-231-2/+0
| | | | | | | | | | | | | | No global pointer is used in this file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | mtd: replace MTDDEBUG() with pr_debug()Masahiro Yamada2017-10-236-59/+51
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In old days, the MTD subsystem in Linux had debug facility like DEBUG(MTD_DEBUG_LEVEL1, ...). They were all replaced with pr_debug() until Linux 3.2. See Linux commit 289c05222172 ("mtd: replace DEBUG() with pr_debug()"). U-Boot still uses similar macros. Covert all of them for easier sync. Done with the help of Coccinelle. The semantic patch I used is as follows: // <smpl> @@ expression e1, e2; @@ -MTDDEBUG(e1, e2) +pr_debug(e2) @@ expression e1, e2; @@ -MTDDEBUG(e1, e2, +pr_debug(e2, ...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* net: Add SMC911X driver to Kconfig, convertAdam Ford2017-10-201-0/+28
| | | | | | | | | | | | | We add the various SMC91XX symbols to drivers/net/Kconfig and then this converts the following to Kconfig: CONFIG_SMC911X CONFIG_SMC911X_BASE CONFIG_SMC911X_16_BIT CONFIG_SMC911X_32_BIT Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Apply to the rest of the tree, re-squash old and new patch] Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to KconfigAdam Ford2017-10-201-1/+54
| | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NAND_MXC CONFIG_NAND_OMAP_GPMC CONFIG_NAND_OMAP_GPMC_PREFETCH CONFIG_NAND_OMAP_ELM CONFIG_SPL_NAND_AM33XX_BCH CONFIG_SPL_NAND_SIMPLE CONFIG_SYS_NAND_BUSWIDTH_16BIT Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> [trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues, add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-i2cTom Rini2017-10-182-13/+6
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| * i2c: stm32f7_i2c: fix usage of useless local variablePatrice Chotard2017-10-171-8/+2
| | | | | | | | | | | | | | Remove useless local variable "s" and use directly function's parameter "output" Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * i2c: stm32f7_i2c: fix data abortChristophe Kerello2017-10-171-10/+11
| | | | | | | | | | | | | | | | | | | | As "v" is a local variable in stm32_i2c_choose_solution() "v" has to be copied into "s" to avoid data abort in stm32_i2c_compute_timing(). Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * i2c: remove DECLARE_GLOBAL_DATA_PTR from i2c-uclassMasahiro Yamada2017-10-171-2/+0
| | | | | | | | | | | | | | No global pointer is used in this file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Merge git://git.denx.de/u-boot-spiTom Rini2017-10-182-7/+65
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| * sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operationLukasz Majewski2017-09-271-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The content of Bank Address Register (BAR) is volatile. It is cleared after power cycle or reset command (RESET F0h). Some memories (like e.g. s25fl256s) use it to access memory larger than 0x1000000 (16 MiB). The problem shows up when one: 1. Reads/writes/erases memory > 16 MiB 2. Calls "reset" u-boot command (which is not causing BAR to be cleared) In the above scenario, the SoC ROM sends 0x000000 address to read SPL. Unfortunately, the BA24 bit is still set and hence it receives content from 0x1000000 (16 MiB) memory address. As a result the SoC aborts and we hang. Only power cycle can take the SoC out of this state. How to reproduce/test: sf probe; sf erase 0x1200000 0x800000; reset sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset sf probe; sf read 0x11000000 0x1200000 0x800000; reset Signed-off-by: Lukasz Majewski <lukma@denx.de> [Fixed comment text on clean_bar function] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * SPL: SPI: sunxi: add SPL FIT image supportAndre Przywara2017-09-271-7/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi-specific SPI load routine only knows how to load a legacy U-Boot image. Teach it how to handle FIT images as well, simply by providing the existing SPL FIT loader with the right loader routine to access the SPI NOR flash. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Peter Kosa <kope@madnet.sk> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | usbtty: fix typosHeinrich Schuchardt2017-10-161-1/+1
| | | | | | | | | | | | Fix typos in USB tty driver. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Drop CONFIG_HAS_DATAFLASHTuomas Tynkkynen2017-10-163-995/+0
| | | | | | | | | | | | | | | | Last user of this option went away in commit: fdc7718999 ("board: usb_a9263: Update to support DT and DM") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* | spi: Drop CONFIG_ATMEL_DATAFLASH_SPITuomas Tynkkynen2017-10-162-185/+0
| | | | | | | | | | | | | | | | | | Last user of this option went away in commit: fdc7718999 ("board: usb_a9263: Update to support DT and DM") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
* | mmc: stm32_sdmmc2: increase polling status register delayChristophe Kerello2017-10-161-1/+1
| | | | | | | | | | | | | | | | | | MMC commands like MMC_CMD_ALL_SEND_CID or MMC_CMD_SEND_CSD can reach 500 us. This patch increases the polling status register delay to avoid a timeout on a command. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* | dm: clk: fix PWR_CR3 register's bit 2 namePatrice Chotard2017-10-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix bit 2 name of PWR_CR3 register to match with the last STM32H7 reference manual available here : http://www.st.com/content/st_com/en/support/resources/ resource-selector.html?querycriteria=productId=SS1951$$ resourceCategory=technical_literature$$resourceType=reference_manual Update also comment about voltage scaling 1 values Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* | dm: clk: remove CLK() macro for clk_stm32h7Patrice Chotard2017-10-161-115/+108
| | | | | | | | | | | | | | | | CLK() macro is a residue of a previously reworked patch, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
* | clk: uniphier: add NAND controller clockMasahiro Yamada2017-10-151-0/+12
| | | | | | | | | | | | This allows the NAND driver to enable clock and get its clock rate. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: nand: denali_dt: add clock supportMasahiro Yamada2017-10-152-0/+13
| | | | | | | | | | | | | | Enable clock in the probe hook. The clock rate will be necessary when setup_data_interface hook is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | reset: uniphier: fix the first argument passed to dev_err()Masahiro Yamada2017-10-151-1/+2
| | | | | | | | | | | | priv->dev does not exist. Pass the correct pointer to udevice. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | clk: uniphier: add PXs3 clock dataMasahiro Yamada2017-10-153-0/+23
| | | | | | | | | | | | Add basic clock data for Socionext's new SoC PXs3. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | clk: uniphier: rework for better clock tree structureMasahiro Yamada2017-10-154-183/+323
| | | | | | | | | | | | | | | | U-Boot does not support fancy clock tree structures like the Linux common clock framework. Implement a simple clock tree model at the driver level. With this, the clock data will be simplified. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | i2c: uniphier-f: replace debug() with dev_dbg()Masahiro Yamada2017-10-151-62/+52
| | | | | | | | | | | | | | | | | | | | Use dev_dbg() functions. It will be helpful to prefix log messages with the corresponding device name when the core framework is ready. While I am here, I renamed "dev", which was actually private data, into "priv" because dev->dev looks confusing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | i2c: uniphier: replace debug() with dev_dbg()Masahiro Yamada2017-10-151-30/+33
| | | | | | | | | | | | | | | | | | | | Use dev_dbg() functions. It will be helpful to prefix log messages with the corresponding device name when the core framework is ready. While I am here, I renamed "dev", which was actually private data, into "priv" because dev->dev looks confusing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | usb: dwc3-uniphier: replace <common.h> with <linux/bitops.h>Masahiro Yamada2017-10-151-1/+1
| | | | | | | | | | | | | | | | Including <common.h> pulls in a lot of bloat. What this driver needs is BIT(), so replace it with <linux/bitops.h> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
* | pinctrl: uniphier: simplify input enable and delete pin arraysMasahiro Yamada2017-10-156-89/+3
| | | | | | | | | | | | | | | | | | The pin data are implemented for old SoCs to specify the bit shift of the IECTRL register. They are not wortwhile given the required memory footprint. Delete all the pin data and enable all bits of the IECTRL register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | pinctrl: uniphier: set PUPD_SIMPLE cap flag for PXs3Masahiro Yamada2017-10-151-1/+2
| | | | | | | | | | | | | | Like other recenct UniPhier SoCs, the pupdctrl number of PXs3 matches to the pin number. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | gpio: uniphier: rework single device node modelMasahiro Yamada2017-10-151-51/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, I implemented this driver as per-bank model, but it was a design mistake. - There are 31 banks in the maximum case. It is painful to add so many nodes to DT. - The IRQ control registers are shared between banks. Per-bank design is a problem for Linux. The counterpart for Linux turned around to the single node model. Rework based on the driver for Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)Masahiro Yamada2017-10-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set Features (0xEF) command toggles the R/B# pin after 4 sub feature parameters are written. Currently, nand_command(_lp) calls chip->dev_ready immediately after the address cycle because NAND_CMD_SET_FEATURES falls into default: label. No wait is needed at this point. If you see nand_onfi_set_features(), R/B# is already cared by the chip->waitfunc call. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [ Linux commit: c5d664aa5a4c4b257a54eb35045031630d105f49 ]