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* rtc: m41t62: Convert the RTC driver to support the driver model (DM)Lukasz Majewski2018-12-031-0/+77
| | | | | | | | After this change the m41t62.c can be used with RTC subsystem (i.e. date command) which uses device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* rtc: m41t62: Extract common RTC handling code to facilitate DM conversionLukasz Majewski2018-12-031-12/+20
| | | | | | | | This change facilitates the conversion of m41t62 RTC driver to device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* rtc: m41t62: Break i2c_write() arguments to fix checkpatch warningLukasz Majewski2018-12-031-1/+2
| | | | | | | No functional change for this commit. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* Kconfig: Migrate CONFIG_RTC_M41T62 define to KconfigLukasz Majewski2018-12-031-0/+6
| | | | | | | | This patch moves the RTC M41T62 config define to Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: meson: Add regmap support for clock driverLoic Devulder2018-12-031-29/+30
| | | | | | | | | | | This patch modifies the meson clock driver to use syscon/regmap like the Linux kernel does, as it is needed if we want to share the same DTS files. DTS files are synchronized from Linux 4.19. Signed-off-by: Loic Devulder <ldevulder@suse.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
* drivers: rtc: correctly convert seconds to time structureHeinrich Schuchardt2018-12-011-1/+5
| | | | | | | | | Variable 'days' must be defined as signed int. Otherwise the conversion fails for some dates, e.g. 2004-08-25. Cf function rtc_time64_to_tm() in the Linux kernel source. Fixes: 992c1db45591 "drivers: rtc: resolve year 2038 problem in rtc_to_tm" Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge tag 'for-master-20181130' of git://git.denx.de/u-boot-rockchipTom Rini2018-12-015-154/+994
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Improvements: - RK3188 USB-UART functionality - errors triggering a hard-stop in SPL on the RK3399 are reported - Rockchip RV1108 (SoC) support - MicroCrystal RV3029 (RTC) DM driver Fixes: - RK3188 early UART setup - limit SD-card frequency to 40MHz on the RK3399-Q7 - MIPI fixes - RK3399 CPUB clock initialisation
| * rockchip: rk3399: Initialize CPU B clock.Christoph Muellner2018-11-301-9/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch sets the PLL of CPU cluster B (BPLL) to 600 MHz. This decreases the boot time of Linux 4.19 by about 8%. The 600 MHz are inspired by the 600 MHz used for LPLL initialization (came in with commit 9f636a249c1). Tested on RK3399-Q7 on Haikou base board. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rtc: rv3029: update to support DM and sync with Linux 4.17Philipp Tomsich2018-11-301-137/+443
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "Flamingo" carrier-board for the RK3399-Q7 has a RV3029 populated and the application will use the off-module RV3029 RTC including the battery backed SRAM. To support this use case, this commit includes the following changes: * updates the rv3029 driver to use DM * implements the read8/write8 operations This syncs the implementation with the Linux code (based on 4.17), porting the trickle-charger support from there (with improvements to avoid unnecessary EEPROM updates) and adheres to the Linux DTS binding. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
| * rtc: rv3029: add to KconfigPhilipp Tomsich2018-11-301-0/+10
| | | | | | | | | | | | | | | | The MicroCrystal RV3029 driver didn't have a Kconfig entry and was not used anywhere. Add it to Kconfig to make it selectable. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
| * ARM: rockchip: rv1108: Sync clock with vendor treeOtavio Salvador2018-11-301-6/+469
| | | | | | | | | | | | | | | | Make adjustments to the rv1108 clock driver in order to align it with the internal Rockchip version. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: video: mipi: Fix phy frequency settingRichard Röjfors2018-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | There was an incorrect check when looping and finding the first fast enough frequency in the freq_rang table. The code did actually return the first that was either exactly correct or too slow. Signed-off-by: Richard Röjfors <richard@puffinpack.se> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: video: mipi: Do not write to the version registerRichard Röjfors2018-11-301-1/+1
| | | | | | | | | | | | | | | | There was a copy and paste error where the data enable setting was written to the version register. Signed-off-by: Richard Röjfors <richard@puffinpack.se> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge tag 'pull-30nov18' of git://git.denx.de/u-boot-dmTom Rini2018-11-3028-112/+214
|\ \ | |/ |/| | | | | | | | | | | | | Fix sound on sandbox Convert TPM fully to DM Tidy up sandbox I2C emulation Add a 'make qcheck' target for faster testing A few other misc things (dropped the final patch which breaks clang for some reason)
| * core: ofnode: Fix ofnode_get_addr_index functionKeerthy2018-11-291-7/+10
| | | | | | | | | | | | | | | | Currently the else part of ofnode_get_addr_index function does not fetch addresses based on the index but rather just returns the base address. Fix that. Signed-off-by: Keerthy <j-keerthy@ti.com>
| * tpm: Export the open/close functionsSimon Glass2018-11-291-20/+27
| | | | | | | | | | | | | | | | | | | | | | At present these functions are not accessible outside the TPM library, but in some cases we need to call them. Export them in the header file and add a define for the SHA1 digest size. Also adjust tpm_open() to call tpm_close() first so that the TPM is in a known state before opening (e.g. by a previous phase of U-Boot). Signed-off-by: Simon Glass <sjg@chromium.org>
| * sound: Add sample rate as a parameter for square waveSimon Glass2018-11-292-4/+5
| | | | | | | | | | | | | | | | | | | | At present this value is hard-coded in the function that generates a square wave. Since sample rates vary between different hardware, it makes more sense to have this as a parameter. Update the function and its users. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sound: Correct data output in sound_create_square_wave()Simon Glass2018-11-291-2/+0
| | | | | | | | | | | | | | This function currently outputs twice as much data as it should and overwrites its buffer as a result. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * rtc: Allow child driversSimon Glass2018-11-291-0/+1
| | | | | | | | | | | | | | Some RTC chips have child drivers, e.g. to provide access to their non-volatile RAM. Scan for these when binding. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sandbox: i2c: Use new emulator parent uclassSimon Glass2018-11-292-20/+2
| | | | | | | | | | | | | | Update the device tree, sandbox i2c driver and tests to use the new emulation parent to hold emulators. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sandbox: i2c: Add a new 'emulation parent' uclassSimon Glass2018-11-291-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sandbox i2c works using emulation drivers which are currently children of the i2c device: rtc_0: rtc@43 { reg = <0x43>; compatible = "sandbox-rtc"; emul { compatible = "sandbox,i2c-rtc"; }; }; In this case the emulation device is attached to i2c bus on address 0x43 and provides the Real-Time-Clock (RTC) functionality. However this is not ideal, since every device on an I2C bus has a child device. This is only really the case for sandbox, but we want to avoid special-case code for sandbox. A better approach seems to be to add a separate node on the bus, an 'emulation parent'. This can be given a bogus address (such as 0xff) and hides all the emulators away. Then we can use a phandle to point from the device to the correct emualtor, and only on sandbox. The code to find an emulator does not interfere with normal i2c operation. Add a new UCLASS_I2C_EMUL_PARENT uclass which allows finding an emulator given a bus, and finding a bus given an emulator. This will be used in a follow-on patch. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add a few more specific child-finding functionsSimon Glass2018-11-291-0/+34
| | | | | | | | | | | | | | | | Add two functions which can find a child device by uclass or by name. The first is useful with Multi-Function-Devices (MFDs) to find one of a particular type. The second is useful when only the name is known. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Export uclass_find_device_by_phandle()Simon Glass2018-11-291-4/+2
| | | | | | | | | | | | | | This function may be useful to code outside of the code driver-model implementation. Export it and add a test. Signed-off-by: Simon Glass <sjg@chromium.org>
| * power: pmic: Correct debug/error outputSimon Glass2018-11-2918-55/+56
| | | | | | | | | | | | | | | | There is a newline missing from quite a few printf() strings in these pmic files. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2018-11-292-1/+8
|\ \
| * | spi: cadence_qspi: use "cdns,qspi-nor" as compatibleSimon Goldschmidt2018-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | Linux uses "cdns,qspi-nor" as compatible string for the cadence qspi driver, so change driver, docs and all device trees. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
| * | gpio: dwapb_gpio: fix binding without bank-name propertySimon Goldschmidt2018-11-291-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation for merging the socfpga gen5 devicetree files from Linux, this patch makes the dwapb gpio driver work correctly without the 'bank-name' property on the gpio-controller nodes. This property is not present in the Linux drivers and thus is not present in the Linux devicetrees. It is only used to access pins via bank name. This fallback is necessary since without it, the driver will return an error code which will lead to an error in U-Boot startup. The bank names will still be added to the default board device trees in follow-up patch, but other boards using this driver and not including the bank name should also work with the socfpga.dtsi without adding the bank-name property. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* | | Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogicTom Rini2018-11-2916-126/+1695
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | Cleanup and update towards support for Amlogic Meson AXG SoCs : - mmc: meson-gx: Add AXG compatible - net: designware: add meson meson compatibles - Amlogic Meson cleanup for AXG SoC support
| * | clk: Add clock driver for AXGNeil Armstrong2018-11-262-1/+317
| | | | | | | | | | | | | | | | | | | | | This patch adds a minimal clock driver for the Amlogic AXG SoC to handle the basic gates and PLLs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | ARM: meson: rework soc arch file to prepare for new SoCJerome Brunet2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | We are about to add support for the Amlogic AXG SoC. While very close to the Gx SoC family, we will need to handle a few thing which are different in this SoC. Rework the meson arch directory to prepare for this. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | clk: meson: silence debug printJerome Brunet2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | | | | This debug print was not designed to be active in non-debug mode. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | clk: meson: add static to meson_gates tableNeil Armstrong2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | The meson_gates table should be set static in the clk_meson driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | pinctrl: meson: add axg supportJerome Brunet2018-11-265-0/+1180
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Amlogic AXG SoC pinctrl and GPIO controller using a specific set of pinctrl functions which differs from the GX SoCs. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | pinctrl: meson: select generic pinctrlJerome Brunet2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Meson pinctrl needs generic pinctrl, rather than depending on it select it Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | pinctrl: meson: rework gx pmx functionJerome Brunet2018-11-268-121/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation of supporting the new Amlogix AGX SoCs, we need to move the Amlogic GX pinmux functions out of the common code to be able to add a different set of SoC specific pinmux functions for AXG. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | net: designware: add meson meson axg compatibleNeil Armstrong2018-11-261-0/+1
| | | | | | | | | | | | | | | | | | Add the compatible string for the upcoming Amlogic AXG SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | net: designware: add meson meson gxbb compatibleNeil Armstrong2018-11-261-0/+1
| | | | | | | | | | | | | | | | | | Add the compatible string for the Amlogic GXBB SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | mmc: meson-gx: Add AXG compatibleNeil Armstrong2018-11-261-0/+1
| | | | | | | | | | | | | | | | | | Add the compatible string for the upcoming Amlogic AXG SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoCWeijie Gao2018-11-283-0/+1406
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds MT7623 host controller driver for accessing SD/MMC. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | ram: MediaTek: add DDR3 driver for MT7629 SoCRyder Lee2018-11-283-0/+774
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a DDR3 driver for MT7629 SoC. Signed-off-by: Wu Zou <wu.zou@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | serial: MediaTek: add high-speed uart driver for MediaTek SoCsRyder Lee2018-11-283-0/+289
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many SoCs from MediaTek have a high-speed uart. This UART is compatible with the ns16550 in legacy mode. It has extra registers for high-speed mode which can reach a maximum baudrate at 921600. However this UART will no longer be compatible if it's in high-speed mode. Some BootROM of MediaTek's SoCs will change the UART into high-speed mode and the U-Boot must use this driver to initialize the UART. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Tested-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | power domain: MediaTek: add power domain driver for MT7623 SoCRyder Lee2018-11-281-0/+80
| | | | | | | | | | | | | | | | | | | | | This adds power domain (scpsys) support for MT7623 SoC. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | power domain: MediaTek: add power domain driver for MT7629 SoCRyder Lee2018-11-283-0/+334
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a power domain driver for the Mediatek SCPSYS unit. The System Control Processor System (SCPSYS) has several power management related tasks in the system. The tasks include thermal measurement, dynamic voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control. The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power domain control. For now this driver only adds power domain support. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | pinctrl: MediaTek: add pinctrl driver for MT7623 SoCRyder Lee2018-11-284-0/+1291
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl support for MT7623 SoC. And most of the structures are used to hold the hardware configuration for each pin. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | pinctrl: MediaTek: add pinctrl driver for MT7629 SoCRyder Lee2018-11-287-0/+1163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl support for MT7629 SoC. The IO core found on the SoC has the registers for pinctrl, pinconf and gpio mixed up in the same register range. Hence the driver also implements the gpio functionality through UCLASS_GPIO. This also creates a common file as there might be other chips that use the same binding and driver, then being a little more abstract could help in the long run. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | watchdog: MediaTek: add watchdog driver for MediaTek SoCsRyder Lee2018-11-283-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a common driver for the Mediatek SoC integrated watchdog. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | timer: MediaTek: add timer driver for MediaTek SoCsRyder Lee2018-11-283-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock source and clock event for the timer found on the Mediatek SoCs. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | clk: MediaTek: add clock driver for MT7623 SoC.Ryder Lee2018-11-282-0/+871
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for MT7623 clock blocks. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | clk: MediaTek: add clock driver for MT7629 SoC.Ryder Lee2018-11-285-0/+1403
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock modules for MediaTek SoCs: - Shared part: a common driver which contains the general operations for plls, muxes, dividers and gates so that we can reuse it in future. - Specific SoC part: the group of structures used to hold the hardware configuration for each SoC. We take MT7629 as an example to demonstrate how to implement driver if any other MediaTek chips would like to use it. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2018-11-2727-69/+74
|\ \ | | | | | | | | | - Introduce CONFIG_SPL_DM_USB