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* Merge tag 'u-boot-rockchip-20200722' of ↵WIP/22Jul2020Tom Rini2020-07-2212-388/+418
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New rk3326 board: Hardkernel Odroid Go2; - Update board config and dts for RockPI 4/N8/N10; - Update led boot on support for roc-rk3399-pc; - Enable SPI Flash suppor for rk3328 rock64 board; - Update rockchip pcie phy to use generic framework;
| * pci: rockchip: Drop legacy PHY driverJagan Teki2020-07-224-354/+74
| | | | | | | | | | | | | | | | Drop the legacy PHY driver and it's associated code since the PHY handling driver now part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * pci: rockchip: Switch to generic-phyJagan Teki2020-07-223-10/+16
| | | | | | | | | | | | | | | | Now, we have a PCIe PHY driver as part of the Generic PHY framework. Let's use it instead of legacy PHY driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * phy: Add Rockchip PCIe PHY driverJagan Teki2020-07-223-0/+279
| | | | | | | | | | | | | | | | Add the Rockchip PCIe PHY driver as part of Generic PHY framework. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not setKever Yang2020-07-221-0/+13
| | | | | | | | | | | | | | | | The empty function define should not be in the header file, or else the build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG is disabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * ram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUGJagan Teki2020-07-221-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now all these debug statements are printing on the console to make sure proper dram initialization happens.   Mark them into RAM_ROCKCHIP_DEBUG would be more meaningful and work like before since the RAM_ROCKCHIP_DEBUG is by default yet. No functionality changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * ram: rk3399: Drop debug stride in driverJagan Teki2020-07-221-25/+0
| | | | | | | | | | | | | | | | | | | | stride debug is already present in sdram_common.c via RAM_ROCKCHIP_DEBUG. So, drop the redundant debug stride code in rk3399 driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * drivers: spi: rk_spi: Add support for RK3328Johannes Krottmayer2020-07-221-0/+2
| | | | | | | | | | | | | | | | | | Add support for the RK3328 SPI controller Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * drivers: clk: rockchip: clk_rk3328: Add SPI supportJohannes Krottmayer2020-07-221-0/+31
| | | | | | | | | | | | | | | | | | Add SPI support for the RK3328 clock driver Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | mtd: spinand: micron: Add new Micron SPI NAND devices with multiple diesShivamurthy Shastri2020-07-201-0/+55
| | | | | | | | | | | | | | | | | | | | Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: spinand: micron: Add M70A series Micron SPI NAND devicesShivamurthy Shastri2020-07-201-0/+20
| | | | | | | | | | | | | | Add device table for M70A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: spinand: micron: identify SPI NAND device with Continuous Read modeShivamurthy Shastri2020-07-201-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: spinand: micron: Add new Micron SPI NAND devicesShivamurthy Shastri2020-07-201-0/+30
| | | | | | | | | | | | | | Add device table for M79A and M78A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGDShivamurthy Shastri2020-07-201-0/+1
| | | | | | | | | | | | | | | | Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage details as a comment. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | mtd: spinand: micron: Generalize the OOB layout structure and function namesShivamurthy Shastri2020-07-201-14/+14
| | | | | | | | | | | | | | | | In order to add new Micron SPI NAND devices, we generalized the OOB layout structure and function names. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
* | dm: core: Don't show an ACPI warning if there is no orderingSimon Glass2020-07-201-1/+1
| | | | | | | | | | | | | | | | | | Some boards don't care about the ordering of ACPI code fragments. Change the warning to a debug message. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | sysreset: Add Octeon sysreset driverStefan Roese2020-07-183-0/+60
|/ | | | | | | | This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC family. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* mtd: mtdpart: use uint64_t instead of int for cur_offMartin Kaistra2020-07-171-1/+1
| | | | | | | | | | | | | | | | | The types of "offset" and "size" of "struct mtd_partition" are uint64_t, while mtd_parse_partitions() uses int to work with these values. When the offset reaches 2GB, it is interpreted as a negative value, which leads to error messages like mtd: partition "<partition name>" is out of reach -- disabled eg. when using the "ubi part" command. Fix this by using uint64_t for cur_off and cur_sz. Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de> Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* treewide: convert bd_t to struct bd_info manuallyMasahiro Yamada2020-07-173-4/+4
| | | | | | | | | | | Some code was not converted by coccinelle, somehow. I manually fixed up the remaining, and comments, README docs. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> [trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and include/fdt_support.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-1771-127/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* Convert CONFIG_MXC_UART to KconfigTom Rini2020-07-171-1/+2
| | | | | | | | This converts the following to Kconfig: CONFIG_MXC_UART Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini2020-07-1726-54/+1107
|\ | | | | | | | | | | | | | | | | | | - New timer API to allow delays with a 32-bit microsecond timer - Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core - x86: Enable ACPI table generation by default - x86: Enable the copy framebuffer on Coral - x86: A few fixes to FSP2 with ApolloLake - x86: Drop setup_pcat_compatibility() - x86: Primary-to-Sideband Bus minor fixes
| * acpi: Enable ACPI table generation by default on x86Simon Glass2020-07-171-1/+1
| | | | | | | | | | | | | | | | This should ideally be used by all x86 boards in U-Boot. Enable it by default. If some boards don't use it, the cost is small. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: apl: Fix save/restore of ITSS prioritiesSimon Glass2020-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * pmc: Move common registers to the header fileSimon Glass2020-07-171-9/+0
| | | | | | | | | | | | | | | | | | These registers need to be accesses from ACPI code, so move them to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * p2sb: Add a method to hide the busSimon Glass2020-07-171-0/+10
| | | | | | | | | | | | | | | | | | | | The P2SB bus needs to be hidden in some cases so that it does not get auto-configured by Linux. Add a method for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * i2c: designware_i2c: Support ACPI table generationSimon Glass2020-07-173-1/+136
| | | | | | | | | | | | | | | | | | | | | | Update the PCI driver to generate ACPI information so that Linux has the full information about each I2C bus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Correct one typo in dw_i2c_gen_speed_config() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * i2c: Add log_ret() on errorSimon Glass2020-07-171-2/+2
| | | | | | | | | | | | | | | | | | | | Add a few of these calls to make it easier to see where an error occurs, if CONFIG_LOG_ERROR_RETURN is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * i2c: designware_i2c: Add a little more debuggingSimon Glass2020-07-171-5/+5
| | | | | | | | | | | | | | | | | | | | Add debugging for a few more values and also use log to show return values when something goes wrong. This makes it easier to see the root cause. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * x86: gpio: Add support for obtaining ACPI info for a GPIOSimon Glass2020-07-171-0/+34
| | | | | | | | | | | | | | | | Implement the method that converts a GPIO into the form used by ACPI, so that GPIOs can be added to ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: pinctrl: Drop the acpi_path memberSimon Glass2020-07-171-4/+0
| | | | | | | | | | | | | | | | This is in the device tree now, so drop the unnecessary field here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: pinctrl: Set up itss in the probe() methodSimon Glass2020-07-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | At present the itss is probed in the ofdata_to_platdata() method. This is incorrect since itss is a child of p2sb which itself needs to probe the pinctrl device. This means that p2sb is effectively not probed when the itss is probed, so we get the wrong register address from p2sb. Fix this by moving the itss probe to the correct place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * x86: pinctrl: Add multi-ACPI controlSimon Glass2020-07-172-0/+14
| | | | | | | | | | | | | | | | | | | | Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * x86: pinctrl: Add a way to get the pinctrl reg addressSimon Glass2020-07-173-14/+28
| | | | | | | | | | | | | | | | | | | | | | At present we can query the offset of a pinctrl register within the p2sb. For ACPI we need to get the actual address of the register. Add a function to handle this and rename the old one to more accurately reflect its purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * sound: Add an ACPI driver for Maxim MAX98357acSimon Glass2020-07-173-0/+171
| | | | | | | | | | | | | | | | | | | | This chip is used on coral and we need to generate ACPI tables for sound to make it work. Add a driver that does just this (i.e. at present does not actually support playing sound). Signed-off-by: Simon Glass <sjg@chromium.org> [bmeng: Use the correct acpi_irq_polarity enum number] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * sound: Add an ACPI driver for Dialog Semicondutor da7219Simon Glass2020-07-173-0/+200
| | | | | | | | | | | | | | | | This chip is used on coral and we need to generate ACPI tables for sound to make it work. Add a driver that does just this (i.e. at present does not actually support playing sound). Signed-off-by: Simon Glass <sjg@chromium.org>
| * acpi: mmc: Generate ACPI info for the PCI SD CardSimon Glass2020-07-171-1/+77
| | | | | | | | | | | | | | | | | | | | Write required information into the SSDT to describe the SD card card-detect pin. Since the required GPIO properties are not present in the device-tree binding, set them manually for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: acpi: Add support for the NHLT tableSimon Glass2020-07-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the audio codecs and connections in a system. Various devices can contribute information to produce the table. Add core support for this, based on a structure which is built up through calls to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * dm: core: Add a way of overriding the ACPI device pathSimon Glass2020-07-171-0/+19
| | | | | | | | | | | | | | | | | | Some devices such as GPIO need to override the normal path that would be generated by driver model. Add a device-tree property for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
| * acpi: Add an acpi command to list/dump generated ACPI itemsSimon Glass2020-07-171-0/+16
| | | | | | | | | | | | | | | | | | | | Add a command that shows the individual blocks of data generated by each device, effectively splitting the full table into its component parts. This can be helpful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: acpi: Enhance acpi_get_name()Simon Glass2020-07-173-22/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For many device types it is possible to figure out the name just by looking at its uclass or parent. Add a function to handle this, since it allows us to cover the vast majority of cases automatically. However it is sometimes impossible to figure out an ACPI name for a device just by looking at its uclass. For example a touch device may have a vendor-specific name. Add a new "acpi,name" property to allow a custom name to be created. With this new feature we can drop the get_name() methods in the sandbox I2C and SPI drivers. They were only added for testing purposes. Update the tests to use the new values. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Add support for DSDT generationSimon Glass2020-07-171-1/+24
| | | | | | | | | | | | | | | | | | | | | | Some devices need to inject extra code into the Differentiated System Descriptor Table (DSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct one typo in inject_dsdt() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Support ordering SSDT data by deviceSimon Glass2020-07-171-0/+84
| | | | | | | | | | | | | | | | | | | | Add a /chosen property to control the order in which the data appears in the SSDT. This allows matching up U-Boot's output from a dump of the known-good data obtained from within Linux. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Record the items added to SSDTSimon Glass2020-07-171-4/+79
| | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to control the order of data written to the SSDT so that we can compare the output against known-good kernel dumps. Add code to record each item that is added along with the device that added it. That allows us to reorder things later if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Add support for SSDT generationSimon Glass2020-07-171-0/+14
| | | | | | | | | | | | | | | | | | Some devices need to generate code for the Secondary System Descriptor Table (SSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Support generation of SPI descriptorSimon Glass2020-07-171-0/+11
| | | | | | | | | | | | | | | | Add a function to write a SPI descriptor to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * acpi: Support generation of I2C descriptorSimon Glass2020-07-172-0/+24
| | | | | | | | | | | | | | | | Add a function to write a GPIO descriptor to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * gpio: Add a method to convert a GPIO to ACPISimon Glass2020-07-172-0/+99
| | | | | | | | | | | | | | | | | | | | When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI structures required by ACPI. This is a SoC-specific conversion and cannot be handled by generic code, so add a new GPIO method to do the conversion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * irq: Add a method to convert an interrupt to ACPISimon Glass2020-07-172-2/+32
| | | | | | | | | | | | | | | | | | | | When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI structures required by ACPI. This is a SoC-specific conversion and cannot be handled by generic code, so add a new IRQ method to do the conversion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: core: Add an ACPI name for the root nodeSimon Glass2020-07-171-0/+13
| | | | | | | | | | | | | | | | This always has a fixed ACPI name so add it as a driver function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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