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* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-265-12/+28
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| * armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain2017-05-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC supportPriyanka Jain2017-05-233-4/+13
| | | | | | | | | | | | | | | | | | | | | | The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() pathYogesh Gaur2017-05-231-7/+13
| | | | | | | | | | | | | | | | | | | | | | Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-262-47/+228
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-232-47/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-05-235-7/+623
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| * | serial: sh: Add r8a7796 supportHiroyuki Yokoyama2017-05-221-1/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | net: ravb: Add Renesas Ethernet RAVB driverMarek Vasut2017-05-223-0/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the Renesas Ethernet AVB block found in RCar H3/M3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Based on work of: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Takeshi Kihara <takeshi.kihara.df@renesas.com> Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
| * | gpio: rcar_gen3: Fix GPIO read supportKouei Abe2017-05-221-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes to read the GPIO status after confirming the INOUT setting. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2017-05-224-2/+119
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| * | | usb: ehci: Add Renesas RCar M3/H3 EHCI supportHiroyuki Yokoyama2017-05-223-0/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a USB controller driver for the EHCI block in R8A7795/R8A7796 SoC. This is a stopgap measure until we have proper DT support, clock and reset framework in place, at which point we can switch to ehci-generic. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | net: usb: mcs7830: fix non-DM ingress pathUri Mashiach2017-05-211-2/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | The mcs7830_recv() (non-DM) function discards good packets and tries to process "bad" packets due to incorrect test condition. Fix the condition and return the proper value as described in function doc. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* | | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-224-0/+253
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| * | | nds32: Support AE3XX platform.rick2017-05-223-3/+127
| | | | | | | | | | | | | | | | | | | | | | | | Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
| * | | nds32: Support AG101P timer DM.rick2017-05-223-0/+129
| |/ / | | | | | | | | | | | | | | | Support AG101P timer device tree flow. Signed-off-by: rick <rick@andestech.com>
* | | Kconfig: Add a CONFIG_IDE optionSimon Glass2017-05-227-4/+1244
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate CONFIG_IDE option so that IDE support can be enabled without requiring the 'ide' command. Update existing users and move the ide driver into drivers/block since it should not be in common/. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_CMD_HASH to KconfigSimon Glass2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_CMD_HASH Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Rework slightly, enable on some boards again] Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Kconfig: Drop CONFIG_SYS_I2C_DS4510_ADDRSimon Glass2017-05-221-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is only used by one board and always set to 0x51. Drop this option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Drop digital thermometer and thermostat (DTT) driversSimon Glass2017-05-2214-1301/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This subsystem is quite old. It has been replaced with a driver-model version (UCLASS_THERMAL). Boards are free to convert to that if required, but here is a removal patch that could be applied in the meantime. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Drop three-wire serial (TWS) supportSimon Glass2017-05-225-205/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This subsystem has not been converted to driver model, there is only one driver and only one board that uses it. Drop it and its CONFIG option. Also drop the rtc4543 RTC driver since it uses TWS. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Kconfig: Drop CONFIG_SYS_I2C_DTT_ADDRSimon Glass2017-05-222-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is only defined to a non-default value by canyonlands, which needs conversion to driver model (where the I2C address would be defined by the device tree). Drop this option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Convert CONFIG_DS4510 to KconfigSimon Glass2017-05-221-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_DS4510 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Kconfig: Drop CONFIG_CMD_DS4510Simon Glass2017-05-222-12/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option enables a command in the driver. But the functions defined by the driver are not called anywhere else in U-Boot. So it does not seem useful to have this driver without its commands. Drop this option, move the header file out of the common include/ directory and make all the function static. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Kconfig: Drop CONFIG_CMD_DS4510_RSTSimon Glass2017-05-221-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is only used in one driver and is not enabled by any board. It does not seem worth having the ability to remove this part of the support. Drop the option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Kconfig: Drop CONFIG_CMD_DS4510_MEMSimon Glass2017-05-221-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is only used in one driver and is not enabled by any board. It does not seem worth having the ability to remove this part of the support. Drop the option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | Kconfig: Drop CONFIG_CMD_DS4510_INFOSimon Glass2017-05-221-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is only used in one driver and two boards. It does not seem worth having the ability to remove this part of the support. Drop the option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | | lib: move hash CONFIG options to KconfigTom Rini2017-05-221-0/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support using hardware acceleration.") created entries for CONFIG_SHA1, CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL. However, no defconfig has migrated to it. Complete the move by first adding additional logic to various Kconfig files to select this when required and then use the moveconfig tool. In many cases we can select these because they are required to implement other drivers. We also correct how we include the various hashing algorithms in SPL. This commit was generated as follows (after Kconfig additions): [1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL [2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL Note: We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously because there is dependency between them. Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-05-185-26/+48
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| * | pinctrl: imx: fix memory leakPeng Fan2017-05-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each time set_state is called, a new piece memory will be allocated for pin_data, but not freed, this will incur memory leak. When error, the devm API could not free memory automatically. So need call devm_kfree when error. Issue reported by Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Agner <stefan.agner@toradex.com> Cc: Stefano Babic <sbabic@denx.de>
| * | gpio: 74x164: make oe-pins optionalPeng Fan2017-05-181-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make oe-pins optional because some boards have fixed it to enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | spi: kconfig: add soft spi Kconfig entryPeng Fan2017-05-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the SPI signals. We use it for accessing 74x164 on some i.MX boards. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Stefano Babic <sbabic@denx.de>
| * | thermal: imx: fix calculationPeng Fan2017-05-181-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | Fix calculation. do_div can not handle negative values. Use div_s64_rem to handle the calculation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: thermal: update imx6 thermal driver according new equationPeng Fan2017-05-181-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | >From IC guys: " After a thorough accuracy study of the Temp sense circuit, we found that with our current equation, an average part can read 7 degrees lower than a known forced temperature. We also found out that the standard variance was around 2C; which is the tightest distribution that we could create. We need to change the temp sense equation to center the average part around the target temperature. " New equation: Tmeas = (Nmeas - n1) / slope + t1 + offset n1= fused room count t1= 25 offset=3.580661 slope= 0.4148468 – 0.0015423*n1 According the new equation, update the thermal driver. c1 and c2 changed to u64 type and update comments. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | net: fec_mxc: specify the registered eth index by dev_idAndy Duan2017-05-181-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Specify the registered eth index by dev_id. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * | net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuseAndy Duan2017-05-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(), it should transfer fec->dev_id to get mac address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | net: fec: do not access reserved register for i.MX6ULLPeng Fan2017-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The MIB RAM and FIFO receive start register does not exist on i.MX6ULL. Accessing these register will cause enet not work well or cause system report fault. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* | | usb: lpc32xx: add i2c DM supportLiam Beguin2017-05-181-18/+46
|/ / | | | | | | | | | | | | | | Add DM support for i2c functions. Signed-off-by: Liam Beguin <lbeguin@tycoint.com> Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | x86: ich6_gpio: Add use-lvl-write-cache for I/O access modeBin Meng2017-05-171-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device-tree property use-lvl-write-cache that will cause writes to lvl to be cached instead of read from lvl before each write. This is required on some platforms that have the register implemented as dual read/write (such as Baytrail). Prior to this fix the blue USB port on the Minnowboard Max was unusable since USB_HOST_EN0 was set high then immediately set low when USB_HOST_EN1 was written. This also resolves the 'gpio clear | set' command warning like: "Warning: value of pin is still 0" Signed-off-by: George McCollister <george.mccollister@gmail.com> <rebased on latest origin/master, fixed all baytrail boards> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | spi: ich: Configure SPI BIOS parameters for Linux upon U-Boot exitStefan Roese2017-05-172-7/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a remove function to the Intel ICH SPI driver, that will be called upon U-Boot exit, directly before the OS (Linux) is started. This function takes care of configuring the BIOS registers in the SPI controller (similar to what a "standard" BIOS or coreboot does), so that the Linux MTD device driver is able to correctly read/write to the SPI NOR chip. Without this, the chip is not detected at all. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Jagan Teki <jteki@openedev.com>
* | dm: core: Add DM_FLAG_OS_PREPARE flagStefan Roese2017-05-171-5/+11
| | | | | | | | | | | | | | | | | | | | | | This new flag can be added to DM device drivers, which need to do some final configuration before U-Boot exits and the OS (e.g. Linux) is started. The remove functions of those drivers will get called at this stage to do these last-stage configuration steps. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
* | serial: serial-uclass: Use force parameter in stdio_deregister_dev()Stefan Roese2017-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | On my x86 platform I've noticed, that calling dm_uninit() or the new function dm_remove_devices_flags() does not remove the desired device at all. Debugging showed, that the serial uclass returns -EPERM in serial_pre_remove(). This patch sets the force parameter when calling stdio_deregister_dev() resulting in a removal of the device. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: Convert MMC to driver modelSimon Glass2017-05-171-26/+60
| | | | | | | | | | | | | | | | | | Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: pci: Allow conditionally run VGA rom in S3Bin Meng2017-05-171-0/+14
| | | | | | | | | | | | | | | | | | Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can bypass executing VGA roms in S3. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2017-05-168-47/+117
|\ \ | | | | | | | | | | | | | | | | | | - Add #undef CONFIG_DM_MMC_OPS to omap3_logic in the SPL build case, to match other TI platforms in the same situation. Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMDWenyou Yang2017-05-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | To fix the timeout of sending the write command, enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: descend into drivers/mmc only when CONFIG_MMC is enabledMasahiro Yamada2017-05-152-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | This simplifies makefiles. Also, arrange the order of objects in drivers/mmc/Makefile so that the framework objects are listed before drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMCMasahiro Yamada2017-05-153-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig. We do not need two options for the same feature. Deprecate the former. This commit was generated with the sed script 's/GENERIC_MMC/MMC/' and manual fixup of drivers/mmc/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | mmc: sdhci-cadence: import updates from Linux 4.12Masahiro Yamada2017-05-151-10/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c from Linux. Some updates for v4.12-rc1 can be imported to U-Boot. - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT - Add polling for ACK bit to be sure that data are written to the PHY register - Retrieve PHY values from DT properties instead of fixed data The following is the list of upstream commits: - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943 mmc: sdhci-cadence: fix bit shift of read data from PHY port - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da mmc: sdhci-cadence: Fix writing PHY delay - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01 mmc: sdhci-cadence: Update PHY delay configuration Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | mmc: sdhci: Fix maximum clock for programmable clock modeWenyou Yang2017-05-151-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the programmable clock mode, the SDCLK frequency is incorrectly assigned when the maximum clock has been assigned during probe, this causes the SDHCI not work well. In the programmable clock mode, when calculating the SDCLK Frequency Select, when the maximum clock has been assigned, it is the actual value, should not be multiplied by host->clk_mul. Otherwise, the maximum clock is multiplied host->clk_mul by the base clock achieved from the BASECLKF field of the Capabilities 0 Register. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
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