summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-064-83/+114
|\ | | | | | | | | | | | | | | Conflicts: include/micrel.h The conflict above was trivial, caused by four lines being added in both branches with different whitepace.
| * arm: mx5: Add fuse supply enable in fsl_iimSergey Alyoshin2014-01-031-1/+12
| | | | | | | | | | | | | | Enable fuse supply before fuse programming and disable after. Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * power: power_fsl: Pass p->bus in the same way for SPI and I2C casesFabio Estevam2013-11-271-2/+1
| | | | | | | | | | | | | | | | | | There is no need to pass p->bus differently when the PMIC is connected via SPI or via I2C. Handle the both cases in the same way. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * Net: FEC: Fix huge memory leakMarek Vasut2013-11-211-78/+99
| | | | | | | | | | | | | | | | | | | | | | The fec_halt() never free'd both RX and TX DMA descriptors that were allocated in fec_init(), nor did it free the RX buffers. Rework the FEC driver so that these descriptors and buffers are allocated only once in fec_probe(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs_gpio: fix the handling in gpio_direction_output()Michael Heimpold2013-11-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting the direction and an output value should be done by 1) set the desired output value, 2) switch to output. If this is done in the inverse order, there can be a glitch on the GPIO line. This patch fixes this by using the order as described above. Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | i2c: tegra: Add the fifth bus on SoC with more than 4 busesAlban Bedel2013-12-181-0/+5
| | | | | | | | | | | | | | | | | | Create the i2c adapter object for the fifth bus on SoC with more than 4 buses. This allow using all the bus available on T30. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-12-1015-72/+193
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: board/samsung/trats2/trats2.c include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-1073-1240/+10471
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * | | serial: zynq: Remove unused #definesSoren Brinkmann2013-12-101-4/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | at91: nand: switch atmel_nand to generic GPIO APIAndreas Bießmann2013-12-091-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Acked-by: Scott Wood <scottwood@freescale.com>
| * | | at91: add new gpio pin definitionsAndreas Bießmann2013-12-091-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch define new names for GPIO pins on at91 devices. Follow up patches will convert the whole infrastructure to use these new definitions. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Bo Shen <voice.shen@atmel.com>
| * | | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-062-2/+12
| |\ \ \
| | * | | driver:usb:s3c_udc: add support for Exynos4x12Piotr Wilczek2013-12-022-2/+12
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | usb: ehci-omap: Reset the USB Host OMAP moduleRoger Quadros2013-12-061-15/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit bb1f327 we removed the UHH reset to fix NFS root (over usb ethernet) problems with Beagleboard (3530 ES1.0). However, this seems to cause USB detection problems for Pandaboard, about (3/8). On further investigation, it seems that doing the UHH reset is not the cause of the original Beagleboard problem, but in the way the reset was done. This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based on the UHH_REVISION register. This should fix the Beagleboard NFS problem as well as the Pandaboard USB detection problem. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | | am335x: cpsw: optimize cpsw_recv to increase network performanceVladimir Koutny2013-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 48ec5291, only TX path was optimized; this does the same also for RX path. This results in huge increase of TFTP throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer timeouts. Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
| * | | ahci: Fix cache align error messagesRoger Quadros2013-12-041-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the ATA ID buffer to the cache-line boundary. This gets rid of the below error mesages on ARM v7 platforms. scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818 CC: Aneesh V <aneesh@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | | ahci: Error out with message on malloc() failureRoger Quadros2013-12-041-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If malloc() fails, we don't want to continue in ahci_init() and ahci_init_one(). Also print a more informative error message on malloc() failures. CC: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | | ARMV7: OMAP4: Add twl6032 supportOleg Kosheliev2013-12-041-6/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added chip type detection and twl6032 support in the battery control and charge functions. Based on Balaji T K <balajitk@ti.com> patches for TI u-boot. Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
| * | | ARMV7: OMAP4: Add struct for twl603x dataOleg Kosheliev2013-12-041-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data struct is used to support different PMIC chip types. It contains the chip type and the data (e.g. registers addresses, adc multiplier) which is different for twl6030 and twl6032. Replaced some hardcoded values with the structure vars. Based on Balaji T K <balajitk@ti.com> patches for TI u-boot. Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
| * | | net: remove unused CONFIG_AT91_LEGACYAndreas Bießmann2013-11-131-9/+0
| | | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | i2c: switch from AT91 legacy to ATMEL legacyAndreas Bießmann2013-11-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the required API is gpio which is enclosed with CONFIG_ATMEL_LEGACY use that switch here. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | | video: remove AT91 legacy API from bus_vcxkAndreas Bießmann2013-11-131-15/+0
| |/ / | | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * | usb, g_dnl: make bcdDevice value configurableHeiko Schocher2013-11-121-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add the possibility to set the bcdDevice number board specific. Therefore the weak function g_dnl_get_board_bcd_device_number() is introduced. Used on the siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
| * | am33xx: Make SoC bootcount driver have its own symbolTom Rini2013-11-112-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some am33xx boards may not use the RTC block for bootcount (as it may not be wired up for the board) and use some other facility. So add another symbol for the bootcount driver for the IP block. Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
| * | bootcount: store bootcount var in environmentHeiko Schocher2013-11-112-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If no softreset save registers are found on the hardware "bootcount" is stored in the environment. To prevent a saveenv on all reboots, the environment variable "upgrade_available" is introduced. If "upgrade_available" is 0, "bootcount" is always 0 therefore no need to save the environment on u-boot boot, if "upgrade_available" is 1 "bootcount" is incremented in the environment and environment gets written on u-boot start. So the Userspace Applikation must set the "upgrade_available" and "bootcount" variable to 0 (for example with fw_setenv), if a boot was successfully. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'spi' of git://git.denx.de/u-boot-x86Tom Rini2013-12-109-12/+738
|\ \ \
| * | | sandbox: spi: Add new SPI flash driverMike Frysinger2013-12-094-1/+487
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a SPI flash driver which simulates SPI flash clients. Currently supports the bare min that U-Boot requires: you can probe, read, erase, and write. Should be easy to extend to make it behave more exactly like a real SPI flash, but this is good enough to merge now. sjg@chromium.org added a README and tidied up code a little. Added a required map_sysmem() for sandbox. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: spi: Add SPI emulation busMike Frysinger2013-12-092-0/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a SPI framework for people to hook up simulated SPI clients. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT nodeSimon Glass2013-12-094-11/+46
| | |/ | |/| | | | | | | | | | | | | | | | This allows us to put the SPI flash chip inside the SPI interface node, with U-Boot finding the correct bus and chip select automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2013-12-105-18/+58
|\ \ \
| * | | mmc: add Faraday FTSDC021 SDHCI controller supportKuo-Jung Su2013-12-082-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTSDC021 is a controller which is compliant with SDHCI v3.0, SDIO v2.0 and MMC v4.3. However this driver is only verified with SD memory cards. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> CC: Andy Fleming <afleming@gmail.com>
| * | | powerpc: mmc: Add corenet devices support in esdhc splPriyanka Jain2013-12-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing eSDHC SPL framework assumes booting from sd-image with boot_format header which contains final u-boot Image offset and size. No such header is present in case of corenet devices like T1040 as corenet deivces use PBI-RCW based intialization. So, for corenet deives, SPL bootloader use values provided at compilation time. These values can be defined in board specific config file. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | | mmc/dwmmc: modify FIFO threshold only if value explicitly setAlexey Brodkin2013-12-081-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If platform provides "host->fifoth_val" it will be used for initialization of DWMCI_FIFOTH register. Otherwise default value will be used. This implementation allows: * escape unclear and recursive calculations that are currently in use * use whatever custom value for DWMCI_FIFOTH initialization if any particular SoC requires it Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | | mmc: dw_mmc: remove the exynos specific code in dw-mmc.cJaehoon Chung2013-12-082-10/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw-mmc.c is the general driver file. So, remove the exynos specific code at dw-mmc.c. Instead, exynos specific cod can be move into exynos-dw_mmc.c. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-12-104-251/+393
|\ \ \
| * | | i2c: samsung: register i2c busses for Exynso5420 and Exynos5250Naveen Krishna Ch2013-12-061-48/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels on Exynos5420 and Exynos5250 and also adds support for init function for hsi2c channels Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
| * | | arm: omap: i2c: don't zero cnt in i2c_writeNikita Kiryanov2013-12-051-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3 based devices. This seems to be related to the following advisory which apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as OMAP4430 TRM: Advisory: I2C Module Does Not Allow 0-Byte Data Requests Details: When configured as the master, the I2C module does not allow 0-byte data transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause undefined behavior. Workaround(s): No workaround. Do not use 0-byte data requests. The writes in question are unnecessary from a functional point of view. Most of them are done after I/O has finished, and the only one that preceds I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before actual data transmission takes place. Therefore, remove all writes that zero the cnt register. Cc: Heiko Schocher <hs@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Tom Rini <trini@ti.com> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Enric Balletbo Serra <eballetbo@gmail.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com>
| * | | i2c: fti2c010: serial out r/w address in MSB orderKuo-Jung Su2013-12-051-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B), the r/w address should be serial out in MSB order. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: fti2c010: migrate to new i2c modelKuo-Jung Su2013-12-051-166/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the legacy i2c model with the new one. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
| * | | i2c: fti2c010: cosmetic: coding style cleanupKuo-Jung Su2013-12-051-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Coding style cleanup Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
| * | | driver:i2c:s3c24x0: fix clock init for hsi2cPiotr Wilczek2013-12-051-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix clock value initialisation for Exynos other than Exynos5 for hsi2c. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Heiko Schocher <hs@denx.de>
| * | | driver:i2c:s3c24x0: adapt driver to new i2cPiotr Wilczek2013-12-052-57/+97
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adapts the s3c24x0 driver to the new i2c framework. Config file is modified for all the boards that use the driver. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Heiko Schocher <hs@denx.de> CC: Inderpal Singh <inderpal.singh@linaro.org> CC: David Müller <d.mueller@elsoft.ch> CC: Chander Kashyap <k.chander@samsung.com> CC: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-blackfinTom Rini2013-12-062-12/+10
|\ \ \
| * | | spi: bfin_spi6xx: Remove unnecessary test for bus and pins[bus]Axel Lin2013-12-061-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For invalid bus number, current code returns NULL in the default case of switch-case statements. In additional, pins[bus] is always not NULL because it is the address of specific row of the two-dimensional array. Thus this patch removes these unnecessary test. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | spi: bfin_spi: Remove unnecessary test for bus and pins[bus]Axel Lin2013-12-061-8/+9
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For invalid bus number, current code returns NULL in the default case of switch-case statements. In additional, pins[bus] is always not NULL because it is the address of specific row of the two-dimensional array. Thus this patch removes these unnecessary test. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | | powerpc: spiflash:Add corenet devices support in eSPI SPLPriyanka Jain2013-12-041-0/+5
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing eSPI SPL framework assumes booting from spi-image with boot_format header which contains final u-boot Image offset and size. No such header is present in case of corenet devices like T1040 as corenet deivces use PBI-RCW based intialization. So, for corenet deives, SPL bootloader use values provided at compilation time. These values can be defined in board specific config file. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* | Merge branch 'serial' of git://git.denx.de/u-boot-microblazeTom Rini2013-12-021-4/+0
|\ \
| * | serial: zynq: Remove unused #definesSoren Brinkmann2013-12-021-4/+0
| | | | | | | | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: trini, uboot
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-12-0224-8/+8496
|\ \ \ | |/ / |/| |
| * | powerpc/mpc85xx: Add T2080/T2081 SoC supportShengzhou Liu2013-11-252-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T2080/T2081 SoC. T2080 includes the following functions and features: - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
View Lorry Controller Status